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Thu, 11 Jul 2024 19:37:36 -0700 (PDT) From: Changqi Lu To: qemu-block@nongnu.org, qemu-devel@nongnu.org Cc: kwolf@redhat.com, hreitz@redhat.com, stefanha@redhat.com, fam@euphon.net, ronniesahlberg@gmail.com, pbonzini@redhat.com, pl@dlhnet.de, kbusch@kernel.org, its@irrelevant.dk, foss@defmacro.it, philmd@linaro.org, pizhenwei@bytedance.com, Changqi Lu Subject: [PATCH v9 06/10] block/nvme: add reservation command protocol constants Date: Fri, 12 Jul 2024 10:36:46 +0800 Message-Id: <20240712023650.45626-7-luchangqi.123@bytedance.com> X-Mailer: git-send-email 2.39.2 (Apple Git-143) In-Reply-To: <20240712023650.45626-1-luchangqi.123@bytedance.com> References: <20240712023650.45626-1-luchangqi.123@bytedance.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::536; envelope-from=luchangqi.123@bytedance.com; helo=mail-pg1-x536.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @bytedance.com) X-ZM-MESSAGEID: 1720751937548116600 Content-Type: text/plain; charset="utf-8" Add constants for the NVMe persistent command protocol. The constants include the reservation command opcode and reservation type values defined in section 7 of the NVMe 2.0 specification. Reviewed-by: Stefan Hajnoczi Signed-off-by: Changqi Lu Signed-off-by: zhenwei pi --- include/block/nvme.h | 61 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 61 insertions(+) diff --git a/include/block/nvme.h b/include/block/nvme.h index bb231d0b9a..8b125f7769 100644 --- a/include/block/nvme.h +++ b/include/block/nvme.h @@ -633,7 +633,11 @@ enum NvmeIoCommands { NVME_CMD_WRITE_ZEROES =3D 0x08, NVME_CMD_DSM =3D 0x09, NVME_CMD_VERIFY =3D 0x0c, + NVME_CMD_RESV_REGISTER =3D 0x0d, + NVME_CMD_RESV_REPORT =3D 0x0e, + NVME_CMD_RESV_ACQUIRE =3D 0x11, NVME_CMD_IO_MGMT_RECV =3D 0x12, + NVME_CMD_RESV_RELEASE =3D 0x15, NVME_CMD_COPY =3D 0x19, NVME_CMD_IO_MGMT_SEND =3D 0x1d, NVME_CMD_ZONE_MGMT_SEND =3D 0x79, @@ -641,6 +645,63 @@ enum NvmeIoCommands { NVME_CMD_ZONE_APPEND =3D 0x7d, }; =20 +typedef enum { + NVME_RESV_REGISTER_ACTION_REGISTER =3D 0x00, + NVME_RESV_REGISTER_ACTION_UNREGISTER =3D 0x01, + NVME_RESV_REGISTER_ACTION_REPLACE =3D 0x02, +} NvmeReservationRegisterAction; + +typedef enum { + NVME_RESV_RELEASE_ACTION_RELEASE =3D 0x00, + NVME_RESV_RELEASE_ACTION_CLEAR =3D 0x01, +} NvmeReservationReleaseAction; + +typedef enum { + NVME_RESV_ACQUIRE_ACTION_ACQUIRE =3D 0x00, + NVME_RESV_ACQUIRE_ACTION_PREEMPT =3D 0x01, + NVME_RESV_ACQUIRE_ACTION_PREEMPT_AND_ABORT =3D 0x02, +} NvmeReservationAcquireAction; + +typedef enum { + NVME_RESV_WRITE_EXCLUSIVE =3D 0x01, + NVME_RESV_EXCLUSIVE_ACCESS =3D 0x02, + NVME_RESV_WRITE_EXCLUSIVE_REGS_ONLY =3D 0x03, + NVME_RESV_EXCLUSIVE_ACCESS_REGS_ONLY =3D 0x04, + NVME_RESV_WRITE_EXCLUSIVE_ALL_REGS =3D 0x05, + NVME_RESV_EXCLUSIVE_ACCESS_ALL_REGS =3D 0x06, +} NvmeResvType; + +typedef enum { + NVME_RESV_PTPL_NO_CHANGE =3D 0x00, + NVME_RESV_PTPL_DISABLE =3D 0x02, + NVME_RESV_PTPL_ENABLE =3D 0x03, +} NvmeResvPTPL; + +typedef enum NVMEPrCap { + /* Persist Through Power Loss */ + NVME_PR_CAP_PTPL =3D 1 << 0, + /* Write Exclusive reservation type */ + NVME_PR_CAP_WR_EX =3D 1 << 1, + /* Exclusive Access reservation type */ + NVME_PR_CAP_EX_AC =3D 1 << 2, + /* Write Exclusive Registrants Only reservation type */ + NVME_PR_CAP_WR_EX_RO =3D 1 << 3, + /* Exclusive Access Registrants Only reservation type */ + NVME_PR_CAP_EX_AC_RO =3D 1 << 4, + /* Write Exclusive All Registrants reservation type */ + NVME_PR_CAP_WR_EX_AR =3D 1 << 5, + /* Exclusive Access All Registrants reservation type */ + NVME_PR_CAP_EX_AC_AR =3D 1 << 6, + + NVME_PR_CAP_ALL =3D (NVME_PR_CAP_PTPL | + NVME_PR_CAP_WR_EX | + NVME_PR_CAP_EX_AC | + NVME_PR_CAP_WR_EX_RO | + NVME_PR_CAP_EX_AC_RO | + NVME_PR_CAP_WR_EX_AR | + NVME_PR_CAP_EX_AC_AR), +} NvmePrCap; + typedef struct QEMU_PACKED NvmeDeleteQ { uint8_t opcode; uint8_t flags; --=20 2.20.1