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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4266f736939sm119412025e9.37.2024.07.11.06.18.24 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Jul 2024 06:18:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1720703905; x=1721308705; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=/AM2evHCBZ+zQstkZ8Yl2d6atBhqWRDl1W7bKsTVmZ8=; b=fLfuagobILgHgD6adpdamXR9ls9BhSOtEPAOR376kXcbyYk5CoQCWIT4k80Ree9YFM Rd9VuqiMySy7zy4gDGYbt2wtWC4p9vasc4jiD1KNN8eGqU+OP2D8cLE3bU4gHG3wNq9F 6eHj4CsWgVsrcAs8xwtyBlP+tkQhYq2fE6d2GW9oRm33rOa93h6MWq1z1T4W5QNqoeRD cCC+z5LSsMRti1XlEAaZqWHuqKGr1W6QehoO3TzTmr3eLQQ1QHUX+w56wajDQ2uk1PS6 wrHQmFqzHDL7bgxCseEUsFOOb04avEgGTe2XbqWPoUtnlPAmlqRSt9WaQGRIYvTTw1rw oP0Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1720703905; x=1721308705; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=/AM2evHCBZ+zQstkZ8Yl2d6atBhqWRDl1W7bKsTVmZ8=; b=dfFfCOp4OTyxOre5xKCWv3epW2z6jFOj3ldYqaVgon9XQ4csRy1WirAkPENAql3O7d 2Yym6isyuyD8RNmQqW1Ao8n63uHCkE3naKzfjk8JnWsblBy/xV6y+g2nUqfptqK6Z7gI yLOiVsmqAz76z03+PwTzFV8+j+VAbpUILMG/qq9zuV5Eq+SI9M2YrvePfIdw6R7hf0jr 1FgHtFEYAPLqTzR+YxOfzYZirVByntAz25nHvzUS/gVTnMLH5xktkVRxtO2kIfZyL+kQ 6DQiYVKT5ZUK+SWtAL0NtqvPyMC0dIooTizPx0t9ChV9h9d/SO/pNs7oJvUaE1IbvF8a 8uaw== X-Gm-Message-State: AOJu0Yx9v5QSdyp7o4G6oj+9IHSZugKYjBHJvhbCIYrZPHDumR7QMx6E X45DGTpbtYzmThDv14WKVlVM/0A9GSyJgHUARS9Rx3mQrRWoJfgzheKXf4yO+jC5rFdUV+MnYAq yeuc= X-Google-Smtp-Source: AGHT+IG2wlNMlAjFeg1WXJ2k+awc13TiC2UcOumpGau6kEmELm6Piv6eXT4S82yFGkiKYsvP1yMGPg== X-Received: by 2002:a05:600c:4850:b0:426:62c5:4731 with SMTP id 5b1f17b1804b1-426707f8563mr70542125e9.29.1720703905209; Thu, 11 Jul 2024 06:18:25 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 01/24] target/arm: Correct comments about M-profile FPSCR Date: Thu, 11 Jul 2024 14:17:59 +0100 Message-Id: <20240711131822.3909903-2-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240711131822.3909903-1-peter.maydell@linaro.org> References: <20240711131822.3909903-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::32e; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1720704144044116600 Content-Type: text/plain; charset="utf-8" The M-profile FPSCR LTPSIZE is bits [18:16]; this is the same field as A-profile FPSCR Len, not Stride. Correct the comment in vfp_get_fpscr(). We also implemented M-profile FPSCR.QC, but forgot to delete a TODO comment from vfp_set_fpscr(); remove it now. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20240628142347.1283015-2-peter.maydell@linaro.org --- target/arm/vfp_helper.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/target/arm/vfp_helper.c b/target/arm/vfp_helper.c index 50d7042fa9e..e1686005558 100644 --- a/target/arm/vfp_helper.c +++ b/target/arm/vfp_helper.c @@ -176,8 +176,8 @@ uint32_t HELPER(vfp_get_fpscr)(CPUARMState *env) | (env->vfp.vec_stride << 20); =20 /* - * M-profile LTPSIZE overlaps A-profile Stride; whichever of the - * two is not applicable to this CPU will always be zero. + * M-profile LTPSIZE is the same bits [18:16] as A-profile Len; whiche= ver + * of the two is not applicable to this CPU will always be zero. */ fpscr |=3D env->v7m.ltpsize << 16; =20 @@ -226,7 +226,6 @@ void HELPER(vfp_set_fpscr)(CPUARMState *env, uint32_t v= al) /* * The bit we set within fpscr_q is arbitrary; the register as a * whole being zero/non-zero is what counts. - * TODO: M-profile MVE also has a QC bit. */ env->vfp.qc[0] =3D val & FPCR_QC; env->vfp.qc[1] =3D 0; --=20 2.34.1