From nobody Mon Nov 25 01:55:01 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1720667008924518.3056327057132; Wed, 10 Jul 2024 20:03:28 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sRk4n-0001p2-Ei; Wed, 10 Jul 2024 23:02:33 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sRk4i-0001ns-OK for qemu-devel@nongnu.org; Wed, 10 Jul 2024 23:02:30 -0400 Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sRk4e-0003Zv-V1 for qemu-devel@nongnu.org; Wed, 10 Jul 2024 23:02:28 -0400 Received: from loongson.cn (unknown [10.2.5.185]) by gateway (Coremail) with SMTP id _____8Cx_vA6S49mfhkDAA--.9535S3; Thu, 11 Jul 2024 11:02:18 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.185]) by localhost.localdomain (Coremail) with SMTP id AQAAf8BxVcU4S49mz3lDAA--.12343S2; Thu, 11 Jul 2024 11:02:17 +0800 (CST) From: Song Gao To: qemu-devel@nongnu.org Cc: alex.bennee@linaro.org, philmd@linaro.org, richard.henderson@linaro.org, maobibo@loongson.cn Subject: [PATCH v2] target/loongarch/gdbstub: Add vector registers support Date: Thu, 11 Jul 2024 10:44:54 +0800 Message-Id: <20240711024454.3075183-1-gaosong@loongson.cn> X-Mailer: git-send-email 2.39.1 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: AQAAf8BxVcU4S49mz3lDAA--.12343S2 X-CM-SenderInfo: 5jdr20tqj6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=114.242.206.163; envelope-from=gaosong@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1720667009790116600 Content-Type: text/plain; charset="utf-8" GDB already support LoongArch vector extension[1], QEMU gdb adds LoongArch vector registers support, so that users can use 'info all-registe= rs' to get all vector registers values. [1]: https://sourceware.org/git/?p=3Dbinutils-gdb.git;a=3Dcommitdiff;h=3D1e= 9569f383a3d5a88ee07d0c2401bd95613c222e Signed-off-by: Song Gao Reviewed-by: Philippe Mathieu-Daud=C3=A9 based-on:=20 --- based-on:=20 https://patchew.org/QEMU/20240607035016.2975799-1-maobibo@loongson.cn/ v2: - fix tab line wrapper issue. - Link to v1: https://patchew.org/QEMU/20240621065406.864232-1-gaosong@loon= gson.cn/=20 configs/targets/loongarch64-linux-user.mak | 2 +- configs/targets/loongarch64-softmmu.mak | 2 +- target/loongarch/gdbstub.c | 70 +++++++++++++++++++++- gdb-xml/loongarch-lasx.xml | 60 +++++++++++++++++++ gdb-xml/loongarch-lsx.xml | 59 ++++++++++++++++++ 5 files changed, 189 insertions(+), 4 deletions(-) create mode 100644 gdb-xml/loongarch-lasx.xml create mode 100644 gdb-xml/loongarch-lsx.xml diff --git a/configs/targets/loongarch64-linux-user.mak b/configs/targets/l= oongarch64-linux-user.mak index d878e5a113..ea9b7e839a 100644 --- a/configs/targets/loongarch64-linux-user.mak +++ b/configs/targets/loongarch64-linux-user.mak @@ -1,4 +1,4 @@ # Default configuration for loongarch64-linux-user TARGET_ARCH=3Dloongarch64 TARGET_BASE_ARCH=3Dloongarch -TARGET_XML_FILES=3Dgdb-xml/loongarch-base64.xml gdb-xml/loongarch-fpu.xml +TARGET_XML_FILES=3Dgdb-xml/loongarch-base64.xml gdb-xml/loongarch-fpu.xml = gdb-xml/loongarch-lsx.xml gdb-xml/loongarch-lasx.xml diff --git a/configs/targets/loongarch64-softmmu.mak b/configs/targets/loon= garch64-softmmu.mak index 65b65e0c34..ce19ab6a16 100644 --- a/configs/targets/loongarch64-softmmu.mak +++ b/configs/targets/loongarch64-softmmu.mak @@ -2,6 +2,6 @@ TARGET_ARCH=3Dloongarch64 TARGET_BASE_ARCH=3Dloongarch TARGET_KVM_HAVE_GUEST_DEBUG=3Dy TARGET_SUPPORTS_MTTCG=3Dy -TARGET_XML_FILES=3D gdb-xml/loongarch-base32.xml gdb-xml/loongarch-base64.= xml gdb-xml/loongarch-fpu.xml +TARGET_XML_FILES=3D gdb-xml/loongarch-base32.xml gdb-xml/loongarch-base64.= xml gdb-xml/loongarch-fpu.xml gdb-xml/loongarch-lsx.xml gdb-xml/loongarch-l= asx.xml # all boards require libfdt TARGET_NEED_FDT=3Dy diff --git a/target/loongarch/gdbstub.c b/target/loongarch/gdbstub.c index a0e1439bd0..8ac327d286 100644 --- a/target/loongarch/gdbstub.c +++ b/target/loongarch/gdbstub.c @@ -116,8 +116,74 @@ static int loongarch_gdb_set_fpu(CPUState *cs, uint8_t= *mem_buf, int n) return length; } =20 +static int loongarch_gdb_get_vec(CPUState *cs, GByteArray *mem_buf, int n,= int vl) +{ + LoongArchCPU *cpu =3D LOONGARCH_CPU(cs); + CPULoongArchState *env =3D &cpu->env; + int i, length =3D 0; + + if (0 <=3D n && n < 32) { + for (i =3D 0; i < vl / 64; i++) { + length +=3D gdb_get_reg64(mem_buf, env->fpr[n].vreg.D(i)); + } + } + + return length; +} + +static int loongarch_gdb_set_vec(CPUState *cs, uint8_t *mem_buf, int n, in= t vl) +{ + LoongArchCPU *cpu =3D LOONGARCH_CPU(cs); + CPULoongArchState *env =3D &cpu->env; + int i, length =3D 0; + + if (0 <=3D n && n < 32) { + for (i =3D 0; i < vl / 64; i++) { + env->fpr[n].vreg.D(i) =3D ldq_le_p(mem_buf + 8 * i); + length +=3D 8; + } + } + + return length; +} + +static int loongarch_gdb_get_lsx(CPUState *cs, GByteArray *mem_buf, int n) +{ + return loongarch_gdb_get_vec(cs, mem_buf, n, LSX_LEN); +} + +static int loongarch_gdb_set_lsx(CPUState *cs, uint8_t *mem_buf, int n) +{ + return loongarch_gdb_set_vec(cs, mem_buf, n, LSX_LEN); +} + +static int loongarch_gdb_get_lasx(CPUState *cs, GByteArray *mem_buf, int n) +{ + return loongarch_gdb_get_vec(cs, mem_buf, n, LASX_LEN); +} + +static int loongarch_gdb_set_lasx(CPUState *cs, uint8_t *mem_buf, int n) +{ + return loongarch_gdb_set_vec(cs, mem_buf, n, LASX_LEN); +} + void loongarch_cpu_register_gdb_regs_for_features(CPUState *cs) { - gdb_register_coprocessor(cs, loongarch_gdb_get_fpu, loongarch_gdb_set_= fpu, - gdb_find_static_feature("loongarch-fpu.xml"),= 0); + LoongArchCPU *cpu =3D LOONGARCH_CPU(cs); + CPULoongArchState *env =3D &cpu->env; + + if (FIELD_EX32(env->cpucfg[2], CPUCFG2, FP)) { + gdb_register_coprocessor(cs, loongarch_gdb_get_fpu, loongarch_gdb_= set_fpu, + gdb_find_static_feature("loongarch-fpu.xm= l"), 0); + } + + if (FIELD_EX32(env->cpucfg[2], CPUCFG2, LSX)) { + gdb_register_coprocessor(cs, loongarch_gdb_get_lsx, loongarch_gdb_= set_lsx, + gdb_find_static_feature("loongarch-lsx.xm= l"), 0); + } + + if (FIELD_EX32(env->cpucfg[2], CPUCFG2, LASX)) { + gdb_register_coprocessor(cs, loongarch_gdb_get_lasx, loongarch_gdb= _set_lasx, + gdb_find_static_feature("loongarch-lasx.x= ml"), 0); + } } diff --git a/gdb-xml/loongarch-lasx.xml b/gdb-xml/loongarch-lasx.xml new file mode 100644 index 0000000000..753b982c65 --- /dev/null +++ b/gdb-xml/loongarch-lasx.xml @@ -0,0 +1,60 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/gdb-xml/loongarch-lsx.xml b/gdb-xml/loongarch-lsx.xml new file mode 100644 index 0000000000..51af1c6fd5 --- /dev/null +++ b/gdb-xml/loongarch-lsx.xml @@ -0,0 +1,59 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + --=20 2.34.1