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[174.21.76.141]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-70b438f5679sm2687280b3a.90.2024.07.09.20.28.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 09 Jul 2024 20:28:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1720582102; x=1721186902; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=/jbXp+ktkX7+TZy4xaNziEFN/kKK08frm4LETYQOrf8=; b=KR2kA/WF5tqWitx/+XeXRxgxgehrHoLEAJzDmvnv0E1aLxFD9wVS/InXW7I5wiY128 UO2IuEYc1Bev3rBBgkMwhkofk/5LM429h1yikY9SJlQDibNgACyBGOof8dPWDRT4XOlH C0zBelcGyHDZIQgRs9NeHon+WySszWgCFq/dA8gjkbFeMQiAGbw8c09dX+Nw4ox2C+ZB x3gBRzTPlkUCnIM/ir9rrDrHhL8TAkLpHTEM0eqHU3jBYGXdvoYSI+9oRr9L1f6yRWuY rWvpT/bYyw2fwud5EaH6IoqD12ZFASec6woJ/z4mvp1dwFUV0vi3SJGRS+NZVCKLVX9Y XEXA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1720582102; x=1721186902; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=/jbXp+ktkX7+TZy4xaNziEFN/kKK08frm4LETYQOrf8=; b=fbub/uSz6yRBe548mFTHYc6vQigL7tK5HXNkVxzbrJarZAP+w8v3zzY5tX3h4JY1Qd TUKbiL2ZngXAuVlSmWhWqF96iYPU/yfTOVVgFENNtXY1bEJ7g+7lD/lp6Q93SSNvwILb t5BdCJChwh1pPtAGBsYac9TQsIMZlAbD+4QUhGA+BgfQ4iWVHdpTxhr029rhriOVUGiL xQjPuQNAIMPPMzkhmp4BRdBj6nBhj0gRzD9hoQmdUhttLWf+zhr5mR5UtMDzu3f3LPQ8 3AanK219zTRtTn8JKWAKKnW/8Mu0/D5t+rY+3bLystzwURTbFIqzTQNerkxCZUkLNZ4d P4fw== X-Gm-Message-State: AOJu0YxB/FElvBB/6dlFx5lmNAoplIw0zTwViMjF5/YjTtyY3M+Q7yg2 /Qj8FqWNFpijPxvBriFRy0zvhvQn/AFgo3o3jewqWpXJDB7gFWTW0+XSdl0CpBZnoYjIbMgfFgb iAz4= X-Google-Smtp-Source: AGHT+IE8sHnOlG6QtYObUSh9HAYbGPwGfS2WbQEKlIH7MkmRPO41H7Ta2Mxo70aoMF7YCgU8bGPSKg== X-Received: by 2002:a05:6830:1e75:b0:703:7775:c0cb with SMTP id 46e09a7af769-7037775c2c7mr4193125a34.31.1720582102257; Tue, 09 Jul 2024 20:28:22 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-ppc@nongu.org, qemu-s390x@nongnu.org, qemu-riscv@nongnu.org, balaton@eik.bme.hu, max.chou@sifive.com Subject: [PATCH v2 06/13] target/ppc: Hoist dcbz_size out of dcbz_common Date: Tue, 9 Jul 2024 20:28:07 -0700 Message-ID: <20240710032814.104643-7-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240710032814.104643-1-richard.henderson@linaro.org> References: <20240710032814.104643-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::32a; envelope-from=richard.henderson@linaro.org; helo=mail-ot1-x32a.google.com X-Spam_score_int: 4 X-Spam_score: 0.4 X-Spam_bar: / X-Spam_report: (0.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, SUSPICIOUS_RECIPS=2.51 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1720582177773116600 Content-Type: text/plain; charset="utf-8" The 970 logic does not apply to dcbzep, which is an e500 insn. Signed-off-by: Richard Henderson Reviewed-by: BALATON Zoltan --- target/ppc/mem_helper.c | 30 +++++++++++++++--------------- 1 file changed, 15 insertions(+), 15 deletions(-) diff --git a/target/ppc/mem_helper.c b/target/ppc/mem_helper.c index 361fd72226..5067919ff8 100644 --- a/target/ppc/mem_helper.c +++ b/target/ppc/mem_helper.c @@ -271,22 +271,12 @@ void helper_stsw(CPUPPCState *env, target_ulong addr,= uint32_t nb, } =20 static void dcbz_common(CPUPPCState *env, target_ulong addr, - uint32_t opcode, int mmu_idx, uintptr_t retaddr) + int dcbz_size, int mmu_idx, uintptr_t retaddr) { - target_ulong mask, dcbz_size =3D env->dcache_line_size; - uint32_t i; + target_ulong mask =3D ~(target_ulong)(dcbz_size - 1); void *haddr; =20 -#if defined(TARGET_PPC64) - /* Check for dcbz vs dcbzl on 970 */ - if (env->excp_model =3D=3D POWERPC_EXCP_970 && - !(opcode & 0x00200000) && ((env->spr[SPR_970_HID5] >> 7) & 0x3) = =3D=3D 1) { - dcbz_size =3D 32; - } -#endif - /* Align address */ - mask =3D ~(dcbz_size - 1); addr &=3D mask; =20 /* Check reservation */ @@ -300,7 +290,7 @@ static void dcbz_common(CPUPPCState *env, target_ulong = addr, memset(haddr, 0, dcbz_size); } else { /* Slow path */ - for (i =3D 0; i < dcbz_size; i +=3D 8) { + for (int i =3D 0; i < dcbz_size; i +=3D 8) { cpu_stq_mmuidx_ra(env, addr + i, 0, mmu_idx, retaddr); } } @@ -308,12 +298,22 @@ static void dcbz_common(CPUPPCState *env, target_ulon= g addr, =20 void helper_dcbz(CPUPPCState *env, target_ulong addr, uint32_t opcode) { - dcbz_common(env, addr, opcode, ppc_env_mmu_index(env, false), GETPC()); + int dcbz_size =3D env->dcache_line_size; + +#if defined(TARGET_PPC64) + /* Check for dcbz vs dcbzl on 970 */ + if (env->excp_model =3D=3D POWERPC_EXCP_970 && + !(opcode & 0x00200000) && ((env->spr[SPR_970_HID5] >> 7) & 0x3) = =3D=3D 1) { + dcbz_size =3D 32; + } +#endif + + dcbz_common(env, addr, dcbz_size, ppc_env_mmu_index(env, false), GETPC= ()); } =20 void helper_dcbzep(CPUPPCState *env, target_ulong addr, uint32_t opcode) { - dcbz_common(env, addr, opcode, PPC_TLB_EPID_STORE, GETPC()); + dcbz_common(env, addr, env->dcache_line_size, PPC_TLB_EPID_STORE, GETP= C()); } =20 void helper_icbi(CPUPPCState *env, target_ulong addr) --=20 2.43.0