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Sun, 07 Jul 2024 12:11:53 -0700 (PDT) From: Ajeet Singh X-Google-Original-From: Ajeet Singh To: qemu-devel@nongnu.org Cc: Warner Losh , Stacey Son , Ajeet Singh Subject: [PATCH v2 8/8] bsd-user:Add AArch64 improvements and signal handling functions Date: Mon, 8 Jul 2024 00:41:28 +0530 Message-Id: <20240707191128.10509-9-itachis@FreeBSD.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240707191128.10509-1-itachis@FreeBSD.org> References: <20240707191128.10509-1-itachis@FreeBSD.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::630; envelope-from=itachis6234@gmail.com; helo=mail-pl1-x630.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1720379551230100001 Content-Type: text/plain; charset="utf-8" From: Stacey Son Added get_ucontext_sigreturn function to check processor state ensuring cur= rent execution mode is EL0 and no flags indicating interrupts or exceptions are set. Updated AArch64 code to use CF directly without reading/writing the entire = processor state, improving efficiency. Changed FP data structures to use Int128 instead of __uint128_t, leveraging= QEMU's generic mechanism for referencing this type. Signed-off-by: Stacey Son Signed-off-by: Ajeet Singh Signed-off-by: Warner Losh Reviewed-by: Richard Henderson --- bsd-user/aarch64/signal.c | 20 +++++++++++++++++++- bsd-user/aarch64/target_arch_cpu.h | 7 ++----- bsd-user/aarch64/target_arch_reg.h | 2 +- bsd-user/aarch64/target_arch_signal.h | 2 +- bsd-user/qemu.h | 3 +++ 5 files changed, 26 insertions(+), 8 deletions(-) diff --git a/bsd-user/aarch64/signal.c b/bsd-user/aarch64/signal.c index 13faac8ce6..6bc73a798f 100644 --- a/bsd-user/aarch64/signal.c +++ b/bsd-user/aarch64/signal.c @@ -21,7 +21,7 @@ #include "qemu.h" =20 /* - * Compare to sendsig() in sys/arm64/arm64/machdep.c + * Compare to sendsig() in sys/arm64/arm64/exec_machdep.c * Assumes that target stack frame memory is locked. */ abi_long set_sigtramp_args(CPUARMState *regs, int sig, @@ -117,3 +117,21 @@ abi_long set_mcontext(CPUARMState *regs, target_mconte= xt_t *mcp, int srflag) =20 return err; } + +/* Compare to sys_sigreturn() in arm64/arm64/machdep.c */ +abi_long get_ucontext_sigreturn(CPUARMState *regs, abi_ulong target_sf, + abi_ulong *target_uc) +{ + uint32_t pstate =3D pstate_read(regs); + + *target_uc =3D 0; + + if ((pstate & PSTATE_M) !=3D PSTATE_MODE_EL0t || + (pstate & (PSTATE_F | PSTATE_I | PSTATE_A | PSTATE_D)) !=3D 0) { + return -TARGET_EINVAL; + } + + *target_uc =3D target_sf; + + return 0; +} diff --git a/bsd-user/aarch64/target_arch_cpu.h b/bsd-user/aarch64/target_a= rch_cpu.h index 4e950305d3..408aef2bb5 100644 --- a/bsd-user/aarch64/target_arch_cpu.h +++ b/bsd-user/aarch64/target_arch_cpu.h @@ -47,7 +47,6 @@ static inline void target_cpu_loop(CPUARMState *env) CPUState *cs =3D env_cpu(env); int trapnr, ec, fsc, si_code, si_signo; uint64_t code, arg1, arg2, arg3, arg4, arg5, arg6, arg7, arg8; - uint32_t pstate; abi_long ret; =20 for (;;) { @@ -87,18 +86,16 @@ static inline void target_cpu_loop(CPUARMState *env) * The carry bit is cleared for no error; set for error. * See arm64/arm64/vm_machdep.c cpu_set_syscall_retval() */ - pstate =3D pstate_read(env); if (ret >=3D 0) { - pstate &=3D ~PSTATE_C; + env->CF =3D 0; env->xregs[0] =3D ret; } else if (ret =3D=3D -TARGET_ERESTART) { env->pc -=3D 4; break; } else if (ret !=3D -TARGET_EJUSTRETURN) { - pstate |=3D PSTATE_C; + env->CF =3D 1; env->xregs[0] =3D -ret; } - pstate_write(env, pstate); break; =20 case EXCP_INTERRUPT: diff --git a/bsd-user/aarch64/target_arch_reg.h b/bsd-user/aarch64/target_a= rch_reg.h index 5c7154f0c1..b53302e7f7 100644 --- a/bsd-user/aarch64/target_arch_reg.h +++ b/bsd-user/aarch64/target_arch_reg.h @@ -31,7 +31,7 @@ typedef struct target_reg { } target_reg_t; =20 typedef struct target_fpreg { - __uint128_t fp_q[32]; + Int128 fp_q[32]; uint32_t fp_sr; uint32_t fp_cr; } target_fpreg_t; diff --git a/bsd-user/aarch64/target_arch_signal.h b/bsd-user/aarch64/targe= t_arch_signal.h index df17173316..bff752a67a 100644 --- a/bsd-user/aarch64/target_arch_signal.h +++ b/bsd-user/aarch64/target_arch_signal.h @@ -49,7 +49,7 @@ struct target_gpregs { }; =20 struct target_fpregs { - __uint128_t fp_q[32]; + Int128 fp_q[32]; uint32_t fp_sr; uint32_t fp_cr; uint32_t fp_flags; diff --git a/bsd-user/qemu.h b/bsd-user/qemu.h index 9d2fc7148e..3736c41786 100644 --- a/bsd-user/qemu.h +++ b/bsd-user/qemu.h @@ -17,6 +17,9 @@ #ifndef QEMU_H #define QEMU_H =20 +#include + +#include "qemu/int128.h" #include "cpu.h" #include "qemu/units.h" #include "exec/cpu_ldst.h" --=20 2.34.1