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Fri, 05 Jul 2024 08:31:00 -0700 (PDT) From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: qemu-devel@nongnu.org Cc: Richard Henderson , Akihiko Odaki , =?UTF-8?q?Alex=20Benn=C3=A9e?= , Peter Maydell , qemu-arm@nongnu.org (open list:ARM TCG CPUs) Subject: [PULL 12/40] tests/tcg/aarch64: Add -fno-integrated-as for sme Date: Fri, 5 Jul 2024 16:30:24 +0100 Message-Id: <20240705153052.1219696-13-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240705153052.1219696-1-alex.bennee@linaro.org> References: <20240705153052.1219696-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::12d; envelope-from=alex.bennee@linaro.org; helo=mail-lf1-x12d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1720193551424100001 From: Richard Henderson The only use of SME is inline assembly. Both gcc and clang only support SME with very recent releases; by deferring detection to the assembler we get better test coverage. Signed-off-by: Richard Henderson Reviewed-by: Akihiko Odaki Message-Id: <20240630190050.160642-8-richard.henderson@linaro.org> Signed-off-by: Alex Benn=C3=A9e Message-Id: <20240705084047.857176-13-alex.bennee@linaro.org> diff --git a/tests/tcg/aarch64/Makefile.target b/tests/tcg/aarch64/Makefile= .target index 11ccde5579..ad1774c2ce 100644 --- a/tests/tcg/aarch64/Makefile.target +++ b/tests/tcg/aarch64/Makefile.target @@ -20,6 +20,7 @@ run-fcvt: fcvt =20 config-cc.mak: Makefile $(quiet-@)( \ + fnia=3D`$(call cc-test,-fno-integrated-as) && echo -fno-integrated-as= `; \ $(call cc-option,-march=3Darmv8.1-a+sve, CROSS_CC_HAS_SVE); \ $(call cc-option,-march=3Darmv8.1-a+sve2, CROSS_CC_HAS_SVE2);= \ $(call cc-option,-march=3Darmv8.2-a, CROSS_CC_HAS_ARMV8_= 2); \ @@ -27,7 +28,7 @@ config-cc.mak: Makefile $(call cc-option,-march=3Darmv8.5-a, CROSS_CC_HAS_ARMV8_= 5); \ $(call cc-option,-mbranch-protection=3Dstandard, CROSS_CC_HAS_ARMV8_= BTI); \ $(call cc-option,-march=3Darmv8.5-a+memtag, CROSS_CC_HAS_ARMV8_= MTE); \ - $(call cc-option,-Wa$(COMMA)-march=3Darmv9-a+sme, CROSS_AS_HAS_ARMV9_= SME)) 3> config-cc.mak + $(call cc-option,-Wa$(COMMA)-march=3Darmv9-a+sme $$fnia, CROSS_AS_HAS= _ARMV9_SME)) 3> config-cc.mak -include config-cc.mak =20 ifneq ($(CROSS_CC_HAS_ARMV8_2),) --=20 2.39.2