From nobody Sun Nov 24 23:23:01 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1720108601588490.74817548794374; Thu, 4 Jul 2024 08:56:41 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sPOm7-0000mU-P7; Thu, 04 Jul 2024 11:53:35 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sPOm4-0000dg-Ty; Thu, 04 Jul 2024 11:53:32 -0400 Received: from isrv.corpit.ru ([86.62.121.231]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sPOm2-00026u-B5; Thu, 04 Jul 2024 11:53:32 -0400 Received: from tsrv.corpit.ru (tsrv.tls.msk.ru [192.168.177.2]) by isrv.corpit.ru (Postfix) with ESMTP id 0ED1F7749A; Thu, 4 Jul 2024 18:52:47 +0300 (MSK) Received: from tls.msk.ru (mjt.wg.tls.msk.ru [192.168.177.130]) by tsrv.corpit.ru (Postfix) with SMTP id C7632FEAE5; Thu, 4 Jul 2024 18:52:51 +0300 (MSK) Received: (nullmailer pid 1481705 invoked by uid 1000); Thu, 04 Jul 2024 15:52:51 -0000 From: Michael Tokarev To: qemu-devel@nongnu.org Cc: qemu-stable@nongnu.org, Chuang Xu , Guixiong Wei , Yipeng Yin , Zhao Liu , Paolo Bonzini , Michael Tokarev Subject: [Stable-8.2.6 12/18] i386/cpu: fixup number of addressable IDs for processor cores in the physical package Date: Thu, 4 Jul 2024 18:52:43 +0300 Message-Id: <20240704155251.1481617-12-mjt@tls.msk.ru> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=86.62.121.231; envelope-from=mjt@tls.msk.ru; helo=isrv.corpit.ru X-Spam_score_int: -68 X-Spam_score: -6.9 X-Spam_bar: ------ X-Spam_report: (-6.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_HI=-5, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1720108601961100001 Content-Type: text/plain; charset="utf-8" From: Chuang Xu When QEMU is started with: -cpu host,host-cache-info=3Don,l3-cache=3Doff \ -smp 2,sockets=3D1,dies=3D1,cores=3D1,threads=3D2 Guest can't acquire maximum number of addressable IDs for processor cores in the physical package from CPUID[04H]. When creating a CPU topology of 1 core per package, host-cache-info only uses the Host's addressable core IDs field (CPUID.04H.EAX[bits 31-26]), resulting in a conflict (on the multicore Host) between the Guest core topology information in this field and the Guest's actual cores number. Fix it by removing the unnecessary condition to cover 1 core per package case. This is safe because cores_per_pkg will not be 0 and will be at least 1. Fixes: d7caf13b5fcf ("x86: cpu: fixup number of addressable IDs for logical= processors sharing cache") Signed-off-by: Guixiong Wei Signed-off-by: Yipeng Yin Signed-off-by: Chuang Xu Reviewed-by: Zhao Liu Message-ID: <20240611032314.64076-1-xuchuangxclwt@bytedance.com> Signed-off-by: Paolo Bonzini (cherry picked from commit 903916f0a017fe4b7789f1c6c6982333a5a71876) Signed-off-by: Michael Tokarev (Mjt: fixup for 8.2 due to other changes in this area past 9.0) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 4dbfbfbd65..8f318a5dc3 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -6097,10 +6097,8 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index,= uint32_t count, if (*eax & 31) { int host_vcpus_per_cache =3D 1 + ((*eax & 0x3FFC000) >> 14= ); int vcpus_per_socket =3D cs->nr_cores * cs->nr_threads; - if (cs->nr_cores > 1) { - *eax &=3D ~0xFC000000; - *eax |=3D (pow2ceil(cs->nr_cores) - 1) << 26; - } + *eax &=3D ~0xFC000000; + *eax |=3D (pow2ceil(cs->nr_cores) - 1) << 26; if (host_vcpus_per_cache > vcpus_per_socket) { *eax &=3D ~0x3FFC000; *eax |=3D (pow2ceil(vcpus_per_socket) - 1) << 14; --=20 2.39.2