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[174.21.76.141]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2c91d3e7d7bsm11070030a91.47.2024.07.03.10.42.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Jul 2024 10:42:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1720028549; x=1720633349; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=EnxIQkGUi2BYtKcUGzQDYlf64W/Zr3vE/ZFzoUY3DEc=; b=Hl9tSlaR+CSvJsvwE/cB1RTj535JwahLHOIua4/xUHMkQnI3jZyyZuP7IstoDQbPNQ cnoCbcNYOQwYEVKiQHvfMi7ayfwrvPJhKdjYKJGAWTtSPE1C/K6Mr55g5tHm82Lj1La8 8U2m2vrQHeQWnBoh45Gh6xY0wdwpLoI6tmWMPYOyi8N0EL8lbOoOSzqy15r+Tc2tbn7x 7W7UPapvVwNRVZ4D10AXgTv9aMoZsa3gA5h0MRNc4Dm/jguDa0vo4MJpUOsaIvfob9RN KkHQeIY9XVD+mZ5Xpbz0g1Ax9SFD4v0RYMQ6WZ+C4a35oDCWZUAAvx/R0igQIepz6027 VMCQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1720028549; x=1720633349; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=EnxIQkGUi2BYtKcUGzQDYlf64W/Zr3vE/ZFzoUY3DEc=; b=KTb+KWvqphYIytSaFaRXe3KMPjAqaQG0fcIcXF6QIXt9iZR/GRmvAvOjoIFexuvgjz 3k+4n0UKl9dHXGS/j4xYrx+ha/oHvEMLCE5PYVfzpazl7RoMTk4kGQOD17MYfL+lqqod +aDYUMwFhETwFFB9hzcd95/FEDB4yd6zjtACA4V+C1BewAOsUjiO5eOXTisJVE7J+zd/ xcTPwb9ikebEveH+wXACEiOl7u37PcY8aTaTx8X7znFlccQdiWKeAweTmUJqSOJvXwDb YdTBEpUGtgKeRpj5cYu8eCD4+20FquzyHbkO12Bo64q8yN1/1mOPFQYlec2280aFHa2I JjnQ== X-Gm-Message-State: AOJu0Yyq8QFguweQU4eE0U4f+/tbS18jhW0Vv/xr+YcWHouap4Gbp0d9 CnILIG8VVUUIHiFWcz3X3oaq2mmvzkqfp0/U2oVLlsKbEWofsgCmzwhYP/0ctt+5jDBdnbKjCZ1 H X-Google-Smtp-Source: AGHT+IFBQUKQglZl9IfJW3f2KwwqeOQtops/qhoSKf+KR1PSz2x5h4Gdkg9I4sw4BYCRpOc1+UWgaA== X-Received: by 2002:a17:90b:4f8f:b0:2c8:7330:68b3 with SMTP id 98e67ed59e1d1-2c93d767f2bmr8007980a91.39.1720028548809; Wed, 03 Jul 2024 10:42:28 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Brad Smith Subject: [PULL 1/7] util/cpuinfo-ppc: Fix building on OpenBSD Date: Wed, 3 Jul 2024 10:42:20 -0700 Message-Id: <20240703174226.2117169-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240703174226.2117169-1-richard.henderson@linaro.org> References: <20240703174226.2117169-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102a; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1720028637322100006 Content-Type: text/plain; charset="utf-8" From: Brad Smith OpenBSD does not support AT_HWCAP. Signed-off-by: Brad Smith Message-Id: Signed-off-by: Richard Henderson --- util/cpuinfo-ppc.c | 20 ++++++++++++-------- 1 file changed, 12 insertions(+), 8 deletions(-) diff --git a/util/cpuinfo-ppc.c b/util/cpuinfo-ppc.c index b2d8893a06..47af55aa0c 100644 --- a/util/cpuinfo-ppc.c +++ b/util/cpuinfo-ppc.c @@ -6,11 +6,13 @@ #include "qemu/osdep.h" #include "host/cpuinfo.h" =20 -#include -#ifdef CONFIG_GETAUXVAL -# include -#else -# include "elf.h" +#ifdef CONFIG_LINUX +# include +# ifdef CONFIG_GETAUXVAL +# include +# else +# include "elf.h" +# endif #endif =20 unsigned cpuinfo; @@ -19,16 +21,17 @@ unsigned cpuinfo; unsigned __attribute__((constructor)) cpuinfo_init(void) { unsigned info =3D cpuinfo; - unsigned long hwcap, hwcap2; =20 if (info) { return info; } =20 - hwcap =3D qemu_getauxval(AT_HWCAP); - hwcap2 =3D qemu_getauxval(AT_HWCAP2); info =3D CPUINFO_ALWAYS; =20 +#ifdef CONFIG_LINUX + unsigned long hwcap =3D qemu_getauxval(AT_HWCAP); + unsigned long hwcap2 =3D qemu_getauxval(AT_HWCAP2); + /* Version numbers are monotonic, and so imply all lower versions. */ if (hwcap2 & PPC_FEATURE2_ARCH_3_1) { info |=3D CPUINFO_V3_1 | CPUINFO_V3_0 | CPUINFO_V2_07 | CPUINFO_V2= _06; @@ -58,6 +61,7 @@ unsigned __attribute__((constructor)) cpuinfo_init(void) } } } +#endif =20 cpuinfo =3D info; return info; --=20 2.34.1 From nobody Sun Nov 24 20:42:08 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1720028607; cv=none; d=zohomail.com; s=zohoarc; b=MnzPyhVXSW1xhmsDN8lsp9sduQr4VrUmJW4tn8IcjWbRQ+Zm9jB3N99XvANRp0JbiDL/Fqn+FfTYJ+hYOlqGKVo9HIiKLREtI6zLMvrb+mD/ieKJhmIRJhHzUqC18ybH6DiC68O8/fpBPU5pJBECXwRCOzZxk9+GKku5pzu5rd0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1720028607; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=ALTg/zUrt2COBtOO9DjvL7voDCkhzi+Pxaozp6yG5io=; b=FbXLFRonGTsbOVRW3DZwj6rbXF761KEleFWO/rX9LNhY9RZid22toEgPcgszD7n7l3ANAv29YTF6A14X7ANBKXEVbHevt7VoKt1sO1j4Y6BrIQMFyaJlxJEV6fFetrhFPqbwE+Zh8hxTJG9/04/rAQRZ278Vcx0Ei2yX3fEfa5g= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1720028607713551.1123149795964; Wed, 3 Jul 2024 10:43:27 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sP406-0003ID-7x; Wed, 03 Jul 2024 13:42:38 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sP404-0003HP-5K for qemu-devel@nongnu.org; Wed, 03 Jul 2024 13:42:36 -0400 Received: from mail-pj1-x1029.google.com ([2607:f8b0:4864:20::1029]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sP400-0005LA-1c for qemu-devel@nongnu.org; Wed, 03 Jul 2024 13:42:33 -0400 Received: by mail-pj1-x1029.google.com with SMTP id 98e67ed59e1d1-2c95ca60719so1562168a91.3 for ; Wed, 03 Jul 2024 10:42:30 -0700 (PDT) Received: from stoup.. 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1029; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1029.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1720028609205100005 Content-Type: text/plain; charset="utf-8" From: Brad Smith Signed-off-by: Brad Smith Message-Id: Signed-off-by: Richard Henderson --- util/cpuinfo-ppc.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/util/cpuinfo-ppc.c b/util/cpuinfo-ppc.c index 47af55aa0c..1304f9aa80 100644 --- a/util/cpuinfo-ppc.c +++ b/util/cpuinfo-ppc.c @@ -14,6 +14,13 @@ # include "elf.h" # endif #endif +#ifdef __FreeBSD__ +# include +# ifndef PPC_FEATURE2_ARCH_3_1 +# define PPC_FEATURE2_ARCH_3_1 0 +# endif +# define PPC_FEATURE2_VEC_CRYPTO PPC_FEATURE2_HAS_VEC_CRYPTO +#endif =20 unsigned cpuinfo; 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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1032; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1032.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, T_SPF_TEMPERROR=0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1720028653407100006 Content-Type: text/plain; charset="utf-8" From: Brad Smith Signed-off-by: Brad Smith Reviewed-by: Richard Henderson Message-Id: Signed-off-by: Richard Henderson --- util/cpuinfo-aarch64.c | 36 ++++++++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/util/cpuinfo-aarch64.c b/util/cpuinfo-aarch64.c index 4c8a005715..8ca775a14b 100644 --- a/util/cpuinfo-aarch64.c +++ b/util/cpuinfo-aarch64.c @@ -20,6 +20,12 @@ #ifdef CONFIG_DARWIN # include #endif +#ifdef __OpenBSD__ +# include +# include +# include +# include +#endif =20 unsigned cpuinfo; =20 @@ -72,6 +78,36 @@ unsigned __attribute__((constructor)) cpuinfo_init(void) info |=3D sysctl_for_bool("hw.optional.arm.FEAT_PMULL") * CPUINFO_PMUL= L; info |=3D sysctl_for_bool("hw.optional.arm.FEAT_BTI") * CPUINFO_BTI; #endif +#ifdef __OpenBSD__ + int mib[2]; + uint64_t isar0; + uint64_t pfr1; + size_t len; + + mib[0] =3D CTL_MACHDEP; + mib[1] =3D CPU_ID_AA64ISAR0; + len =3D sizeof(isar0); + if (sysctl(mib, 2, &isar0, &len, NULL, 0) !=3D -1) { + if (ID_AA64ISAR0_ATOMIC(isar0) >=3D ID_AA64ISAR0_ATOMIC_IMPL) { + info |=3D CPUINFO_LSE; + } + if (ID_AA64ISAR0_AES(isar0) >=3D ID_AA64ISAR0_AES_BASE) { + info |=3D CPUINFO_AES; + } + if (ID_AA64ISAR0_AES(isar0) >=3D ID_AA64ISAR0_AES_PMULL) { + info |=3D CPUINFO_PMULL; + } + } + + mib[0] =3D CTL_MACHDEP; + mib[1] =3D CPU_ID_AA64PFR1; + len =3D sizeof(pfr1); + if (sysctl(mib, 2, &pfr1, &len, NULL, 0) !=3D -1) { + if (ID_AA64PFR1_BT(pfr1) >=3D ID_AA64PFR1_BT_IMPL) { + info |=3D CPUINFO_BTI; + } + } +#endif =20 cpuinfo =3D info; return info; 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[174.21.76.141]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2c91d3e7d7bsm11070030a91.47.2024.07.03.10.42.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Jul 2024 10:42:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1720028552; x=1720633352; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=yFLNxHH6cGzkvzUK9B1ot5V5ip1l2lOMLYmyA2S0Pvc=; b=Lu6Ot8vqIz1h0Ezps2obHN6nRWDAzkxHgUHeYtt/1a6r9+L6mf2ctiOcsoyK4Nt2d6 KO3wvNT88RpGMtZpgmKo0FVCpFp9vBwaJp+bJ7AxZ7c9aBjUpXSx+9KX6sSEDulJO8Y6 MmCCkgVNYp7pEr8r8/cVVHZXQ28QXfjQVxovcFI+SBMsdS5t26q0wiBC+pCLxgz6//SE mHJjfxOvTrSp9lPxZ9wqXEukLrf6gg3CtzK7hTY4Phc6mvwRNbUi8GvJy5lMnj0m2uhE KMQfan0sShcEJs82YqtlODQavv9zBcEn06P0h8YltscqVPrNBeOFp2wKDXjAUZVqPp09 yg8w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1720028552; x=1720633352; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=yFLNxHH6cGzkvzUK9B1ot5V5ip1l2lOMLYmyA2S0Pvc=; b=lOF+q+DafW0VHuPts0Y5hRZIvBsMdCxVnKIINzVUS5jgotTMBjbqygh6R7mP/d4UXH J/EeijaG7zXOoN0pnYubQtnDLQTqcqI8gWj82C+avTCD3wiQo+HT6E9IGD83YBtv+Thv fs4KUI1o2zDCdkueyJC/r7s1fmKeG2g0DFdAW/QbFdVgk10SDaw+wV0eoyTc1WWwcE+z lbYA9T64UZUgNt5zhyKOxKockPaCqczygYuIbw+VqA3LIcaqz+EOxVMIuch5x3OIi55x H6YKPwiht/5COuVpwdusFpTJAebVaFOhkvPgQYSgklSuGgyp/rDKvNUkfRex0QCHw5tM nlpQ== X-Gm-Message-State: AOJu0YxSTkVty+Ow7r8XQ0V4lEd+GlbFUTjYaNxiMqCWU0U+ygoBuez/ Q84/hmyVrQ4BgQvQ/E9ClndUSdMbN1zxiErlrPcM91csN5JVrUZuuiN240INdeDRH7zcRaYh5sI U X-Google-Smtp-Source: AGHT+IHHWa3v8PbTXlUV+7PQSn9VV+GIMJTwjGimpdUKJQIqYhGGgvzCzuezNjo3sdxEC/TBDkUOew== X-Received: by 2002:a17:90b:3787:b0:2c7:f3de:27ef with SMTP id 98e67ed59e1d1-2c93d7b13a6mr8585905a91.42.1720028551711; Wed, 03 Jul 2024 10:42:31 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: LIU Zhiwei , Alistair Francis , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Daniel Henrique Barboza Subject: [PULL 4/7] util/cpuinfo-riscv: Support host/cpuinfo.h for riscv Date: Wed, 3 Jul 2024 10:42:23 -0700 Message-Id: <20240703174226.2117169-5-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240703174226.2117169-1-richard.henderson@linaro.org> References: <20240703174226.2117169-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::102a; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1720028671536100006 Move detection code out of tcg, similar to other hosts. Reviewed-by: LIU Zhiwei Reviewed-by: Alistair Francis Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Daniel Henrique Barboza Signed-off-by: Richard Henderson --- host/include/riscv/host/cpuinfo.h | 23 +++++++++ tcg/riscv/tcg-target.h | 46 ++++++++--------- util/cpuinfo-riscv.c | 85 +++++++++++++++++++++++++++++++ tcg/riscv/tcg-target.c.inc | 84 +++--------------------------- util/meson.build | 2 + 5 files changed, 139 insertions(+), 101 deletions(-) create mode 100644 host/include/riscv/host/cpuinfo.h create mode 100644 util/cpuinfo-riscv.c diff --git a/host/include/riscv/host/cpuinfo.h b/host/include/riscv/host/cp= uinfo.h new file mode 100644 index 0000000000..2b00660e36 --- /dev/null +++ b/host/include/riscv/host/cpuinfo.h @@ -0,0 +1,23 @@ +/* + * SPDX-License-Identifier: GPL-2.0-or-later + * Host specific cpu identification for RISC-V. + */ + +#ifndef HOST_CPUINFO_H +#define HOST_CPUINFO_H + +#define CPUINFO_ALWAYS (1u << 0) /* so cpuinfo is nonzero */ +#define CPUINFO_ZBA (1u << 1) +#define CPUINFO_ZBB (1u << 2) +#define CPUINFO_ZICOND (1u << 3) + +/* Initialized with a constructor. */ +extern unsigned cpuinfo; + +/* + * We cannot rely on constructor ordering, so other constructors must + * use the function interface rather than the variable above. + */ +unsigned cpuinfo_init(void); + +#endif /* HOST_CPUINFO_H */ diff --git a/tcg/riscv/tcg-target.h b/tcg/riscv/tcg-target.h index 2c1b680b93..1a347eaf6e 100644 --- a/tcg/riscv/tcg-target.h +++ b/tcg/riscv/tcg-target.h @@ -25,6 +25,8 @@ #ifndef RISCV_TCG_TARGET_H #define RISCV_TCG_TARGET_H =20 +#include "host/cpuinfo.h" + #define TCG_TARGET_INSN_UNIT_SIZE 4 #define TCG_TARGET_NB_REGS 32 #define MAX_CODE_GEN_BUFFER_SIZE ((size_t)-1) @@ -80,18 +82,12 @@ typedef enum { #define TCG_TARGET_CALL_ARG_I128 TCG_CALL_ARG_NORMAL #define TCG_TARGET_CALL_RET_I128 TCG_CALL_RET_NORMAL =20 -#if defined(__riscv_arch_test) && defined(__riscv_zbb) -# define have_zbb true -#else -extern bool have_zbb; -#endif - /* optional instructions */ #define TCG_TARGET_HAS_negsetcond_i32 1 #define TCG_TARGET_HAS_div_i32 1 #define TCG_TARGET_HAS_rem_i32 1 #define TCG_TARGET_HAS_div2_i32 0 -#define TCG_TARGET_HAS_rot_i32 have_zbb +#define TCG_TARGET_HAS_rot_i32 (cpuinfo & CPUINFO_ZBB) #define TCG_TARGET_HAS_deposit_i32 0 #define TCG_TARGET_HAS_extract_i32 0 #define TCG_TARGET_HAS_sextract_i32 0 @@ -106,17 +102,17 @@ extern bool have_zbb; #define TCG_TARGET_HAS_ext16s_i32 1 #define TCG_TARGET_HAS_ext8u_i32 1 #define TCG_TARGET_HAS_ext16u_i32 1 -#define TCG_TARGET_HAS_bswap16_i32 have_zbb -#define TCG_TARGET_HAS_bswap32_i32 have_zbb +#define TCG_TARGET_HAS_bswap16_i32 (cpuinfo & CPUINFO_ZBB) +#define TCG_TARGET_HAS_bswap32_i32 (cpuinfo & CPUINFO_ZBB) #define TCG_TARGET_HAS_not_i32 1 -#define TCG_TARGET_HAS_andc_i32 have_zbb -#define TCG_TARGET_HAS_orc_i32 have_zbb -#define TCG_TARGET_HAS_eqv_i32 have_zbb +#define TCG_TARGET_HAS_andc_i32 (cpuinfo & CPUINFO_ZBB) +#define TCG_TARGET_HAS_orc_i32 (cpuinfo & CPUINFO_ZBB) +#define TCG_TARGET_HAS_eqv_i32 (cpuinfo & CPUINFO_ZBB) #define TCG_TARGET_HAS_nand_i32 0 #define TCG_TARGET_HAS_nor_i32 0 -#define TCG_TARGET_HAS_clz_i32 have_zbb -#define TCG_TARGET_HAS_ctz_i32 have_zbb -#define TCG_TARGET_HAS_ctpop_i32 have_zbb +#define TCG_TARGET_HAS_clz_i32 (cpuinfo & CPUINFO_ZBB) +#define TCG_TARGET_HAS_ctz_i32 (cpuinfo & CPUINFO_ZBB) +#define TCG_TARGET_HAS_ctpop_i32 (cpuinfo & CPUINFO_ZBB) #define TCG_TARGET_HAS_brcond2 1 #define TCG_TARGET_HAS_setcond2 1 #define TCG_TARGET_HAS_qemu_st8_i32 0 @@ -125,7 +121,7 @@ extern bool have_zbb; #define TCG_TARGET_HAS_div_i64 1 #define TCG_TARGET_HAS_rem_i64 1 #define TCG_TARGET_HAS_div2_i64 0 -#define TCG_TARGET_HAS_rot_i64 have_zbb +#define TCG_TARGET_HAS_rot_i64 (cpuinfo & CPUINFO_ZBB) #define TCG_TARGET_HAS_deposit_i64 0 #define TCG_TARGET_HAS_extract_i64 0 #define TCG_TARGET_HAS_sextract_i64 0 @@ -137,18 +133,18 @@ extern bool have_zbb; #define TCG_TARGET_HAS_ext8u_i64 1 #define TCG_TARGET_HAS_ext16u_i64 1 #define TCG_TARGET_HAS_ext32u_i64 1 -#define TCG_TARGET_HAS_bswap16_i64 have_zbb -#define TCG_TARGET_HAS_bswap32_i64 have_zbb -#define TCG_TARGET_HAS_bswap64_i64 have_zbb +#define TCG_TARGET_HAS_bswap16_i64 (cpuinfo & CPUINFO_ZBB) +#define TCG_TARGET_HAS_bswap32_i64 (cpuinfo & CPUINFO_ZBB) +#define TCG_TARGET_HAS_bswap64_i64 (cpuinfo & CPUINFO_ZBB) #define TCG_TARGET_HAS_not_i64 1 -#define TCG_TARGET_HAS_andc_i64 have_zbb -#define TCG_TARGET_HAS_orc_i64 have_zbb -#define TCG_TARGET_HAS_eqv_i64 have_zbb +#define TCG_TARGET_HAS_andc_i64 (cpuinfo & CPUINFO_ZBB) +#define TCG_TARGET_HAS_orc_i64 (cpuinfo & CPUINFO_ZBB) +#define TCG_TARGET_HAS_eqv_i64 (cpuinfo & CPUINFO_ZBB) #define TCG_TARGET_HAS_nand_i64 0 #define TCG_TARGET_HAS_nor_i64 0 -#define TCG_TARGET_HAS_clz_i64 have_zbb -#define TCG_TARGET_HAS_ctz_i64 have_zbb -#define TCG_TARGET_HAS_ctpop_i64 have_zbb +#define TCG_TARGET_HAS_clz_i64 (cpuinfo & CPUINFO_ZBB) +#define TCG_TARGET_HAS_ctz_i64 (cpuinfo & CPUINFO_ZBB) +#define TCG_TARGET_HAS_ctpop_i64 (cpuinfo & CPUINFO_ZBB) #define TCG_TARGET_HAS_add2_i64 1 #define TCG_TARGET_HAS_sub2_i64 1 #define TCG_TARGET_HAS_mulu2_i64 0 diff --git a/util/cpuinfo-riscv.c b/util/cpuinfo-riscv.c new file mode 100644 index 0000000000..1236ee5fa4 --- /dev/null +++ b/util/cpuinfo-riscv.c @@ -0,0 +1,85 @@ +/* + * SPDX-License-Identifier: GPL-2.0-or-later + * Host specific cpu identification for RISC-V. + */ + +#include "qemu/osdep.h" +#include "host/cpuinfo.h" + +unsigned cpuinfo; +static volatile sig_atomic_t got_sigill; + +static void sigill_handler(int signo, siginfo_t *si, void *data) +{ + /* Skip the faulty instruction */ + ucontext_t *uc =3D (ucontext_t *)data; + uc->uc_mcontext.__gregs[REG_PC] +=3D 4; + + got_sigill =3D 1; +} + +/* Called both as constructor and (possibly) via other constructors. */ +unsigned __attribute__((constructor)) cpuinfo_init(void) +{ + unsigned left =3D CPUINFO_ZBA | CPUINFO_ZBB | CPUINFO_ZICOND; + unsigned info =3D cpuinfo; + + if (info) { + return info; + } + + /* Test for compile-time settings. */ +#if defined(__riscv_arch_test) && defined(__riscv_zba) + info |=3D CPUINFO_ZBA; +#endif +#if defined(__riscv_arch_test) && defined(__riscv_zbb) + info |=3D CPUINFO_ZBB; +#endif +#if defined(__riscv_arch_test) && defined(__riscv_zicond) + info |=3D CPUINFO_ZICOND; +#endif + left &=3D ~info; + + if (left) { + struct sigaction sa_old, sa_new; + + memset(&sa_new, 0, sizeof(sa_new)); + sa_new.sa_flags =3D SA_SIGINFO; + sa_new.sa_sigaction =3D sigill_handler; + sigaction(SIGILL, &sa_new, &sa_old); + + if (left & CPUINFO_ZBA) { + /* Probe for Zba: add.uw zero,zero,zero. */ + got_sigill =3D 0; + asm volatile(".insn r 0x3b, 0, 0x04, zero, zero, zero" + : : : "memory"); + info |=3D got_sigill ? 0 : CPUINFO_ZBA; + left &=3D ~CPUINFO_ZBA; + } + + if (left & CPUINFO_ZBB) { + /* Probe for Zbb: andn zero,zero,zero. */ + got_sigill =3D 0; + asm volatile(".insn r 0x33, 7, 0x20, zero, zero, zero" + : : : "memory"); + info |=3D got_sigill ? 0 : CPUINFO_ZBB; + left &=3D ~CPUINFO_ZBB; + } + + if (left & CPUINFO_ZICOND) { + /* Probe for Zicond: czero.eqz zero,zero,zero. */ + got_sigill =3D 0; + asm volatile(".insn r 0x33, 5, 0x07, zero, zero, zero" + : : : "memory"); + info |=3D got_sigill ? 0 : CPUINFO_ZICOND; + left &=3D ~CPUINFO_ZICOND; + } + + sigaction(SIGILL, &sa_old, NULL); + assert(left =3D=3D 0); + } + + info |=3D CPUINFO_ALWAYS; + cpuinfo =3D info; + return info; +} diff --git a/tcg/riscv/tcg-target.c.inc b/tcg/riscv/tcg-target.c.inc index 639363039b..d334857226 100644 --- a/tcg/riscv/tcg-target.c.inc +++ b/tcg/riscv/tcg-target.c.inc @@ -113,20 +113,6 @@ static const int tcg_target_call_iarg_regs[] =3D { TCG_REG_A7, }; =20 -#ifndef have_zbb -bool have_zbb; -#endif -#if defined(__riscv_arch_test) && defined(__riscv_zba) -# define have_zba true -#else -static bool have_zba; -#endif -#if defined(__riscv_arch_test) && defined(__riscv_zicond) -# define have_zicond true -#else -static bool have_zicond; -#endif - static TCGReg tcg_target_call_oarg_reg(TCGCallReturnKind kind, int slot) { tcg_debug_assert(kind =3D=3D TCG_CALL_RET_NORMAL); @@ -594,7 +580,7 @@ static void tcg_out_ext8u(TCGContext *s, TCGReg ret, TC= GReg arg) =20 static void tcg_out_ext16u(TCGContext *s, TCGReg ret, TCGReg arg) { - if (have_zbb) { + if (cpuinfo & CPUINFO_ZBB) { tcg_out_opc_reg(s, OPC_ZEXT_H, ret, arg, TCG_REG_ZERO); } else { tcg_out_opc_imm(s, OPC_SLLIW, ret, arg, 16); @@ -604,7 +590,7 @@ static void tcg_out_ext16u(TCGContext *s, TCGReg ret, T= CGReg arg) =20 static void tcg_out_ext32u(TCGContext *s, TCGReg ret, TCGReg arg) { - if (have_zba) { + if (cpuinfo & CPUINFO_ZBA) { tcg_out_opc_reg(s, OPC_ADD_UW, ret, arg, TCG_REG_ZERO); } else { tcg_out_opc_imm(s, OPC_SLLI, ret, arg, 32); @@ -614,7 +600,7 @@ static void tcg_out_ext32u(TCGContext *s, TCGReg ret, T= CGReg arg) =20 static void tcg_out_ext8s(TCGContext *s, TCGType type, TCGReg ret, TCGReg = arg) { - if (have_zbb) { + if (cpuinfo & CPUINFO_ZBB) { tcg_out_opc_imm(s, OPC_SEXT_B, ret, arg, 0); } else { tcg_out_opc_imm(s, OPC_SLLIW, ret, arg, 24); @@ -624,7 +610,7 @@ static void tcg_out_ext8s(TCGContext *s, TCGType type, = TCGReg ret, TCGReg arg) =20 static void tcg_out_ext16s(TCGContext *s, TCGType type, TCGReg ret, TCGReg= arg) { - if (have_zbb) { + if (cpuinfo & CPUINFO_ZBB) { tcg_out_opc_imm(s, OPC_SEXT_H, ret, arg, 0); } else { tcg_out_opc_imm(s, OPC_SLLIW, ret, arg, 16); @@ -1080,7 +1066,7 @@ static void tcg_out_movcond(TCGContext *s, TCGCond co= nd, TCGReg ret, int tmpflags; TCGReg t; =20 - if (!have_zicond && (!c_cmp2 || cmp2 =3D=3D 0)) { + if (!(cpuinfo & CPUINFO_ZICOND) && (!c_cmp2 || cmp2 =3D=3D 0)) { tcg_out_movcond_br2(s, cond, ret, cmp1, cmp2, val1, c_val1, val2, c_val2); return; @@ -1089,7 +1075,7 @@ static void tcg_out_movcond(TCGContext *s, TCGCond co= nd, TCGReg ret, tmpflags =3D tcg_out_setcond_int(s, cond, TCG_REG_TMP0, cmp1, cmp2, c_= cmp2); t =3D tmpflags & ~SETCOND_FLAGS; =20 - if (have_zicond) { + if (cpuinfo & CPUINFO_ZICOND) { if (tmpflags & SETCOND_INV) { tcg_out_movcond_zicond(s, ret, t, val2, c_val2, val1, c_val1); } else { @@ -1304,7 +1290,7 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext= *s, TCGReg *pbase, /* TLB Hit - translate address using addend. */ if (addr_type !=3D TCG_TYPE_I32) { tcg_out_opc_reg(s, OPC_ADD, TCG_REG_TMP0, addr_reg, TCG_REG_TM= P2); - } else if (have_zba) { + } else if (cpuinfo & CPUINFO_ZBA) { tcg_out_opc_reg(s, OPC_ADD_UW, TCG_REG_TMP0, addr_reg, TCG_REG_TMP2); } else { @@ -1335,7 +1321,7 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext= *s, TCGReg *pbase, if (addr_type !=3D TCG_TYPE_I32) { tcg_out_opc_reg(s, OPC_ADD, base, addr_reg, TCG_GUEST_BASE_REG); - } else if (have_zba) { + } else if (cpuinfo & CPUINFO_ZBA) { tcg_out_opc_reg(s, OPC_ADD_UW, base, addr_reg, TCG_GUEST_BASE_REG); } else { @@ -2110,62 +2096,8 @@ static void tcg_out_tb_start(TCGContext *s) /* nothing to do */ } =20 -static volatile sig_atomic_t got_sigill; - -static void sigill_handler(int signo, siginfo_t *si, void *data) -{ - /* Skip the faulty instruction */ - ucontext_t *uc =3D (ucontext_t *)data; - uc->uc_mcontext.__gregs[REG_PC] +=3D 4; - - got_sigill =3D 1; -} - -static void tcg_target_detect_isa(void) -{ -#if !defined(have_zba) || !defined(have_zbb) || !defined(have_zicond) - /* - * TODO: It is expected that this will be determinable via - * linux riscv_hwprobe syscall, not yet merged. - * In the meantime, test via sigill. - */ - - struct sigaction sa_old, sa_new; - - memset(&sa_new, 0, sizeof(sa_new)); - sa_new.sa_flags =3D SA_SIGINFO; - sa_new.sa_sigaction =3D sigill_handler; - sigaction(SIGILL, &sa_new, &sa_old); - -#ifndef have_zba - /* Probe for Zba: add.uw zero,zero,zero. */ - got_sigill =3D 0; - asm volatile(".insn r 0x3b, 0, 0x04, zero, zero, zero" : : : "memory"); - have_zba =3D !got_sigill; -#endif - -#ifndef have_zbb - /* Probe for Zba: andn zero,zero,zero. */ - got_sigill =3D 0; - asm volatile(".insn r 0x33, 7, 0x20, zero, zero, zero" : : : "memory"); - have_zbb =3D !got_sigill; -#endif - -#ifndef have_zicond - /* Probe for Zicond: czero.eqz zero,zero,zero. */ - got_sigill =3D 0; - asm volatile(".insn r 0x33, 5, 0x07, zero, zero, zero" : : : "memory"); - have_zicond =3D !got_sigill; -#endif - - sigaction(SIGILL, &sa_old, NULL); -#endif -} - static void tcg_target_init(TCGContext *s) { - tcg_target_detect_isa(); - tcg_target_available_regs[TCG_TYPE_I32] =3D 0xffffffff; tcg_target_available_regs[TCG_TYPE_I64] =3D 0xffffffff; =20 diff --git a/util/meson.build b/util/meson.build index 72b505df11..5d8bef9891 100644 --- a/util/meson.build +++ b/util/meson.build @@ -127,4 +127,6 @@ elif cpu =3D=3D 'loongarch64' util_ss.add(files('cpuinfo-loongarch.c')) elif cpu in ['ppc', 'ppc64'] util_ss.add(files('cpuinfo-ppc.c')) +elif cpu in ['riscv32', 'riscv64'] + util_ss.add(files('cpuinfo-riscv.c')) endif --=20 2.34.1 From nobody Sun Nov 24 20:42:08 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62e; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1720028653371100005 Reported-by: Brad Smith Reviewed-by: Philippe Mathieu-Daud=C3=A9 Acked-by: Daniel Henrique Barboza Acked-by: Alistair Francis Signed-off-by: Richard Henderson --- util/cpuinfo-riscv.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/util/cpuinfo-riscv.c b/util/cpuinfo-riscv.c index 1236ee5fa4..7dcfbee2ab 100644 --- a/util/cpuinfo-riscv.c +++ b/util/cpuinfo-riscv.c @@ -13,7 +13,14 @@ static void sigill_handler(int signo, siginfo_t *si, voi= d *data) { /* Skip the faulty instruction */ ucontext_t *uc =3D (ucontext_t *)data; + +#ifdef __linux__ uc->uc_mcontext.__gregs[REG_PC] +=3D 4; +#elif defined(__OpenBSD__) + uc->sc_sepc +=3D 4; +#else +# error Unsupported OS +#endif =20 got_sigill =3D 1; } --=20 2.34.1 From nobody Sun Nov 24 20:42:08 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1720028635; cv=none; d=zohomail.com; s=zohoarc; b=kAYfAlxO0XUuQxKNy3mAnGZA0EH6RCJYsfs/r2CdJDVqXk2JAm5qpD2DFiokTdksgffJlC5VjmaVDFI9R36HXHBLLQO2GECJW1jPGO4IOloQ9tDBPKBccNvkeMoElsKtUp4d1vSE3DxvqIpcaJXuT5s/WriyOyl9PgSJzD1gjDg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1720028635; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; 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[174.21.76.141]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2c91d3e7d7bsm11070030a91.47.2024.07.03.10.42.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Jul 2024 10:42:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1720028554; x=1720633354; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=7R7OJJiu7/4ltitIhcOKEZN8yuDpc4Bx0+hw02RzbL8=; b=gpC6xX1tTOi4L1sgLfED/zN96kolyJ6bY67FuzYRZPbhDC8tsDTQH9mOnemaJ0oDSY nX/1Zh00YB6BD7o+FK6qkiagA+QJC59x4CVMjjbFC/k/jtSUtsYOkOzFt+mYwCDuMAZi L6ULgRMGAMqdod8TGD1dzyHjcOVhYBbXfRjVPw+kdgTK0UTlgiCen+mi5giGzZNILApm yq/BdaYQmCJNPF0bah4ss/RM4YbKz8oWauNLaNH8eFgdqz/+kpQ1+MKGMam78c+sjnBE aUmMPy9R6kXaRKohlCqG8RvVb4IbotyHn0nZxRp1xEZgp3HzEEqXMvlXRsm1GOg7D3UE qNYA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1720028554; x=1720633354; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=7R7OJJiu7/4ltitIhcOKEZN8yuDpc4Bx0+hw02RzbL8=; b=Flmu8GRMcGDPGcE7eLxPjf4hW7lyxMCfdwGpyOJapfve2cEZfUKiiP89wfV2n0SDNT MzsJqoenRzrf/qIPh+HgDHi6GJRVVCvyerIdB5ouah4pcOqqBHq0TGwXNB7ev7Pnd7OC goJL0p3gVBTzQmB7QZV5K8cKLmIDz0Fq6mZtoTLnwg0pjF2yAhX3fdoWDZ0az/ldrFgz w69XZjhVIbQO0wGl8DXY2ueJI/wQlGhRI9jja3VYSvcZFpwv0djoNEDXmBRkHrZG2f+G cOjoqRLSPklVEKitCtDcTMwREOc2rIMnc2OFZVmFFcCDswTj0kqrwC+tXU8m073nRqCi TXeA== X-Gm-Message-State: AOJu0YzvGxI8JbcaERcXg634qbs//qi2HR7ahiuBniPSH4zbC94haWHh 5NdNzDzYOuwktnY2NyEF0r4drXEak4awww5WgbmCZw4kAN/LgQhbn/UmK+m5kmC9zPvTJa/ll0g J X-Google-Smtp-Source: AGHT+IH4O6Ox6Tjv9UwQa7S+1l4zWKCK3ZDUE2Ur1X7Pu6I3DBqk5WhyLZTkgMnFePao8lQF4WfpFQ== X-Received: by 2002:a17:90a:9204:b0:2c9:6d07:18f4 with SMTP id 98e67ed59e1d1-2c96d071921mr3089793a91.35.1720028553579; Wed, 03 Jul 2024 10:42:33 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Alistair Francis , Daniel Henrique Barboza Subject: [PULL 6/7] util/cpuinfo-riscv: Use linux __riscv_hwprobe syscall Date: Wed, 3 Jul 2024 10:42:25 -0700 Message-Id: <20240703174226.2117169-7-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240703174226.2117169-1-richard.henderson@linaro.org> References: <20240703174226.2117169-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1034; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1034.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1720028637321100005 Content-Type: text/plain; charset="utf-8" With recent linux kernels, there is a syscall to probe for various ISA extensions. These bits were phased in over several kernel releases, so we still require checks for symbol availability. Acked-by: Alistair Francis Reviewed-by: Daniel Henrique Barboza Signed-off-by: Richard Henderson --- meson.build | 6 ++++++ util/cpuinfo-riscv.c | 26 ++++++++++++++++++++++++++ 2 files changed, 32 insertions(+) diff --git a/meson.build b/meson.build index 54e6b09f4f..2f981f936e 100644 --- a/meson.build +++ b/meson.build @@ -2862,6 +2862,12 @@ have_cpuid_h =3D cc.links(''' }''') config_host_data.set('CONFIG_CPUID_H', have_cpuid_h) =20 +# Don't bother to advertise asm/hwprobe.h for old versions that do +# not contain RISCV_HWPROBE_EXT_ZBA. +config_host_data.set('CONFIG_ASM_HWPROBE_H', + cc.has_header_symbol('asm/hwprobe.h', + 'RISCV_HWPROBE_EXT_ZBA')) + config_host_data.set('CONFIG_AVX2_OPT', get_option('avx2') \ .require(have_cpuid_h, error_message: 'cpuid.h not available, cannot ena= ble AVX2') \ .require(cc.links(''' diff --git a/util/cpuinfo-riscv.c b/util/cpuinfo-riscv.c index 7dcfbee2ab..497ce12680 100644 --- a/util/cpuinfo-riscv.c +++ b/util/cpuinfo-riscv.c @@ -6,6 +6,11 @@ #include "qemu/osdep.h" #include "host/cpuinfo.h" =20 +#ifdef CONFIG_ASM_HWPROBE_H +#include +#include +#endif + unsigned cpuinfo; static volatile sig_atomic_t got_sigill; =20 @@ -47,6 +52,27 @@ unsigned __attribute__((constructor)) cpuinfo_init(void) #endif left &=3D ~info; =20 +#ifdef CONFIG_ASM_HWPROBE_H + if (left) { + /* + * TODO: glibc 2.40 will introduce , which + * provides __riscv_hwprobe and __riscv_hwprobe_one, + * which is a slightly cleaner interface. + */ + struct riscv_hwprobe pair =3D { .key =3D RISCV_HWPROBE_KEY_IMA_EXT= _0 }; + if (syscall(__NR_riscv_hwprobe, &pair, 1, 0, NULL, 0) =3D=3D 0 + && pair.key >=3D 0) { + info |=3D pair.value & RISCV_HWPROBE_EXT_ZBA ? CPUINFO_ZBA : 0; + info |=3D pair.value & RISCV_HWPROBE_EXT_ZBB ? CPUINFO_ZBB : 0; + left &=3D ~(CPUINFO_ZBA | CPUINFO_ZBB); +#ifdef RISCV_HWPROBE_EXT_ZICOND + info |=3D pair.value & RISCV_HWPROBE_EXT_ZICOND ? CPUINFO_ZICO= ND : 0; + left &=3D ~CPUINFO_ZICOND; +#endif + } + } +#endif /* CONFIG_ASM_HWPROBE_H */ + if (left) { struct sigaction sa_old, sa_new; =20 --=20 2.34.1 From nobody Sun Nov 24 20:42:08 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1720028670; cv=none; d=zohomail.com; s=zohoarc; b=gc90gse7jMz1LHTpnfraaAJlDSm7dfo+9wN6wMWlnvgeQs1VQ7UiVhjcoeril9mTFgawWIkugXCVGmzNWtubueVDyXjEf8mUMK/ZEE4yIK+CVFHReba9QNjCdcFY3SSxlXzEnOkeyxBf/IJs63AxOLhjnZ1B3U0TY5Dhdg5nayE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1720028670; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=7spuBkQx1Mu7jCpv4kzIy4W/rs9oZa5KoZssRj5BGLM=; b=KajjOP04V++AtlZAqgCHHmttZMJXsDMIYHKesx0S7Tvse5vePWW8+Xrw/uXoBCet2WUwhTqSqRbCI/DaH17plnXxjFoU9VkHKOKzvEZisWEEzMu5xx81hSbEPE9FJMjP/kVdldPycKBnIU58MBNJGHuAILW8YMN8ozeauj1HKr4= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1720028670434528.0298290655188; Wed, 3 Jul 2024 10:44:30 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sP40R-0003NG-H7; Wed, 03 Jul 2024 13:42:59 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sP40A-0003J1-JT for qemu-devel@nongnu.org; Wed, 03 Jul 2024 13:42:42 -0400 Received: from mail-pj1-x1030.google.com ([2607:f8b0:4864:20::1030]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sP405-0005Lr-Rw for qemu-devel@nongnu.org; Wed, 03 Jul 2024 13:42:39 -0400 Received: by mail-pj1-x1030.google.com with SMTP id 98e67ed59e1d1-2c961b5f215so1380011a91.0 for ; Wed, 03 Jul 2024 10:42:36 -0700 (PDT) Received: from stoup.. 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[174.21.76.141]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2c91d3e7d7bsm11070030a91.47.2024.07.03.10.42.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Jul 2024 10:42:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1720028555; x=1720633355; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=7spuBkQx1Mu7jCpv4kzIy4W/rs9oZa5KoZssRj5BGLM=; b=uSjzt9lvjqd+BjeB3PxVHjSymKjuwLspoalAFkrwN/zeXpU7JR/2COFbOzEyqImXCu 1exnMwWEAYcZVesVuacIgaeUCCGLSXKDw4PFFqxcQpFJFXPFBJtFoGlqckc8+IftQhqx FqZ/Cl09Gx9dOQjmZNUGD4emmDkN9LGiQL1Tqfpv83AchdVlErxikk6THkE6MAtZ6TR5 QNtrx37QMgohQI7oOjwtLQp/PL1/q7qSdHrebeK52EBpnef1n/S6p33Ie4QD4ainLFEQ cKcXljuvQG0KbnznBLAJfjeXAVpdJ1qM3PLn1VO3n7AK7o/9m2hG/six1OyXUSEtE833 QjdA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1720028555; x=1720633355; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=7spuBkQx1Mu7jCpv4kzIy4W/rs9oZa5KoZssRj5BGLM=; b=SRHufD4e7UKWjLcLlReAJes525JCU7vHHSPqwOHZ4u+8zlLM9UKG5MnIDYeiReWqMB wfTOjbVomHPaY+XlrIWTyUGxeoHRaNlsOIpejZ3W4YONKyMTbWcFZcb/Ns6aA0ao7h47 hNK+cvIRb7IQGuaDwLOm34LzTh+xXE8CpyW71/fZiVNCZ0mCy3TkNppB03J48DqAODgl 91yd4siHWZqhxWnsi3HoSqt6DVK7nK0oCV3JCc9so6ga3wZkXvQH2Xv0lxdjKfp1G8Zt xQ21AY7/jeLO8robH5anZ1FpzAq4zXG4/lu8bVrq1YH3ciQab3kghQtM2EK0qYXSnbKW Rjgg== X-Gm-Message-State: AOJu0YwQ7dvVMebQh4doFzd0bDlVWnNELmjE/ZdJ1f7+7K5VamhXRIuu wG3X5VGzlM2+lOrAmYX+WN9YecVb+UjuyPtksyvN1OiYMs+jA/4C+MTv7vtgZemABV6MYGgwzOL 7 X-Google-Smtp-Source: AGHT+IENfYBdzqgRlMiDpUzjBk/rXepj9Ae3rm1N8d8sGkopqcLdCB7bRRNLoBu2C0mUOQorRd98dg== X-Received: by 2002:a17:90a:4214:b0:2c6:dc3b:d6fd with SMTP id 98e67ed59e1d1-2c93d767707mr8395488a91.31.1720028554450; Wed, 03 Jul 2024 10:42:34 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: qemu-stable@nongnu.org, =?UTF-8?q?Alex=20Benn=C3=A9e?= Subject: [PULL 7/7] tcg/optimize: Fix TCG_COND_TST* simplification of setcond2 Date: Wed, 3 Jul 2024 10:42:26 -0700 Message-Id: <20240703174226.2117169-8-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240703174226.2117169-1-richard.henderson@linaro.org> References: <20240703174226.2117169-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::1030; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1030.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1720028671471100005 Argument ordering for setcond2 is: output, a_low, a_high, b_low, b_high, cond The test is supposed to be against b_low, not a_high. Cc: qemu-stable@nongnu.org Fixes: ceb9ee06b71 ("tcg/optimize: Handle TCG_COND_TST{EQ,NE}") Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2413 Signed-off-by: Richard Henderson Tested-by: Alex Benn=C3=A9e Message-Id: <20240701024623.1265028-1-richard.henderson@linaro.org> --- tcg/optimize.c | 2 +- tests/tcg/x86_64/test-2413.c | 30 ++++++++++++++++++++++++++++++ tests/tcg/x86_64/Makefile.target | 2 ++ 3 files changed, 33 insertions(+), 1 deletion(-) create mode 100644 tests/tcg/x86_64/test-2413.c diff --git a/tcg/optimize.c b/tcg/optimize.c index 8886f7037a..ba16ec27e2 100644 --- a/tcg/optimize.c +++ b/tcg/optimize.c @@ -2384,7 +2384,7 @@ static bool fold_setcond2(OptContext *ctx, TCGOp *op) =20 case TCG_COND_TSTEQ: case TCG_COND_TSTNE: - if (arg_is_const_val(op->args[2], 0)) { + if (arg_is_const_val(op->args[3], 0)) { goto do_setcond_high; } if (arg_is_const_val(op->args[4], 0)) { diff --git a/tests/tcg/x86_64/test-2413.c b/tests/tcg/x86_64/test-2413.c new file mode 100644 index 0000000000..456e5332fc --- /dev/null +++ b/tests/tcg/x86_64/test-2413.c @@ -0,0 +1,30 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* Copyright 2024 Linaro, Ltd. */ +/* See https://gitlab.com/qemu-project/qemu/-/issues/2413 */ + +#include + +void test(unsigned long *a, unsigned long *d, unsigned long c) +{ + asm("xorl %%eax, %%eax\n\t" + "xorl %%edx, %%edx\n\t" + "testb $0x20, %%cl\n\t" + "sete %%al\n\t" + "setne %%dl\n\t" + "shll %%cl, %%eax\n\t" + "shll %%cl, %%edx\n\t" + : "=3Da"(*a), "=3Dd"(*d) + : "c"(c)); +} + +int main(void) +{ + unsigned long a, c, d; + + for (c =3D 0; c < 64; c++) { + test(&a, &d, c); + assert(a =3D=3D (c & 0x20 ? 0 : 1u << (c & 0x1f))); + assert(d =3D=3D (c & 0x20 ? 1u << (c & 0x1f) : 0)); + } + return 0; +} diff --git a/tests/tcg/x86_64/Makefile.target b/tests/tcg/x86_64/Makefile.t= arget index 5fedf22117..eda9bd7396 100644 --- a/tests/tcg/x86_64/Makefile.target +++ b/tests/tcg/x86_64/Makefile.target @@ -8,6 +8,8 @@ =20 include $(SRC_PATH)/tests/tcg/i386/Makefile.target =20 +X86_64_TESTS +=3D test-2413 + ifeq ($(filter %-linux-user, $(TARGET)),$(TARGET)) X86_64_TESTS +=3D vsyscall X86_64_TESTS +=3D noexec --=20 2.34.1