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c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1719907258; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=wZRM4BwQ0Q0UUgw6gRy025H1tQH+u6ZlWALPP8h7+VE=; b=E0zF1GhiMDkUdjzqBWoM8r5zwJJ26Nq3n10T2HqqY1aRUX8SDjY/75udtqELQKxy07zMWp qNPs6OfNZepnZw+e/5jU7lZmtVh5WxtdcvlxmNfsT/5OJQbGhwsCSGiMx6N+qCv6V/fnIp gSAjVCEmBAgpVb+eKa4XNna0RuH3eKE= X-MC-Unique: 4UHOWppZNPW-dZnuTgDxSg-1 From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: Zheyu Ma , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Andrew Jeffery Subject: [PULL 1/6] hw/gpio/aspeed: Add reg_table_count to AspeedGPIOClass Date: Tue, 2 Jul 2024 10:00:37 +0200 Message-ID: <20240702080042.464220-2-clg@redhat.com> In-Reply-To: <20240702080042.464220-1-clg@redhat.com> References: <20240702080042.464220-1-clg@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Scanned-By: MIMEDefang 3.0 on 10.30.177.12 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.129.124; envelope-from=clg@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1719907368057100001 From: Zheyu Ma ASan detected a global-buffer-overflow error in the aspeed_gpio_read() function. This issue occurred when reading beyond the bounds of the reg_table. To enhance the safety and maintainability of the Aspeed GPIO code, this com= mit introduces a reg_table_count member to the AspeedGPIOClass structure. This change ensures that the size of the GPIO register table is explicitly track= ed and initialized, reducing the risk of errors if new register tables are introduced in the future. Reproducer: cat << EOF | qemu-system-aarch64 -display none \ -machine accel=3Dqtest, -m 512M -machine ast1030-evb -qtest stdio readq 0x7e780272 EOF ASAN log indicating the issue: =3D=3D2602930=3D=3DERROR: AddressSanitizer: global-buffer-overflow on addre= ss 0x55a5da29e128 at pc 0x55a5d700dc62 bp 0x7fff096c4e90 sp 0x7fff096c4e88 READ of size 2 at 0x55a5da29e128 thread T0 #0 0x55a5d700dc61 in aspeed_gpio_read hw/gpio/aspeed_gpio.c:564:14 #1 0x55a5d933f3ab in memory_region_read_accessor system/memory.c:445:11 #2 0x55a5d92fba40 in access_with_adjusted_size system/memory.c:573:18 #3 0x55a5d92f842c in memory_region_dispatch_read1 system/memory.c:1426:= 16 #4 0x55a5d92f7b68 in memory_region_dispatch_read system/memory.c:1459:9 #5 0x55a5d9376ad1 in flatview_read_continue_step system/physmem.c:2836:= 18 #6 0x55a5d9376399 in flatview_read_continue system/physmem.c:2877:19 #7 0x55a5d93775b8 in flatview_read system/physmem.c:2907:12 Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2355 Signed-off-by: Zheyu Ma Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Andrew Jeffery --- include/hw/gpio/aspeed_gpio.h | 1 + hw/gpio/aspeed_gpio.c | 17 +++++++++++++++++ 2 files changed, 18 insertions(+) diff --git a/include/hw/gpio/aspeed_gpio.h b/include/hw/gpio/aspeed_gpio.h index 904eecf62c4c..90a12ae3182a 100644 --- a/include/hw/gpio/aspeed_gpio.h +++ b/include/hw/gpio/aspeed_gpio.h @@ -75,6 +75,7 @@ struct AspeedGPIOClass { uint32_t nr_gpio_pins; uint32_t nr_gpio_sets; const AspeedGPIOReg *reg_table; + unsigned reg_table_count; }; =20 struct AspeedGPIOState { diff --git a/hw/gpio/aspeed_gpio.c b/hw/gpio/aspeed_gpio.c index c1781e2ba36f..6474bb8de5b5 100644 --- a/hw/gpio/aspeed_gpio.c +++ b/hw/gpio/aspeed_gpio.c @@ -559,6 +559,12 @@ static uint64_t aspeed_gpio_read(void *opaque, hwaddr = offset, uint32_t size) return debounce_value; } =20 + if (idx >=3D agc->reg_table_count) { + qemu_log_mask(LOG_GUEST_ERROR, "%s: idx 0x%" PRIx64 " out of bound= s\n", + __func__, idx); + return 0; + } + reg =3D &agc->reg_table[idx]; if (reg->set_idx >=3D agc->nr_gpio_sets) { qemu_log_mask(LOG_GUEST_ERROR, "%s: no getter for offset 0x%" @@ -785,6 +791,12 @@ static void aspeed_gpio_write(void *opaque, hwaddr off= set, uint64_t data, return; } =20 + if (idx >=3D agc->reg_table_count) { + qemu_log_mask(LOG_GUEST_ERROR, "%s: idx 0x%" PRIx64 " out of bound= s\n", + __func__, idx); + return; + } + reg =3D &agc->reg_table[idx]; if (reg->set_idx >=3D agc->nr_gpio_sets) { qemu_log_mask(LOG_GUEST_ERROR, "%s: no setter for offset 0x%" @@ -1117,6 +1129,7 @@ static void aspeed_gpio_ast2400_class_init(ObjectClas= s *klass, void *data) agc->nr_gpio_pins =3D 216; agc->nr_gpio_sets =3D 7; agc->reg_table =3D aspeed_3_3v_gpios; + agc->reg_table_count =3D GPIO_3_3V_REG_ARRAY_SIZE; } =20 static void aspeed_gpio_2500_class_init(ObjectClass *klass, void *data) @@ -1127,6 +1140,7 @@ static void aspeed_gpio_2500_class_init(ObjectClass *= klass, void *data) agc->nr_gpio_pins =3D 228; agc->nr_gpio_sets =3D 8; agc->reg_table =3D aspeed_3_3v_gpios; + agc->reg_table_count =3D GPIO_3_3V_REG_ARRAY_SIZE; } =20 static void aspeed_gpio_ast2600_3_3v_class_init(ObjectClass *klass, void *= data) @@ -1137,6 +1151,7 @@ static void aspeed_gpio_ast2600_3_3v_class_init(Objec= tClass *klass, void *data) agc->nr_gpio_pins =3D 208; agc->nr_gpio_sets =3D 7; agc->reg_table =3D aspeed_3_3v_gpios; + agc->reg_table_count =3D GPIO_3_3V_REG_ARRAY_SIZE; } =20 static void aspeed_gpio_ast2600_1_8v_class_init(ObjectClass *klass, void *= data) @@ -1147,6 +1162,7 @@ static void aspeed_gpio_ast2600_1_8v_class_init(Objec= tClass *klass, void *data) agc->nr_gpio_pins =3D 36; agc->nr_gpio_sets =3D 2; agc->reg_table =3D aspeed_1_8v_gpios; + agc->reg_table_count =3D GPIO_1_8V_REG_ARRAY_SIZE; } =20 static void aspeed_gpio_1030_class_init(ObjectClass *klass, void *data) @@ -1157,6 +1173,7 @@ static void aspeed_gpio_1030_class_init(ObjectClass *= klass, void *data) agc->nr_gpio_pins =3D 151; agc->nr_gpio_sets =3D 6; agc->reg_table =3D aspeed_3_3v_gpios; + agc->reg_table_count =3D GPIO_3_3V_REG_ARRAY_SIZE; } =20 static const TypeInfo aspeed_gpio_info =3D { --=20 2.45.2