From nobody Thu Sep 19 00:51:42 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linux.alibaba.com ARC-Seal: i=1; a=rsa-sha256; t=1719805291; cv=none; d=zohomail.com; s=zohoarc; b=icuEIMIBhnoSUo764lmdZdB8q7Z0lg801OMO1MdVvBDcVeH/ab5bQWCfbut/dTHkMLLyxSOk7HnAlMjVIKj5Ngm2Tr2PWC7toKy1HLdKUAcwNWcL5ktOAxh4yZGMokBlR5sWJLE8zkFj+o5w+7muPMFcPWFohDe6mKn5Pe06dpo= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1719805291; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=KNIJwiicLcM/7Wiog+PY/1oIh+MFNQW3RRxWUQTZVr4=; b=SH19kzTJ5sJl+VJdSHM5Ehui1f1Ws7v40u+NsFhItis65JNhO2LthZ5F4EEqRUCiwvQYsuShihFzx4X88egyRX90j+/FWXKKkUo43H3EdI4OZlJSszfgtF59y6k+MLkNXCMBHGBb4NgaRjATwTF3UDoW8Y2i0yW7gw01bxIXeHA= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1719805291288119.7403662613633; Sun, 30 Jun 2024 20:41:31 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sO7uU-0007k4-RF; Sun, 30 Jun 2024 23:40:58 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sO7uT-0007jd-H7; Sun, 30 Jun 2024 23:40:57 -0400 Received: from out30-133.freemail.mail.aliyun.com ([115.124.30.133]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sO7uR-0006fF-Hs; Sun, 30 Jun 2024 23:40:57 -0400 Received: from L-PF1D6DP4-1208.hz.ali.com(mailfrom:zhiwei_liu@linux.alibaba.com fp:SMTPD_---0W9YH8Qb_1719805249) by smtp.aliyun-inc.com; Mon, 01 Jul 2024 11:40:50 +0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.alibaba.com; s=default; t=1719805250; h=From:To:Subject:Date:Message-Id:MIME-Version; bh=KNIJwiicLcM/7Wiog+PY/1oIh+MFNQW3RRxWUQTZVr4=; b=nIHJ72WNkfLSIjFo9Ku1YeQ3k1p0eV8J50t5lv6pCVheWlSsyvUTNnfcjB3Bme5FV6jQWwLlylUeHLPKKOORRpT+E2G9WY9hPrG2AfVA9MgeR87YX6gHppAiXBITMJvvh5JptFgTMhGE9Xn5345ExpWRE9UJVKfqoptRRP9Plog= X-Alimail-AntiSpam: AC=PASS; BC=-1|-1; BR=01201311R141e4; CH=green; DM=||false|; DS=||; FP=0|-1|-1|-1|0|-1|-1|-1; HT=maildocker-contentspam033037067110; MF=zhiwei_liu@linux.alibaba.com; NM=1; PH=DS; RN=9; SR=0; TI=SMTPD_---0W9YH8Qb_1719805249; From: LIU Zhiwei To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, palmer@dabbelt.com, alistair.francis@wdc.com, dbarboza@ventanamicro.com, liwei1518@gmail.com, bmeng.cn@gmail.com, TANG Tiancheng , Liu Zhiwei Subject: [PATCH 4/6] target/riscv: Detect sxl to set bit width for RV32 in RV64 Date: Mon, 1 Jul 2024 11:37:20 +0800 Message-Id: <20240701033722.954-5-zhiwei_liu@linux.alibaba.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20240701033722.954-1-zhiwei_liu@linux.alibaba.com> References: <20240701033722.954-1-zhiwei_liu@linux.alibaba.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=115.124.30.133; envelope-from=zhiwei_liu@linux.alibaba.com; helo=out30-133.freemail.mail.aliyun.com X-Spam_score_int: -174 X-Spam_score: -17.5 X-Spam_bar: ----------------- X-Spam_report: (-17.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, ENV_AND_HDR_SPF_MATCH=-0.5, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, UNPARSEABLE_RELAY=0.001, USER_IN_DEF_DKIM_WL=-7.5, USER_IN_DEF_SPF_WL=-7.5 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linux.alibaba.com) X-ZM-MESSAGEID: 1719805291903100001 Content-Type: text/plain; charset="utf-8" From: TANG Tiancheng Ensure correct bit width based on sxl when running RV32 on RV64 QEMU. This is required as MMU address translations run in S-mode. Signed-off-by: TANG Tiancheng Reviewed-by: Liu Zhiwei --- target/riscv/cpu_helper.c | 15 +++++++++++---- 1 file changed, 11 insertions(+), 4 deletions(-) diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c index 6709622dd3..1af83a0a36 100644 --- a/target/riscv/cpu_helper.c +++ b/target/riscv/cpu_helper.c @@ -887,12 +887,14 @@ static int get_physical_address(CPURISCVState *env, h= waddr *physical, =20 CPUState *cs =3D env_cpu(env); int va_bits =3D PGSHIFT + levels * ptidxbits + widened; + int sxlen =3D 16UL << riscv_cpu_sxl(env); + int sxlen_bytes =3D sxlen / 8; =20 if (first_stage =3D=3D true) { target_ulong mask, masked_msbs; =20 - if (TARGET_LONG_BITS > (va_bits - 1)) { - mask =3D (1L << (TARGET_LONG_BITS - (va_bits - 1))) - 1; + if (sxlen > (va_bits - 1)) { + mask =3D (1L << (sxlen - (va_bits - 1))) - 1; } else { mask =3D 0; } @@ -961,7 +963,7 @@ restart: =20 int pmp_prot; int pmp_ret =3D get_physical_address_pmp(env, &pmp_prot, pte_addr, - sizeof(target_ulong), + sxlen_bytes, MMU_DATA_LOAD, PRV_S); if (pmp_ret !=3D TRANSLATE_SUCCESS) { return TRANSLATE_PMP_FAIL; @@ -1113,7 +1115,7 @@ restart: * it is no longer valid and we must re-walk the page table. */ MemoryRegion *mr; - hwaddr l =3D sizeof(target_ulong), addr1; + hwaddr l =3D sxlen_bytes, addr1; mr =3D address_space_translate(cs->as, pte_addr, &addr1, &l, false, MEMTXATTRS_UNSPECIFIED); if (memory_region_is_ram(mr)) { @@ -1126,6 +1128,11 @@ restart: *pte_pa =3D pte =3D updated_pte; #else target_ulong old_pte =3D qatomic_cmpxchg(pte_pa, pte, updated_= pte); + if (riscv_cpu_sxl(env) =3D=3D MXL_RV32) { + old_pte =3D qatomic_cmpxchg((uint32_t *)pte_pa, pte, updat= ed_pte); + } else { + old_pte =3D qatomic_cmpxchg(pte_pa, pte, updated_pte); + } if (old_pte !=3D pte) { goto restart; } --=20 2.43.0