From nobody Thu Sep 19 01:55:50 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=telecom-paris.fr ARC-Seal: i=1; a=rsa-sha256; t=1719659374; cv=none; d=zohomail.com; s=zohoarc; b=L1rNH6kkd9d5yWLR5R2Sduaf4FzdkikkDdWyO+sZjoGn3vQikP7OVLecQH3ytuDRcAyPxx3hPTmsTk1W9bczVcCaeKsBWtPoehR/c75Pvx7zVpg3ZAT94BwTTuO87rx1FKCXfCjWBdbdcj4v9zmYK4NcFBdTSoLNVCAnPYA2AZU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1719659374; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=78UrQkIpOPMy4cM7L4jmyk+OfMW54+86uRenx/u5CHs=; b=IeOdm+XWvdhJa3Plux3k+/vdQPE4VZgF8QgvtYRqR+7T+MfTyHp2NzPGAwbraR8dO3TRg0kokUKEZ6Ya9sxy8UTzgR1oldGoZJQpY4DTjRmQDBLI/1PdsnfS/xWnvKJqBgTRFta7ItJQUckxsfZgwTpVXffJQOb2htXuMw8cbhA= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1719659374241850.6355016067029; Sat, 29 Jun 2024 04:09:34 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sNVwO-0004Qm-RW; Sat, 29 Jun 2024 07:08:24 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sNVwG-0004Nw-Iw; Sat, 29 Jun 2024 07:08:16 -0400 Received: from zproxy2.enst.fr ([137.194.2.221]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sNVwB-0002pD-En; Sat, 29 Jun 2024 07:08:14 -0400 Received: from localhost (localhost [IPv6:::1]) by zproxy2.enst.fr (Postfix) with ESMTP id 25D3C8084D; Sat, 29 Jun 2024 13:08:09 +0200 (CEST) Received: from zproxy2.enst.fr ([IPv6:::1]) by localhost (zproxy2.enst.fr [IPv6:::1]) (amavis, port 10032) with ESMTP id Ydn0V0BetW6T; Sat, 29 Jun 2024 13:08:08 +0200 (CEST) Received: from localhost (localhost [IPv6:::1]) by zproxy2.enst.fr (Postfix) with ESMTP id B067580840; Sat, 29 Jun 2024 13:08:08 +0200 (CEST) Received: from zproxy2.enst.fr ([IPv6:::1]) by localhost (zproxy2.enst.fr [IPv6:::1]) (amavis, port 10026) with ESMTP id ReavuA0wQ5Ea; Sat, 29 Jun 2024 13:08:08 +0200 (CEST) Received: from inesv-Inspiron-3501.. (unknown [IPv6:2a02:1808:284:73f9:f191:56:9ba9:96d9]) by zproxy2.enst.fr (Postfix) with ESMTPSA id 9E50B8084D; Sat, 29 Jun 2024 13:08:07 +0200 (CEST) DKIM-Filter: OpenDKIM Filter v2.10.3 zproxy2.enst.fr B067580840 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=telecom-paris.fr; s=A35C7578-1106-11E5-A17F-C303FDDA8F2E; t=1719659288; bh=78UrQkIpOPMy4cM7L4jmyk+OfMW54+86uRenx/u5CHs=; h=From:To:Date:Message-ID:MIME-Version; b=OLnCD0i3qBtw2+JRDWGlKwynIP+4aWL3zYOhnyW2tIld8bMMaXKTRMP423t8cxhiq zpcl/s7SXIul14f0314y/Ahj9PccsmNlqWbmDMV5lBFrCB9tjbe0AzGgpWjPc8AYpJ 3Q9Smva3pvcUe/OGFanv2lrKlBU4EV0eSosYsVfc= X-Virus-Scanned: amavis at enst.fr From: =?UTF-8?q?In=C3=A8s=20Varhol?= To: qemu-devel@nongnu.org Cc: Thomas Huth , qemu-arm@nongnu.org, =?UTF-8?q?In=C3=A8s=20Varhol?= , Paolo Bonzini , Laurent Vivier , Arnaud Minier , Alistair Francis , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Peter Maydell Subject: [PATCH 1/2] hw/misc: In STM32L4x5 EXTI, correct configurable interrupts Date: Sat, 29 Jun 2024 13:07:08 +0200 Message-ID: <20240629110800.539969-2-ines.varhol@telecom-paris.fr> X-Mailer: git-send-email 2.43.2 In-Reply-To: <20240629110800.539969-1-ines.varhol@telecom-paris.fr> References: <20240629110800.539969-1-ines.varhol@telecom-paris.fr> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=137.194.2.221; envelope-from=ines.varhol@telecom-paris.fr; helo=zproxy2.enst.fr X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @telecom-paris.fr) X-ZM-MESSAGEID: 1719659376578100004 Content-Type: text/plain; charset="utf-8" The implementation of configurable interrupts (interrupts supporting edge selection) was incorrectly expecting alternating input levels : this commits adds a new status field `irq_levels` to actually detect edges. Signed-off-by: In=C3=A8s Varhol --- include/hw/misc/stm32l4x5_exti.h | 2 ++ hw/misc/stm32l4x5_exti.c | 28 +++++++++++++--------------- 2 files changed, 15 insertions(+), 15 deletions(-) diff --git a/include/hw/misc/stm32l4x5_exti.h b/include/hw/misc/stm32l4x5_e= xti.h index be961d2f01..55f763fa37 100644 --- a/include/hw/misc/stm32l4x5_exti.h +++ b/include/hw/misc/stm32l4x5_exti.h @@ -45,6 +45,8 @@ struct Stm32l4x5ExtiState { uint32_t swier[EXTI_NUM_REGISTER]; uint32_t pr[EXTI_NUM_REGISTER]; =20 + /* used for edge detection */ + uint32_t irq_levels[EXTI_NUM_REGISTER]; qemu_irq irq[EXTI_NUM_INTERRUPT_OUT_LINES]; }; =20 diff --git a/hw/misc/stm32l4x5_exti.c b/hw/misc/stm32l4x5_exti.c index 495a0004ab..6a2ec62d78 100644 --- a/hw/misc/stm32l4x5_exti.c +++ b/hw/misc/stm32l4x5_exti.c @@ -88,6 +88,7 @@ static void stm32l4x5_exti_reset_hold(Object *obj, ResetT= ype type) s->ftsr[bank] =3D 0x00000000; s->swier[bank] =3D 0x00000000; s->pr[bank] =3D 0x00000000; + s->irq_levels[bank] =3D 0x00000000; } } =20 @@ -102,27 +103,23 @@ static void stm32l4x5_exti_set_irq(void *opaque, int = irq, int level) /* Shift the value to enable access in x2 registers. */ irq %=3D EXTI_MAX_IRQ_PER_BANK; =20 + if (level =3D=3D extract32(s->irq_levels[bank], irq, 1)) { + /* No change in IRQ line state: do nothing */ + return; + } + s->irq_levels[bank] =3D deposit32(s->irq_levels[bank], irq, 1, level); + /* If the interrupt is masked, pr won't be raised */ if (!extract32(s->imr[bank], irq, 1)) { return; } =20 - if (((1 << irq) & s->rtsr[bank]) && level) { - /* Rising Edge */ - s->pr[bank] |=3D 1 << irq; - qemu_irq_pulse(s->irq[oirq]); - } else if (((1 << irq) & s->ftsr[bank]) && !level) { - /* Falling Edge */ + if ((level && extract32(s->rtsr[bank], irq, 1)) || + (!level && extract32(s->ftsr[bank], irq, 1))) { + s->pr[bank] |=3D 1 << irq; qemu_irq_pulse(s->irq[oirq]); } - /* - * In the following situations : - * - falling edge but rising trigger selected - * - rising edge but falling trigger selected - * - no trigger selected - * No action is required - */ } =20 static uint64_t stm32l4x5_exti_read(void *opaque, hwaddr addr, @@ -255,8 +252,8 @@ static void stm32l4x5_exti_init(Object *obj) =20 static const VMStateDescription vmstate_stm32l4x5_exti =3D { .name =3D TYPE_STM32L4X5_EXTI, - .version_id =3D 1, - .minimum_version_id =3D 1, + .version_id =3D 2, + .minimum_version_id =3D 2, .fields =3D (VMStateField[]) { VMSTATE_UINT32_ARRAY(imr, Stm32l4x5ExtiState, EXTI_NUM_REGISTER), VMSTATE_UINT32_ARRAY(emr, Stm32l4x5ExtiState, EXTI_NUM_REGISTER), @@ -264,6 +261,7 @@ static const VMStateDescription vmstate_stm32l4x5_exti = =3D { VMSTATE_UINT32_ARRAY(ftsr, Stm32l4x5ExtiState, EXTI_NUM_REGISTER), VMSTATE_UINT32_ARRAY(swier, Stm32l4x5ExtiState, EXTI_NUM_REGISTER), VMSTATE_UINT32_ARRAY(pr, Stm32l4x5ExtiState, EXTI_NUM_REGISTER), + VMSTATE_UINT32_ARRAY(irq_levels, Stm32l4x5ExtiState, EXTI_NUM_REGI= STER), VMSTATE_END_OF_LIST() } }; --=20 2.43.2