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[2403:580b:97e8:0:82ce:f179:8a79:69f4]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-706b4a07326sm932431b3a.111.2024.06.27.03.02.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Jun 2024 03:02:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1719482560; x=1720087360; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=0CiGEo1Y49vMlYu6YFDvaSALmsVarL7E0mLlpzBDHLw=; b=FbJaKiMjqLyaey+EdcDA4+XNQdcjaYrOdJ2OJQa4HNy8UAIiqSxcOD5khsA6z3kbGR gDeLUb/wCNFZWBDEYx6IXaVIF/ppqhDU4Ww1ay6vSl4IN7kAz3usynEnXFAd7vh52nQz t5ebzI2SqQX6gt/ykQAvaMroUPKRpChRNFMJQkFtZDzsI4mADR/9xvY51Cjz9p8Kaihh AD+UeQrzyRdvj5E3wSYjbtK808z8uQq19feap0/jPokAOJkjw5QGkkkQn+O8TEfuP1YR eilXGrFQ0fBOONY39RzJ+vAOIkV/maAgjsy8w4ytC895zp9IXVb1Oho88Jh7zh6rGAgj s8Sw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1719482560; x=1720087360; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=0CiGEo1Y49vMlYu6YFDvaSALmsVarL7E0mLlpzBDHLw=; b=diumcG1wc+1PwudRjYCibok1cXz+OetoyJLQjw2anR7X3ATiqIL7bMiV5hIBQvYyYU GsAljMuL5LAyDsjjKsiySVQKaSZbcp5g5wMsRDRnXY5I7+QiCPn9yRH6hSTTo4hUbK+E HDUq6bO6QZvza7Dps8RPDLz+fIjeKOJATiUjSNOFzeLzsnsqWodIKFXpWWW4aL6vCiHj LIoWv3pI2QZnbQAWahzBuNCtOdrqOd5hInr+NhnFxBQHji5sdtaKJtGNtFMBMqUGPAYu yYz09CxyEnjmyb7MA9s5EuChbkuoErXF5Qn8w9z7GBywTsqZ6WkenZLY3rXW/EMYd5JU PFhg== X-Gm-Message-State: AOJu0YzDcolouThSUvPUQ0F38MyoYhHB+K4Mgkcdm+Q4bOucIfhHqbFg iun3CsGGkkAA77vG5LgkoW9qT4kD6M5DA0m+uH9j39ppEFiBUiXphSTwfb7m X-Google-Smtp-Source: AGHT+IFxyeVOxvHAWK/I6aiu5y9meVreMlZTjABEQSxjEWxsqA9EhRjkOMNoYZTzdDrTCqG6xW8z8w== X-Received: by 2002:a05:6a00:cd0:b0:706:348a:528a with SMTP id d2e1a72fcca58-7067459a758mr16330700b3a.10.1719482560004; Thu, 27 Jun 2024 03:02:40 -0700 (PDT) From: Alistair Francis X-Google-Original-From: Alistair Francis To: qemu-devel@nongnu.org Cc: alistair23@gmail.com, Frank Chang , Jerry Zhang Jian , Max Chou , Daniel Henrique Barboza , Alistair Francis Subject: [PULL 29/32] target/riscv: Remove extension auto-update check statements Date: Thu, 27 Jun 2024 20:00:50 +1000 Message-ID: <20240627100053.150937-30-alistair.francis@wdc.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240627100053.150937-1-alistair.francis@wdc.com> References: <20240627100053.150937-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::42c; envelope-from=alistair23@gmail.com; helo=mail-pf1-x42c.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1719482659341100001 Content-Type: text/plain; charset="utf-8" From: Frank Chang Remove the old-fashioned extension auto-update check statements as they are replaced by the extension implied rules. Signed-off-by: Frank Chang Reviewed-by: Jerry Zhang Jian Tested-by: Max Chou Reviewed-by: Daniel Henrique Barboza Message-ID: <20240625114629.27793-7-frank.chang@sifive.com> Signed-off-by: Alistair Francis --- target/riscv/tcg/tcg-cpu.c | 119 ------------------------------------- 1 file changed, 119 deletions(-) diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c index ccca9037ed..ae25686824 100644 --- a/target/riscv/tcg/tcg-cpu.c +++ b/target/riscv/tcg/tcg-cpu.c @@ -471,10 +471,6 @@ void riscv_cpu_validate_set_extensions(RISCVCPU *cpu, = Error **errp) return; } =20 - if (cpu->cfg.ext_zfh) { - cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zfhmin), true); - } - if (cpu->cfg.ext_zfhmin && !riscv_has_ext(env, RVF)) { error_setg(errp, "Zfh/Zfhmin extensions require F extension"); return; @@ -496,9 +492,6 @@ void riscv_cpu_validate_set_extensions(RISCVCPU *cpu, E= rror **errp) error_propagate(errp, local_err); return; } - - /* The V vector extension depends on the Zve64d extension */ - cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zve64d), true); } =20 /* The Zve64d extension depends on the Zve64f extension */ @@ -507,18 +500,6 @@ void riscv_cpu_validate_set_extensions(RISCVCPU *cpu, = Error **errp) error_setg(errp, "Zve64d/V extensions require D extension"); return; } - cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zve64f), true); - } - - /* The Zve64f extension depends on the Zve64x and Zve32f extensions */ - if (cpu->cfg.ext_zve64f) { - cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zve64x), true); - cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zve32f), true); - } - - /* The Zve64x extension depends on the Zve32x extension */ - if (cpu->cfg.ext_zve64x) { - cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zve32x), true); } =20 /* The Zve32f extension depends on the Zve32x extension */ @@ -527,11 +508,6 @@ void riscv_cpu_validate_set_extensions(RISCVCPU *cpu, = Error **errp) error_setg(errp, "Zve32f/Zve64f extensions require F extension= "); return; } - cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zve32x), true); - } - - if (cpu->cfg.ext_zvfh) { - cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zvfhmin), true); } =20 if (cpu->cfg.ext_zvfhmin && !cpu->cfg.ext_zve32f) { @@ -554,11 +530,6 @@ void riscv_cpu_validate_set_extensions(RISCVCPU *cpu, = Error **errp) return; } =20 - /* Set the ISA extensions, checks should have happened above */ - if (cpu->cfg.ext_zhinx) { - cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zca), true); - } - if ((cpu->cfg.ext_zdinx || cpu->cfg.ext_zhinxmin) && !cpu->cfg.ext_zfi= nx) { error_setg(errp, "Zdinx/Zhinx/Zhinxmin extensions require Zfinx"); return; @@ -576,27 +547,6 @@ void riscv_cpu_validate_set_extensions(RISCVCPU *cpu, = Error **errp) } } =20 - if (cpu->cfg.ext_zce) { - cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zca), true); - cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zcb), true); - cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zcmp), true); - cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zcmt), true); - if (riscv_has_ext(env, RVF) && mcc->misa_mxl_max =3D=3D MXL_RV32) { - cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zcf), true); - } - } - - /* zca, zcd and zcf has a PRIV 1.12.0 restriction */ - if (riscv_has_ext(env, RVC) && env->priv_ver >=3D PRIV_VERSION_1_12_0)= { - cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zca), true); - if (riscv_has_ext(env, RVF) && mcc->misa_mxl_max =3D=3D MXL_RV32) { - cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zcf), true); - } - if (riscv_has_ext(env, RVD)) { - cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zcd), true); - } - } - if (mcc->misa_mxl_max !=3D MXL_RV32 && cpu->cfg.ext_zcf) { error_setg(errp, "Zcf extension is only relevant to RV32"); return; @@ -630,52 +580,6 @@ void riscv_cpu_validate_set_extensions(RISCVCPU *cpu, = Error **errp) return; } =20 - /* - * Shorthand vector crypto extensions - */ - if (cpu->cfg.ext_zvknc) { - cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zvkn), true); - cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zvbc), true); - } - - if (cpu->cfg.ext_zvkng) { - cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zvkn), true); - cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zvkg), true); - } - - if (cpu->cfg.ext_zvkn) { - cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zvkned), true); - cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zvknhb), true); - cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zvkb), true); - cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zvkt), true); - } - - if (cpu->cfg.ext_zvksc) { - cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zvks), true); - cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zvbc), true); - } - - if (cpu->cfg.ext_zvksg) { - cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zvks), true); - cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zvkg), true); - } - - if (cpu->cfg.ext_zvks) { - cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zvksed), true); - cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zvksh), true); - cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zvkb), true); - cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zvkt), true); - } - - if (cpu->cfg.ext_zvkt) { - cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zvbb), true); - cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zvbc), true); - } - - if (cpu->cfg.ext_zvbb) { - cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zvkb), true); - } - if ((cpu->cfg.ext_zvbb || cpu->cfg.ext_zvkb || cpu->cfg.ext_zvkg || cpu->cfg.ext_zvkned || cpu->cfg.ext_zvknha || cpu->cfg.ext_zvksed= || cpu->cfg.ext_zvksh) && !cpu->cfg.ext_zve32x) { @@ -691,29 +595,6 @@ void riscv_cpu_validate_set_extensions(RISCVCPU *cpu, = Error **errp) return; } =20 - if (cpu->cfg.ext_zk) { - cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zkn), true); - cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zkr), true); - cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zkt), true); - } - - if (cpu->cfg.ext_zkn) { - cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zbkb), true); - cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zbkc), true); - cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zbkx), true); - cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zkne), true); - cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zknd), true); - cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zknh), true); - } - - if (cpu->cfg.ext_zks) { - cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zbkb), true); - cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zbkc), true); - cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zbkx), true); - cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zksed), true); - cpu_cfg_ext_auto_update(cpu, CPU_CFG_OFFSET(ext_zksh), true); - } - if (cpu->cfg.ext_zicntr && !cpu->cfg.ext_zicsr) { if (cpu_cfg_ext_is_user_set(CPU_CFG_OFFSET(ext_zicntr))) { error_setg(errp, "zicntr requires zicsr"); --=20 2.45.2