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Wed, 26 Jun 2024 16:38:04 -0700 (PDT) From: Pierrick Bouvier To: qemu-devel@nongnu.org Cc: Alexandre Iooss , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Pierrick Bouvier , Mahmoud Mandour , Paolo Bonzini , Eduardo Habkost , Richard Henderson , =?UTF-8?q?Alex=20Benn=C3=A9e?= Subject: [PATCH v2 2/7] plugins: save value during memory accesses Date: Wed, 26 Jun 2024 16:37:52 -0700 Message-Id: <20240626233757.375083-3-pierrick.bouvier@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240626233757.375083-1-pierrick.bouvier@linaro.org> References: <20240626233757.375083-1-pierrick.bouvier@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::629; envelope-from=pierrick.bouvier@linaro.org; helo=mail-pl1-x629.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1719445185950100007 Content-Type: text/plain; charset="utf-8" Different code paths handle memory accesses: - tcg generated code - load/store helpers - atomic helpers This value is saved in cpu->plugin_state. Atomic operations are doing read/write at the same time, so we generate two memory callbacks instead of one, to allow plugins to access distinct values. Signed-off-by: Pierrick Bouvier --- accel/tcg/atomic_template.h | 66 ++++++++++++++++++++++++++++---- include/qemu/plugin.h | 8 ++++ plugins/core.c | 7 ++++ tcg/tcg-op-ldst.c | 72 +++++++++++++++++++++++++++++++---- accel/tcg/atomic_common.c.inc | 13 ++++++- accel/tcg/ldst_common.c.inc | 38 +++++++++++------- 6 files changed, 173 insertions(+), 31 deletions(-) diff --git a/accel/tcg/atomic_template.h b/accel/tcg/atomic_template.h index 1dc2151dafd..830e4f16069 100644 --- a/accel/tcg/atomic_template.h +++ b/accel/tcg/atomic_template.h @@ -53,6 +53,14 @@ # error unsupported data size #endif =20 +#if DATA_SIZE =3D=3D 16 +# define UPPER_MEMORY_VALUE(val) int128_gethi(val) +# define LOWER_MEMORY_VALUE(val) int128_getlo(val) +#else +# define UPPER_MEMORY_VALUE(val) 0 +# define LOWER_MEMORY_VALUE(val) val +#endif + #if DATA_SIZE >=3D 4 # define ABI_TYPE DATA_TYPE #else @@ -83,7 +91,12 @@ ABI_TYPE ATOMIC_NAME(cmpxchg)(CPUArchState *env, abi_ptr= addr, ret =3D qatomic_cmpxchg__nocheck(haddr, cmpv, newv); #endif ATOMIC_MMU_CLEANUP; - atomic_trace_rmw_post(env, addr, oi); + atomic_trace_rmw_post(env, addr, + UPPER_MEMORY_VALUE(ret), + LOWER_MEMORY_VALUE(ret), + UPPER_MEMORY_VALUE(newv), + LOWER_MEMORY_VALUE(newv), + oi); return ret; } =20 @@ -97,7 +110,12 @@ ABI_TYPE ATOMIC_NAME(xchg)(CPUArchState *env, abi_ptr a= ddr, ABI_TYPE val, =20 ret =3D qatomic_xchg__nocheck(haddr, val); ATOMIC_MMU_CLEANUP; - atomic_trace_rmw_post(env, addr, oi); + atomic_trace_rmw_post(env, addr, + UPPER_MEMORY_VALUE(ret), + LOWER_MEMORY_VALUE(ret), + UPPER_MEMORY_VALUE(val), + LOWER_MEMORY_VALUE(val), + oi); return ret; } =20 @@ -109,7 +127,12 @@ ABI_TYPE ATOMIC_NAME(X)(CPUArchState *env, abi_ptr add= r, \ haddr =3D atomic_mmu_lookup(env_cpu(env), addr, oi, DATA_SIZE, retaddr= ); \ ret =3D qatomic_##X(haddr, val); \ ATOMIC_MMU_CLEANUP; \ - atomic_trace_rmw_post(env, addr, oi); \ + atomic_trace_rmw_post(env, addr, \ + UPPER_MEMORY_VALUE(ret), \ + LOWER_MEMORY_VALUE(ret), \ + UPPER_MEMORY_VALUE(val), \ + LOWER_MEMORY_VALUE(val), \ + oi); \ return ret; \ } =20 @@ -145,7 +168,12 @@ ABI_TYPE ATOMIC_NAME(X)(CPUArchState *env, abi_ptr add= r, \ cmp =3D qatomic_cmpxchg__nocheck(haddr, old, new); \ } while (cmp !=3D old); \ ATOMIC_MMU_CLEANUP; \ - atomic_trace_rmw_post(env, addr, oi); \ + atomic_trace_rmw_post(env, addr, \ + UPPER_MEMORY_VALUE(old), \ + LOWER_MEMORY_VALUE(old), \ + UPPER_MEMORY_VALUE(xval), \ + LOWER_MEMORY_VALUE(xval), \ + oi); \ return RET; \ } =20 @@ -188,7 +216,12 @@ ABI_TYPE ATOMIC_NAME(cmpxchg)(CPUArchState *env, abi_p= tr addr, ret =3D qatomic_cmpxchg__nocheck(haddr, BSWAP(cmpv), BSWAP(newv)); #endif ATOMIC_MMU_CLEANUP; - atomic_trace_rmw_post(env, addr, oi); + atomic_trace_rmw_post(env, addr, + UPPER_MEMORY_VALUE(ret), + LOWER_MEMORY_VALUE(ret), + UPPER_MEMORY_VALUE(newv), + LOWER_MEMORY_VALUE(newv), + oi); return BSWAP(ret); } =20 @@ -202,7 +235,12 @@ ABI_TYPE ATOMIC_NAME(xchg)(CPUArchState *env, abi_ptr = addr, ABI_TYPE val, =20 ret =3D qatomic_xchg__nocheck(haddr, BSWAP(val)); ATOMIC_MMU_CLEANUP; - atomic_trace_rmw_post(env, addr, oi); + atomic_trace_rmw_post(env, addr, + UPPER_MEMORY_VALUE(ret), + LOWER_MEMORY_VALUE(ret), + UPPER_MEMORY_VALUE(val), + LOWER_MEMORY_VALUE(val), + oi); return BSWAP(ret); } =20 @@ -214,7 +252,12 @@ ABI_TYPE ATOMIC_NAME(X)(CPUArchState *env, abi_ptr add= r, \ haddr =3D atomic_mmu_lookup(env_cpu(env), addr, oi, DATA_SIZE, retaddr= ); \ ret =3D qatomic_##X(haddr, BSWAP(val)); \ ATOMIC_MMU_CLEANUP; \ - atomic_trace_rmw_post(env, addr, oi); \ + atomic_trace_rmw_post(env, addr, \ + UPPER_MEMORY_VALUE(ret), \ + LOWER_MEMORY_VALUE(ret), \ + UPPER_MEMORY_VALUE(val), \ + LOWER_MEMORY_VALUE(val), \ + oi); \ return BSWAP(ret); \ } =20 @@ -247,7 +290,12 @@ ABI_TYPE ATOMIC_NAME(X)(CPUArchState *env, abi_ptr add= r, \ ldn =3D qatomic_cmpxchg__nocheck(haddr, ldo, BSWAP(new)); \ } while (ldo !=3D ldn); \ ATOMIC_MMU_CLEANUP; \ - atomic_trace_rmw_post(env, addr, oi); \ + atomic_trace_rmw_post(env, addr, \ + UPPER_MEMORY_VALUE(old), \ + LOWER_MEMORY_VALUE(old), \ + UPPER_MEMORY_VALUE(xval), \ + LOWER_MEMORY_VALUE(xval), \ + oi); \ return RET; \ } =20 @@ -281,3 +329,5 @@ GEN_ATOMIC_HELPER_FN(add_fetch, ADD, DATA_TYPE, new) #undef SUFFIX #undef DATA_SIZE #undef SHIFT +#undef UPPER_MEMORY_VALUE +#undef LOWER_MEMORY_VALUE diff --git a/include/qemu/plugin.h b/include/qemu/plugin.h index bc5aef979e7..112dcdad717 100644 --- a/include/qemu/plugin.h +++ b/include/qemu/plugin.h @@ -142,9 +142,13 @@ struct qemu_plugin_tb { /** * struct CPUPluginState - per-CPU state for plugins * @event_mask: plugin event bitmap. Modified only via async work. + * @mem_value_upper_bits: 64 upper bits of latest accessed mem value. + * @mem_value_lower_bits: 64 lower bits of latest accessed mem value. */ struct CPUPluginState { DECLARE_BITMAP(event_mask, QEMU_PLUGIN_EV_MAX); + uint64_t mem_value_upper_bits; + uint64_t mem_value_lower_bits; }; =20 /** @@ -164,6 +168,8 @@ qemu_plugin_vcpu_syscall(CPUState *cpu, int64_t num, ui= nt64_t a1, void qemu_plugin_vcpu_syscall_ret(CPUState *cpu, int64_t num, int64_t ret); =20 void qemu_plugin_vcpu_mem_cb(CPUState *cpu, uint64_t vaddr, + uint64_t value_upper_bits, + uint64_t value_lower_bits, MemOpIdx oi, enum qemu_plugin_mem_rw rw); =20 void qemu_plugin_flush_cb(void); @@ -248,6 +254,8 @@ void qemu_plugin_vcpu_syscall_ret(CPUState *cpu, int64_= t num, int64_t ret) { } =20 static inline void qemu_plugin_vcpu_mem_cb(CPUState *cpu, uint64_t vaddr, + uint64_t value_upper_bits, + uint64_t value_lower_bits, MemOpIdx oi, enum qemu_plugin_mem_rw rw) { } diff --git a/plugins/core.c b/plugins/core.c index 9d737d82787..957a3efb06d 100644 --- a/plugins/core.c +++ b/plugins/core.c @@ -575,14 +575,21 @@ void exec_inline_op(enum plugin_dyn_cb_type type, } =20 void qemu_plugin_vcpu_mem_cb(CPUState *cpu, uint64_t vaddr, + uint64_t value_upper_bits, + uint64_t value_lower_bits, MemOpIdx oi, enum qemu_plugin_mem_rw rw) { GArray *arr =3D cpu->neg.plugin_mem_cbs; + CPUPluginState *plugin_state =3D cpu->plugin_state; size_t i; =20 if (arr =3D=3D NULL) { return; } + + plugin_state->mem_value_upper_bits =3D value_upper_bits; + plugin_state->mem_value_lower_bits =3D value_lower_bits; + for (i =3D 0; i < arr->len; i++) { struct qemu_plugin_dyn_cb *cb =3D &g_array_index(arr, struct qemu_plugin_dyn_cb, i); diff --git a/tcg/tcg-op-ldst.c b/tcg/tcg-op-ldst.c index 85101602581..93b338704dc 100644 --- a/tcg/tcg-op-ldst.c +++ b/tcg/tcg-op-ldst.c @@ -148,14 +148,24 @@ static TCGv_i64 plugin_maybe_preserve_addr(TCGTemp *a= ddr) return NULL; } =20 +#ifdef CONFIG_PLUGIN static void -plugin_gen_mem_callbacks(TCGv_i64 copy_addr, TCGTemp *orig_addr, MemOpIdx = oi, +plugin_gen_mem_callbacks(TCGv_i64 value_upper_bits, TCGv_i64 value_lower_b= its, + TCGv_i64 copy_addr, TCGTemp *orig_addr, MemOpIdx = oi, enum qemu_plugin_mem_rw rw) { -#ifdef CONFIG_PLUGIN if (tcg_ctx->plugin_insn !=3D NULL) { qemu_plugin_meminfo_t info =3D make_plugin_meminfo(oi, rw); =20 + TCGv_ptr plugin_state =3D tcg_temp_ebb_new_ptr(); + tcg_gen_ld_ptr(plugin_state, tcg_env, + offsetof(CPUState, plugin_state) - sizeof(CPUState)= ); + tcg_gen_st_i64(value_upper_bits, plugin_state, + offsetof(CPUPluginState, mem_value_upper_bits)); + tcg_gen_st_i64(value_lower_bits, plugin_state, + offsetof(CPUPluginState, mem_value_lower_bits)); + tcg_temp_free_ptr(plugin_state); + if (tcg_ctx->addr_type =3D=3D TCG_TYPE_I32) { if (!copy_addr) { copy_addr =3D tcg_temp_ebb_new_i64(); @@ -172,6 +182,48 @@ plugin_gen_mem_callbacks(TCGv_i64 copy_addr, TCGTemp *= orig_addr, MemOpIdx oi, } } } +} +#endif + +static void +plugin_gen_mem_callbacks_i32(TCGv_i32 val, + TCGv_i64 copy_addr, TCGTemp *orig_addr, + MemOpIdx oi, enum qemu_plugin_mem_rw rw) +{ +#ifdef CONFIG_PLUGIN + if (tcg_ctx->plugin_insn !=3D NULL) { + TCGv_i64 ext_val =3D tcg_temp_ebb_new_i64(); + tcg_gen_extu_i32_i64(ext_val, val); + plugin_gen_mem_callbacks(tcg_constant_i64(0), ext_val, + copy_addr, orig_addr, oi, rw); + tcg_temp_free_i64(ext_val); + } +#endif +} + +static void +plugin_gen_mem_callbacks_i64(TCGv_i64 val, + TCGv_i64 copy_addr, TCGTemp *orig_addr, + MemOpIdx oi, enum qemu_plugin_mem_rw rw) +{ +#ifdef CONFIG_PLUGIN + if (tcg_ctx->plugin_insn !=3D NULL) { + plugin_gen_mem_callbacks(tcg_constant_i64(0), val, + copy_addr, orig_addr, oi, rw); + } +#endif +} + +static void +plugin_gen_mem_callbacks_i128(TCGv_i128 val, + TCGv_i64 copy_addr, TCGTemp *orig_addr, + MemOpIdx oi, enum qemu_plugin_mem_rw rw) +{ +#ifdef CONFIG_PLUGIN + if (tcg_ctx->plugin_insn !=3D NULL) { + plugin_gen_mem_callbacks(TCGV128_HIGH(val), TCGV128_LOW(val), + copy_addr, orig_addr, oi, rw); + } #endif } =20 @@ -203,7 +255,8 @@ static void tcg_gen_qemu_ld_i32_int(TCGv_i32 val, TCGTe= mp *addr, opc =3D INDEX_op_qemu_ld_a64_i32; } gen_ldst(opc, tcgv_i32_temp(val), NULL, addr, oi); - plugin_gen_mem_callbacks(copy_addr, addr, orig_oi, QEMU_PLUGIN_MEM_R); + plugin_gen_mem_callbacks_i32(val, copy_addr, addr, orig_oi, + QEMU_PLUGIN_MEM_R); =20 if ((orig_memop ^ memop) & MO_BSWAP) { switch (orig_memop & MO_SIZE) { @@ -271,7 +324,7 @@ static void tcg_gen_qemu_st_i32_int(TCGv_i32 val, TCGTe= mp *addr, } } gen_ldst(opc, tcgv_i32_temp(val), NULL, addr, oi); - plugin_gen_mem_callbacks(NULL, addr, orig_oi, QEMU_PLUGIN_MEM_W); + plugin_gen_mem_callbacks_i32(val, NULL, addr, orig_oi, QEMU_PLUGIN_MEM= _W); =20 if (swap) { tcg_temp_free_i32(swap); @@ -324,7 +377,8 @@ static void tcg_gen_qemu_ld_i64_int(TCGv_i64 val, TCGTe= mp *addr, opc =3D INDEX_op_qemu_ld_a64_i64; } gen_ldst_i64(opc, val, addr, oi); - plugin_gen_mem_callbacks(copy_addr, addr, orig_oi, QEMU_PLUGIN_MEM_R); + plugin_gen_mem_callbacks_i64(val, copy_addr, addr, orig_oi, + QEMU_PLUGIN_MEM_R); =20 if ((orig_memop ^ memop) & MO_BSWAP) { int flags =3D (orig_memop & MO_SIGN @@ -396,7 +450,7 @@ static void tcg_gen_qemu_st_i64_int(TCGv_i64 val, TCGTe= mp *addr, opc =3D INDEX_op_qemu_st_a64_i64; } gen_ldst_i64(opc, val, addr, oi); - plugin_gen_mem_callbacks(NULL, addr, orig_oi, QEMU_PLUGIN_MEM_W); + plugin_gen_mem_callbacks_i64(val, NULL, addr, orig_oi, QEMU_PLUGIN_MEM= _W); =20 if (swap) { tcg_temp_free_i64(swap); @@ -606,7 +660,8 @@ static void tcg_gen_qemu_ld_i128_int(TCGv_i128 val, TCG= Temp *addr, tcg_constant_i32(orig_oi)); } =20 - plugin_gen_mem_callbacks(ext_addr, addr, orig_oi, QEMU_PLUGIN_MEM_R); + plugin_gen_mem_callbacks_i128(val, ext_addr, addr, orig_oi, + QEMU_PLUGIN_MEM_R); } =20 void tcg_gen_qemu_ld_i128_chk(TCGv_i128 val, TCGTemp *addr, TCGArg idx, @@ -722,7 +777,8 @@ static void tcg_gen_qemu_st_i128_int(TCGv_i128 val, TCG= Temp *addr, tcg_constant_i32(orig_oi)); } =20 - plugin_gen_mem_callbacks(ext_addr, addr, orig_oi, QEMU_PLUGIN_MEM_W); + plugin_gen_mem_callbacks_i128(val, ext_addr, addr, orig_oi, + QEMU_PLUGIN_MEM_W); } =20 void tcg_gen_qemu_st_i128_chk(TCGv_i128 val, TCGTemp *addr, TCGArg idx, diff --git a/accel/tcg/atomic_common.c.inc b/accel/tcg/atomic_common.c.inc index 95a5c5ff12d..bed56d25d47 100644 --- a/accel/tcg/atomic_common.c.inc +++ b/accel/tcg/atomic_common.c.inc @@ -14,9 +14,20 @@ */ =20 static void atomic_trace_rmw_post(CPUArchState *env, uint64_t addr, + uint64_t read_value_upper_bits, + uint64_t read_value_lower_bits, + uint64_t write_value_upper_bits, + uint64_t write_value_lower_bits, MemOpIdx oi) { - qemu_plugin_vcpu_mem_cb(env_cpu(env), addr, oi, QEMU_PLUGIN_MEM_RW); + if (cpu_plugin_mem_cbs_enabled(env_cpu(env))) { + qemu_plugin_vcpu_mem_cb(env_cpu(env), addr, + read_value_upper_bits, read_value_lower_bi= ts, + oi, QEMU_PLUGIN_MEM_R); + qemu_plugin_vcpu_mem_cb(env_cpu(env), addr, + write_value_upper_bits, write_value_lower_= bits, + oi, QEMU_PLUGIN_MEM_W); + } } =20 /* diff --git a/accel/tcg/ldst_common.c.inc b/accel/tcg/ldst_common.c.inc index 87ceb954873..f6d5613a358 100644 --- a/accel/tcg/ldst_common.c.inc +++ b/accel/tcg/ldst_common.c.inc @@ -123,10 +123,15 @@ void helper_st_i128(CPUArchState *env, uint64_t addr,= Int128 val, MemOpIdx oi) * Load helpers for cpu_ldst.h */ =20 -static void plugin_load_cb(CPUArchState *env, abi_ptr addr, MemOpIdx oi) +static void plugin_load_cb(CPUArchState *env, abi_ptr addr, + uint64_t value_upper_bits, + uint64_t value_lower_bits, + MemOpIdx oi) { if (cpu_plugin_mem_cbs_enabled(env_cpu(env))) { - qemu_plugin_vcpu_mem_cb(env_cpu(env), addr, oi, QEMU_PLUGIN_MEM_R); + qemu_plugin_vcpu_mem_cb(env_cpu(env), addr, + value_upper_bits, value_lower_bits, + oi, QEMU_PLUGIN_MEM_R); } } =20 @@ -136,7 +141,7 @@ uint8_t cpu_ldb_mmu(CPUArchState *env, abi_ptr addr, Me= mOpIdx oi, uintptr_t ra) =20 tcg_debug_assert((get_memop(oi) & MO_SIZE) =3D=3D MO_UB); ret =3D do_ld1_mmu(env_cpu(env), addr, oi, ra, MMU_DATA_LOAD); - plugin_load_cb(env, addr, oi); + plugin_load_cb(env, addr, 0, ret, oi); return ret; } =20 @@ -147,7 +152,7 @@ uint16_t cpu_ldw_mmu(CPUArchState *env, abi_ptr addr, =20 tcg_debug_assert((get_memop(oi) & MO_SIZE) =3D=3D MO_16); ret =3D do_ld2_mmu(env_cpu(env), addr, oi, ra, MMU_DATA_LOAD); - plugin_load_cb(env, addr, oi); + plugin_load_cb(env, addr, 0, ret, oi); return ret; } =20 @@ -158,7 +163,7 @@ uint32_t cpu_ldl_mmu(CPUArchState *env, abi_ptr addr, =20 tcg_debug_assert((get_memop(oi) & MO_SIZE) =3D=3D MO_32); ret =3D do_ld4_mmu(env_cpu(env), addr, oi, ra, MMU_DATA_LOAD); - plugin_load_cb(env, addr, oi); + plugin_load_cb(env, addr, 0, ret, oi); return ret; } =20 @@ -169,7 +174,7 @@ uint64_t cpu_ldq_mmu(CPUArchState *env, abi_ptr addr, =20 tcg_debug_assert((get_memop(oi) & MO_SIZE) =3D=3D MO_64); ret =3D do_ld8_mmu(env_cpu(env), addr, oi, ra, MMU_DATA_LOAD); - plugin_load_cb(env, addr, oi); + plugin_load_cb(env, addr, 0, ret, oi); return ret; } =20 @@ -180,7 +185,7 @@ Int128 cpu_ld16_mmu(CPUArchState *env, abi_ptr addr, =20 tcg_debug_assert((get_memop(oi) & MO_SIZE) =3D=3D MO_128); ret =3D do_ld16_mmu(env_cpu(env), addr, oi, ra); - plugin_load_cb(env, addr, oi); + plugin_load_cb(env, addr, int128_gethi(ret), int128_getlo(ret), oi); return ret; } =20 @@ -188,10 +193,15 @@ Int128 cpu_ld16_mmu(CPUArchState *env, abi_ptr addr, * Store helpers for cpu_ldst.h */ =20 -static void plugin_store_cb(CPUArchState *env, abi_ptr addr, MemOpIdx oi) +static void plugin_store_cb(CPUArchState *env, abi_ptr addr, + uint64_t value_upper_bits, + uint64_t value_lower_bits, + MemOpIdx oi) { if (cpu_plugin_mem_cbs_enabled(env_cpu(env))) { - qemu_plugin_vcpu_mem_cb(env_cpu(env), addr, oi, QEMU_PLUGIN_MEM_W); + qemu_plugin_vcpu_mem_cb(env_cpu(env), addr, + value_upper_bits, value_lower_bits, + oi, QEMU_PLUGIN_MEM_W); } } =20 @@ -199,7 +209,7 @@ void cpu_stb_mmu(CPUArchState *env, abi_ptr addr, uint8= _t val, MemOpIdx oi, uintptr_t retaddr) { helper_stb_mmu(env, addr, val, oi, retaddr); - plugin_store_cb(env, addr, oi); + plugin_store_cb(env, addr, 0, val, oi); } =20 void cpu_stw_mmu(CPUArchState *env, abi_ptr addr, uint16_t val, @@ -207,7 +217,7 @@ void cpu_stw_mmu(CPUArchState *env, abi_ptr addr, uint1= 6_t val, { tcg_debug_assert((get_memop(oi) & MO_SIZE) =3D=3D MO_16); do_st2_mmu(env_cpu(env), addr, val, oi, retaddr); - plugin_store_cb(env, addr, oi); + plugin_store_cb(env, addr, 0, val, oi); } =20 void cpu_stl_mmu(CPUArchState *env, abi_ptr addr, uint32_t val, @@ -215,7 +225,7 @@ void cpu_stl_mmu(CPUArchState *env, abi_ptr addr, uint3= 2_t val, { tcg_debug_assert((get_memop(oi) & MO_SIZE) =3D=3D MO_32); do_st4_mmu(env_cpu(env), addr, val, oi, retaddr); - plugin_store_cb(env, addr, oi); + plugin_store_cb(env, addr, 0, val, oi); } =20 void cpu_stq_mmu(CPUArchState *env, abi_ptr addr, uint64_t val, @@ -223,7 +233,7 @@ void cpu_stq_mmu(CPUArchState *env, abi_ptr addr, uint6= 4_t val, { tcg_debug_assert((get_memop(oi) & MO_SIZE) =3D=3D MO_64); do_st8_mmu(env_cpu(env), addr, val, oi, retaddr); - plugin_store_cb(env, addr, oi); + plugin_store_cb(env, addr, 0, val, oi); } =20 void cpu_st16_mmu(CPUArchState *env, abi_ptr addr, Int128 val, @@ -231,7 +241,7 @@ void cpu_st16_mmu(CPUArchState *env, abi_ptr addr, Int1= 28 val, { tcg_debug_assert((get_memop(oi) & MO_SIZE) =3D=3D MO_128); do_st16_mmu(env_cpu(env), addr, val, oi, retaddr); - plugin_store_cb(env, addr, oi); + plugin_store_cb(env, addr, int128_gethi(val), int128_getlo(val), oi); } =20 /* --=20 2.39.2