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[174.21.76.141]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-1f9eb3c6027sm84693235ad.133.2024.06.25.11.35.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 25 Jun 2024 11:35:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1719344067; x=1719948867; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=SkIsJKtZUJAkO/lpIvhYyVEDLS6NoChogP/TAxQnzSI=; b=SxSuKEZwRMXu2kbEvW26ggPvNXdMFcRCq7CuSriR1Abw4y/jNJ7p8Ze/Z3fFZrFpcp iwfWt1nOtZbvkTJ+szvaHiEvel0Erypweiy9U+HnIgfjSL/Kw3pxCa1WtHOvR5wtd/a3 2dS03xOmapIjOB6Sov6txjp+SWfSzlxFA5hBOUF/9K3h4wHMmTY2BxVbx9uChemit4Yt MQht/wT2KmPCcrTTkKx7mcWlhXhTJl8RCy9BnCouEBlPtf7lrxi2Vd1lv11c87jz88bV UvS/d7EUFjmFONla3yNHhEZo84aRZnIuGzIIQ6FmA3ZHPZOOmSXlrwAD2f8MOLlkol8k YMUQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1719344067; x=1719948867; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=SkIsJKtZUJAkO/lpIvhYyVEDLS6NoChogP/TAxQnzSI=; b=DCUol/iK+/H68pRMpWG8dvMjgCs5V03jUuvm0jZy9z1+GbA5mmrxut2d3D/ZtG1gLp frXLYxylogzxK80likp0wVKjq60WfmEF+pkOicsvj6wI7KgTOaQ1XVDlrjV4RyObUfwm QxEK9JMSGn+rjmT4ZsY4WTNqbmWJsC1Xm8r6HZqBnHoHeGF20WKsIQu7mcHOwKk6g1mZ eBVyGITeOvLlw6ESOEKYPzIYDOo0eOXBc6OOCIsHRMUm/36GKFKCOc6QjMAMW6efeEr3 PStzU0tNth9Kmbu9/E6kp/2rZexE1Zhbvg6wLXbpJRVMbccKAwV9fK2QdWArKTttlRUW UduA== X-Gm-Message-State: AOJu0YzsMaB8r84hgS9pUv8A6pm4vMN5V1shGvKHl4Jl6yVEhNiHAY8b lGEcs5OcnHf28nCmQJRBOcvFt5VSnGTCbGjwcL4ulACRLat/6/z9gCLUnIl5mAe659mDpj/RMv4 j X-Google-Smtp-Source: AGHT+IG8cDeIeGAqVeoAwVRJanfKxbGCJH+qaOB7AgBHfa/WfcALNcSgLJ/6CwYprQsIuweEFaMJXw== X-Received: by 2002:a17:902:c40e:b0:1fa:2568:5895 with SMTP id d9443c01a7336-1fa256858femr93716095ad.63.1719340540561; Tue, 25 Jun 2024 11:35:40 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, qemu-stable@nongnu.org, Peter Maydell Subject: [PATCH v2 03/13] target/arm: Fix FJCVTZS vs flush-to-zero Date: Tue, 25 Jun 2024 11:35:26 -0700 Message-Id: <20240625183536.1672454-4-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240625183536.1672454-1-richard.henderson@linaro.org> References: <20240625183536.1672454-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::732 (deferred) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::732; envelope-from=richard.henderson@linaro.org; helo=mail-qk1-x732.google.com X-Spam_score_int: -8 X-Spam_score: -0.9 X-Spam_bar: / X-Spam_report: (-0.9 / 5.0 requ) BAYES_00=-1.9, DKIM_INVALID=0.1, DKIM_SIGNED=0.1, PDS_HP_HELO_NORDNS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, T_SPF_TEMPERROR=0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1719347973872100003 Content-Type: text/plain; charset="utf-8" Input denormals cause the Javascript inexact bit (output to Z) to be set. Cc: qemu-stable@nongnu.org Fixes: 6c1f6f2733a ("target/arm: Implement ARMv8.3-JSConv") Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2375 Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/arm/vfp_helper.c | 18 +++++++++--------- tests/tcg/aarch64/test-2375.c | 21 +++++++++++++++++++++ tests/tcg/aarch64/Makefile.target | 3 ++- 3 files changed, 32 insertions(+), 10 deletions(-) create mode 100644 tests/tcg/aarch64/test-2375.c diff --git a/target/arm/vfp_helper.c b/target/arm/vfp_helper.c index ce26b8a71a..50d7042fa9 100644 --- a/target/arm/vfp_helper.c +++ b/target/arm/vfp_helper.c @@ -1091,8 +1091,8 @@ const FloatRoundMode arm_rmode_to_sf_map[] =3D { uint64_t HELPER(fjcvtzs)(float64 value, void *vstatus) { float_status *status =3D vstatus; - uint32_t inexact, frac; - uint32_t e_old, e_new; + uint32_t frac, e_old, e_new; + bool inexact; =20 e_old =3D get_float_exception_flags(status); set_float_exception_flags(0, status); @@ -1100,13 +1100,13 @@ uint64_t HELPER(fjcvtzs)(float64 value, void *vstat= us) e_new =3D get_float_exception_flags(status); set_float_exception_flags(e_old | e_new, status); =20 - if (value =3D=3D float64_chs(float64_zero)) { - /* While not inexact for IEEE FP, -0.0 is inexact for JavaScript. = */ - inexact =3D 1; - } else { - /* Normal inexact or overflow or NaN */ - inexact =3D e_new & (float_flag_inexact | float_flag_invalid); - } + /* Normal inexact, denormal with flush-to-zero, or overflow or NaN */ + inexact =3D e_new & (float_flag_inexact | + float_flag_input_denormal | + float_flag_invalid); + + /* While not inexact for IEEE FP, -0.0 is inexact for JavaScript. */ + inexact |=3D value =3D=3D float64_chs(float64_zero); =20 /* Pack the result and the env->ZF representation of Z together. */ return deposit64(frac, 32, 32, inexact); diff --git a/tests/tcg/aarch64/test-2375.c b/tests/tcg/aarch64/test-2375.c new file mode 100644 index 0000000000..163eba422b --- /dev/null +++ b/tests/tcg/aarch64/test-2375.c @@ -0,0 +1,21 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* Copyright (c) 2024 Linaro Ltd */ +/* See https://gitlab.com/qemu-project/qemu/-/issues/2375 */ + +#include + +int main(void) +{ + int r, z; + + asm("msr fpcr, %2\n\t" + "fjcvtzs %w0, %d3\n\t" + "cset %1, eq" + : "=3Dr"(r), "=3Dr"(z) + : "r"(0x01000000L), /* FZ =3D 1 */ + "w"(0xfcff00L)); /* denormal */ + + assert(r =3D=3D 0); + assert(z =3D=3D 0); + return 0; +} diff --git a/tests/tcg/aarch64/Makefile.target b/tests/tcg/aarch64/Makefile= .target index 70d728ae9a..4ecbca6a41 100644 --- a/tests/tcg/aarch64/Makefile.target +++ b/tests/tcg/aarch64/Makefile.target @@ -41,8 +41,9 @@ endif =20 # Pauth Tests ifneq ($(CROSS_CC_HAS_ARMV8_3),) -AARCH64_TESTS +=3D pauth-1 pauth-2 pauth-4 pauth-5 +AARCH64_TESTS +=3D pauth-1 pauth-2 pauth-4 pauth-5 test-2375 pauth-%: CFLAGS +=3D -march=3Darmv8.3-a +test-2375: CFLAGS +=3D -march=3Darmv8.3-a run-pauth-1: QEMU_OPTS +=3D -cpu max run-pauth-2: QEMU_OPTS +=3D -cpu max # Choose a cpu with FEAT_Pauth but without FEAT_FPAC for pauth-[45]. --=20 2.34.1