From nobody Mon Nov 25 00:27:35 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1719307228601644.8374514369056; Tue, 25 Jun 2024 02:20:28 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sM2Kf-0006bv-2u; Tue, 25 Jun 2024 05:19:21 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sM2Kc-0006ZY-G8 for qemu-devel@nongnu.org; Tue, 25 Jun 2024 05:19:18 -0400 Received: from mx2.zhaoxin.com ([203.110.167.99]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sM2KZ-0006KY-Iz for qemu-devel@nongnu.org; Tue, 25 Jun 2024 05:19:18 -0400 Received: from ZXSHMBX1.zhaoxin.com (ZXSHMBX1.zhaoxin.com [10.28.252.163]) by mx2.zhaoxin.com with ESMTP id utbb5JfT1ZNaCO0E (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=NO); Tue, 25 Jun 2024 17:19:08 +0800 (CST) Received: from zxbjmbx1.zhaoxin.com (10.29.252.163) by ZXSHMBX1.zhaoxin.com (10.28.252.163) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Tue, 25 Jun 2024 17:19:07 +0800 Received: from ewan-server.zhaoxin.com (10.28.66.62) by zxbjmbx1.zhaoxin.com (10.29.252.163) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Tue, 25 Jun 2024 17:19:07 +0800 X-ASG-Debug-ID: 1719307147-1eb14e2e5fbade0005-jgbH7p X-Barracuda-Envelope-From: EwanHai-oc@zhaoxin.com X-Barracuda-RBL-Trusted-Forwarder: 10.28.252.163 X-Barracuda-RBL-Trusted-Forwarder: 10.28.252.163 From: EwanHai X-Barracuda-RBL-Trusted-Forwarder: 10.29.252.163 To: CC: , , , , Subject: [PATCH 4/4] target/i386: Update CMPLegacy handling for Zhaoxin and VIA CPUs Date: Tue, 25 Jun 2024 05:19:05 -0400 X-ASG-Orig-Subj: [PATCH 4/4] target/i386: Update CMPLegacy handling for Zhaoxin and VIA CPUs Message-ID: <20240625091905.1325205-5-ewanhai-oc@zhaoxin.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240625091905.1325205-1-ewanhai-oc@zhaoxin.com> References: <20240625091905.1325205-1-ewanhai-oc@zhaoxin.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.28.66.62] X-ClientProxiedBy: zxbjmbx1.zhaoxin.com (10.29.252.163) To zxbjmbx1.zhaoxin.com (10.29.252.163) X-Barracuda-Connect: ZXSHMBX1.zhaoxin.com[10.28.252.163] X-Barracuda-Start-Time: 1719307148 X-Barracuda-Encrypted: ECDHE-RSA-AES128-GCM-SHA256 X-Barracuda-URL: https://10.28.252.36:4443/cgi-mod/mark.cgi X-Virus-Scanned: by bsmtpd at zhaoxin.com X-Barracuda-Scan-Msg-Size: 1141 X-Barracuda-BRTS-Status: 1 X-Barracuda-Bayes: INNOCENT GLOBAL 0.0000 1.0000 -2.0210 X-Barracuda-Spam-Score: -2.02 X-Barracuda-Spam-Status: No, SCORE=-2.02 using global scores of TAG_LEVEL=1000.0 QUARANTINE_LEVEL=1000.0 KILL_LEVEL=9.0 tests= X-Barracuda-Spam-Report: Code version 3.2, rules version 3.2.3.126733 Rule breakdown below pts rule name description ---- ---------------------- -------------------------------------------------- Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=203.110.167.99; envelope-from=EwanHai-oc@zhaoxin.com; helo=mx2.zhaoxin.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1719307228808100001 Content-Type: text/plain; charset="utf-8" Zhaoxin and VIA CPUs handle the CMPLegacy bit in the same way as Intel CPUs. This patch simplifies the existing logic by using the IS_XXX_CPU macro and includes checks for Zhaoxin and VIA vendors to align their behavior with Intel. Signed-off-by: EwanHai --- target/i386/cpu.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 50edff077e..0836416617 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -6945,9 +6945,9 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, = uint32_t count, * So don't set it here for Intel to make Linux guests happy. */ if (threads_per_pkg > 1) { - if (env->cpuid_vendor1 !=3D CPUID_VENDOR_INTEL_1 || - env->cpuid_vendor2 !=3D CPUID_VENDOR_INTEL_2 || - env->cpuid_vendor3 !=3D CPUID_VENDOR_INTEL_3) { + if (!IS_INTEL_CPU(env) && + !IS_ZHAOXIN_CPU(env) && + !IS_VIA_CPU(env)) { *ecx |=3D 1 << 1; /* CmpLegacy bit */ } } --=20 2.34.1