From nobody Mon Nov 25 03:00:00 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1719058104; cv=none; d=zohomail.com; s=zohoarc; b=LoXNeRZE/0TsaAtWXIBpwq+61bcpg7X/jTPIq0RNlwjF19i2nkp4qJsPDDL2kVjLPWYM68HXNgSvcYsDuTfKscm12a40vjDzQAyjI8n1pUdeN1GkDjACWTpUFDwnsmw4mNJm6DC0I5U8EWGj1Oa86n/o5aUTzgnCIUgC3ctMaIs= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1719058104; h=Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=y/peQK2HWWhn2ma2SjoOX9PrYOZzJnJW241P1DXKLDo=; b=MKVIdD60Oe05q8ty5Ve0nelicGhuFaTPMwUwhR3xHAKmr+EQlbRm4VaQBOPkxb+T0ifKurbpgYxfqk0PG5ZBOPbh7yVoMvpGcCd8lDg0P7yOuVxSk9ER75b6x543RR9xEhlpr917XHw/nzqL3PaPKH732C0Mqzdrpo89bxCbcR0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1719058104244330.79297600078405; Sat, 22 Jun 2024 05:08:24 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sKzWM-000814-9J; Sat, 22 Jun 2024 08:07:06 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sKzWG-0007vu-W2 for qemu-devel@nongnu.org; Sat, 22 Jun 2024 08:07:01 -0400 Received: from mail-lj1-x236.google.com ([2a00:1450:4864:20::236]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sKzWB-0000LZ-EP for qemu-devel@nongnu.org; Sat, 22 Jun 2024 08:06:57 -0400 Received: by mail-lj1-x236.google.com with SMTP id 38308e7fff4ca-2ec3c0dada3so36589761fa.0 for ; Sat, 22 Jun 2024 05:06:54 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3663a2f698dsm4393006f8f.70.2024.06.22.05.06.53 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 22 Jun 2024 05:06:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1719058014; x=1719662814; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=y/peQK2HWWhn2ma2SjoOX9PrYOZzJnJW241P1DXKLDo=; b=M/ap3v1FDFzv52L9BGdMKUQNQMK/seFFXNZ0/qnK1Ce2cZjPAUeog8/XBeTXEktBqs CWvqt807w5jAB1vgWVSsmwKeVy17uQwnkZ/3RkqwDKWjqFfffJFZ1Syw47ddrMONpIFc AXTeT3PrCFMK/Ov/tTpC3OZmUJd+24H/kP/FDWOeO4Q+R7CwZCCCrtl2sUzFmy1EBqLa OR0r8glw5fD/x7UTrjHoxc9bmdlM+MfbbvinC1ZqjZQFO21HQbdhza1FswjETyTVqX8S CByEhtMZ4LXZgmCRHQgKZPNYnVplsdrphZuhp/ZGOUo1Q8BxVzPCV4O3aFwIP/m86lN4 cqlA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1719058014; x=1719662814; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=y/peQK2HWWhn2ma2SjoOX9PrYOZzJnJW241P1DXKLDo=; b=v2ulQSSCQhMXKEkmXrylWE+/EzhEYvV02Kdaz9tZNTcRoKgLzuNuPiDE/KVLIKdWDv k4jERUBxiJWtibb4gQV1+9D/XJ5XQt4zVvU1dvNwYz1cNCfZdcHSWRwlAN5iu6OudzTi 49GNGXmdQukFXdRuPpmDhbAImkhuBfLJqYk8c88zijPTpmtBvOoJVRJX7qabP1if26ja n0QtAlUnCybeiGqRudm2OeAvcDuDmZG+6SCAumdPIpzYjsjeLpUGPGcbhSBDnsBAw8sN k/NrdKDxvBVYTTi8ZpucZDsVZEY3lMCfgSHJDvkt+tWg3869NzSRR6XmRbfIJlM7axf9 j3zw== X-Gm-Message-State: AOJu0YydNV8Y20bY/R6lOtwQlndVrZcwPPMMzDSl7EegL0R67ceu8LTo 8FvNgWYIaoxZbkoySNY0JXtIyYiu6J2kVK9yhU7kvRrGtCmO4LFm8ow/F0goxcIkV6LoFMX85Mg pa2A= X-Google-Smtp-Source: AGHT+IH6BamVDuq5uANDGDgTnK6QF93UssX1lloTzUE3S4rJJMLgmIUC4uCQZGTM1BJZ76pFq5QH6A== X-Received: by 2002:ac2:4e8d:0:b0:52c:df4e:3343 with SMTP id 2adb3069b0e04-52cdf4e346emr803123e87.16.1719058013586; Sat, 22 Jun 2024 05:06:53 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 18/18] hw/arm/sbsa-ref: Enable CPU cluster on ARM sbsa machine Date: Sat, 22 Jun 2024 13:06:43 +0100 Message-Id: <20240622120643.3797539-19-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240622120643.3797539-1-peter.maydell@linaro.org> References: <20240622120643.3797539-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::236; envelope-from=peter.maydell@linaro.org; helo=mail-lj1-x236.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1719058104887100003 Content-Type: text/plain; charset="utf-8" From: Xiong Yining Enable CPU cluster support on SbsaQemu platform, so that users can specify a 4-level CPU hierarchy sockets/clusters/cores/threads. And this topology can be passed to the firmware through /cpus/topology Device Tree. Signed-off-by: Xiong Yining Reviewed-by: Marcin Juszkiewicz Reviewed-by: Leif Lindholm Message-id: 20240607103825.1295328-2-xiongyining1480@phytium.com.cn Tested-by: Marcin Juszkiewicz Signed-off-by: Peter Maydell --- docs/system/arm/sbsa.rst | 4 ++++ hw/arm/sbsa-ref.c | 11 ++++++++++- 2 files changed, 14 insertions(+), 1 deletion(-) diff --git a/docs/system/arm/sbsa.rst b/docs/system/arm/sbsa.rst index 2bf22a1d0b0..2bf3fc8d59d 100644 --- a/docs/system/arm/sbsa.rst +++ b/docs/system/arm/sbsa.rst @@ -62,6 +62,7 @@ The devicetree reports: - platform version - GIC addresses - NUMA node id for CPUs and memory + - CPU topology information =20 Platform version '''''''''''''''' @@ -88,3 +89,6 @@ Platform version changes: =20 0.3 The USB controller is an XHCI device, not EHCI. + +0.4 + CPU topology information is present in devicetree. diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c index 87884400e30..ae37a923015 100644 --- a/hw/arm/sbsa-ref.c +++ b/hw/arm/sbsa-ref.c @@ -219,7 +219,7 @@ static void create_fdt(SBSAMachineState *sms) * fw compatibility. */ qemu_fdt_setprop_cell(fdt, "/", "machine-version-major", 0); - qemu_fdt_setprop_cell(fdt, "/", "machine-version-minor", 3); + qemu_fdt_setprop_cell(fdt, "/", "machine-version-minor", 4); =20 if (ms->numa_state->have_numa_distance) { int size =3D nb_numa_nodes * nb_numa_nodes * 3 * sizeof(uint32_t); @@ -276,6 +276,14 @@ static void create_fdt(SBSAMachineState *sms) g_free(nodename); } =20 + /* Add CPU topology description through fdt node topology. */ + qemu_fdt_add_subnode(sms->fdt, "/cpus/topology"); + + qemu_fdt_setprop_cell(sms->fdt, "/cpus/topology", "sockets", ms->smp.s= ockets); + qemu_fdt_setprop_cell(sms->fdt, "/cpus/topology", "clusters", ms->smp.= clusters); + qemu_fdt_setprop_cell(sms->fdt, "/cpus/topology", "cores", ms->smp.cor= es); + qemu_fdt_setprop_cell(sms->fdt, "/cpus/topology", "threads", ms->smp.t= hreads); + sbsa_fdt_add_gic_node(sms); } =20 @@ -898,6 +906,7 @@ static void sbsa_ref_class_init(ObjectClass *oc, void *= data) mc->default_ram_size =3D 1 * GiB; mc->default_ram_id =3D "sbsa-ref.ram"; mc->default_cpus =3D 4; + mc->smp_props.clusters_supported =3D true; mc->possible_cpu_arch_ids =3D sbsa_ref_possible_cpu_arch_ids; mc->cpu_index_to_instance_props =3D sbsa_ref_cpu_index_to_props; mc->get_default_cpu_node_id =3D sbsa_ref_get_default_cpu_node_id; --=20 2.34.1