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Thu, 20 Jun 2024 02:54:49 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFL68UWU2cO0MkRCzMl81MIIDL9bH37FneN/XgDJ5P76z5w1ELkfC/vQnB5fnlMuJp+NR1fIw== X-Received: by 2002:aa7:c315:0:b0:57d:1b21:1a25 with SMTP id 4fb4d7f45d1cf-57d1b211a76mr2045133a12.15.1718877288732; Thu, 20 Jun 2024 02:54:48 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Cc: Richard Henderson Subject: [PATCH 10/10] target/i386: remove gen_ext_tl Date: Thu, 20 Jun 2024 11:54:19 +0200 Message-ID: <20240620095419.386958-11-pbonzini@redhat.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240620095419.386958-1-pbonzini@redhat.com> References: <20240620095419.386958-1-pbonzini@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -22 X-Spam_score: -2.3 X-Spam_bar: -- X-Spam_report: (-2.3 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.144, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1718877398670100011 Content-Type: text/plain; charset="utf-8" With the introduction of tcg_gen_ext_tl, most uses can be converted directly because they do not have a NULL destination. tcg_gen_ext_tl is able to drop no-ops like "tcg_gen_ext_tl(tcgv, tcgv, MO_TL)" just fine, and the only thi= ng that gen_ext_tl was adding on top was avoiding the creation of a useless temporary. This can be done in the only place where it matters, which is gen_op_j_ecx. Reviewed-by: Richard Henderson Signed-off-by: Paolo Bonzini --- target/i386/tcg/translate.c | 41 +++++++++++++++---------------------- 1 file changed, 17 insertions(+), 24 deletions(-) diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c index d11c5e1dc13..5c9c992400e 100644 --- a/target/i386/tcg/translate.c +++ b/target/i386/tcg/translate.c @@ -697,23 +697,16 @@ static inline TCGv gen_compute_Dshift(DisasContext *s= , MemOp ot) return dshift; }; =20 -static TCGv gen_ext_tl(TCGv dst, TCGv src, MemOp size, bool sign) -{ - if (size =3D=3D MO_TL) { - return src; - } - if (!dst) { - dst =3D tcg_temp_new(); - } - tcg_gen_ext_tl(dst, src, size | (sign ? MO_SIGN : 0)); - return dst; -} - static void gen_op_j_ecx(DisasContext *s, TCGCond cond, TCGLabel *label1) { - TCGv tmp =3D gen_ext_tl(NULL, cpu_regs[R_ECX], s->aflag, false); - - tcg_gen_brcondi_tl(cond, tmp, 0, label1); + TCGv lhs; + if (s->aflag =3D=3D MO_TL) { + lhs =3D cpu_regs[R_ECX]; + } else { + lhs =3D tcg_temp_new(); + tcg_gen_ext_tl(lhs, cpu_regs[R_ECX], s->aflag); + } + tcg_gen_brcondi_tl(cond, lhs, 0, label1); } =20 static inline void gen_op_jz_ecx(DisasContext *s, TCGLabel *label1) @@ -886,16 +879,16 @@ static CCPrepare gen_prepare_eflags_c(DisasContext *s= , TCGv reg) case CC_OP_SUBB ... CC_OP_SUBQ: /* (DATA_TYPE)CC_SRCT < (DATA_TYPE)CC_SRC */ size =3D s->cc_op - CC_OP_SUBB; - gen_ext_tl(s->cc_srcT, s->cc_srcT, size, false); - gen_ext_tl(cpu_cc_src, cpu_cc_src, size, false); + tcg_gen_ext_tl(s->cc_srcT, s->cc_srcT, size); + tcg_gen_ext_tl(cpu_cc_src, cpu_cc_src, size); return (CCPrepare) { .cond =3D TCG_COND_LTU, .reg =3D s->cc_srcT, .reg2 =3D cpu_cc_src, .use_reg2 =3D true }; =20 case CC_OP_ADDB ... CC_OP_ADDQ: /* (DATA_TYPE)CC_DST < (DATA_TYPE)CC_SRC */ size =3D s->cc_op - CC_OP_ADDB; - gen_ext_tl(cpu_cc_dst, cpu_cc_dst, size, false); - gen_ext_tl(cpu_cc_src, cpu_cc_src, size, false); + tcg_gen_ext_tl(cpu_cc_dst, cpu_cc_dst, size); + tcg_gen_ext_tl(cpu_cc_src, cpu_cc_src, size); return (CCPrepare) { .cond =3D TCG_COND_LTU, .reg =3D cpu_cc_dst, .reg2 =3D cpu_cc_src, .use_reg2 =3D true }; =20 @@ -920,7 +913,7 @@ static CCPrepare gen_prepare_eflags_c(DisasContext *s, = TCGv reg) =20 case CC_OP_BMILGB ... CC_OP_BMILGQ: size =3D s->cc_op - CC_OP_BMILGB; - gen_ext_tl(cpu_cc_src, cpu_cc_src, size, false); + tcg_gen_ext_tl(cpu_cc_src, cpu_cc_src, size); return (CCPrepare) { .cond =3D TCG_COND_EQ, .reg =3D cpu_cc_src }; =20 case CC_OP_ADCX: @@ -1050,8 +1043,8 @@ static CCPrepare gen_prepare_cc(DisasContext *s, int = b, TCGv reg) size =3D s->cc_op - CC_OP_SUBB; switch (jcc_op) { case JCC_BE: - gen_ext_tl(s->cc_srcT, s->cc_srcT, size, false); - gen_ext_tl(cpu_cc_src, cpu_cc_src, size, false); + tcg_gen_ext_tl(s->cc_srcT, s->cc_srcT, size); + tcg_gen_ext_tl(cpu_cc_src, cpu_cc_src, size); cc =3D (CCPrepare) { .cond =3D TCG_COND_LEU, .reg =3D s->cc_sr= cT, .reg2 =3D cpu_cc_src, .use_reg2 =3D true }; break; @@ -1061,8 +1054,8 @@ static CCPrepare gen_prepare_cc(DisasContext *s, int = b, TCGv reg) case JCC_LE: cond =3D TCG_COND_LE; fast_jcc_l: - gen_ext_tl(s->cc_srcT, s->cc_srcT, size, true); - gen_ext_tl(cpu_cc_src, cpu_cc_src, size, true); + tcg_gen_ext_tl(s->cc_srcT, s->cc_srcT, size | MO_SIGN); + tcg_gen_ext_tl(cpu_cc_src, cpu_cc_src, size | MO_SIGN); cc =3D (CCPrepare) { .cond =3D cond, .reg =3D s->cc_srcT, .reg2 =3D cpu_cc_src, .use_reg2 =3D true }; break; --=20 2.45.2