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([71.212.132.216]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-1f98f8f8c42sm39183765ad.162.2024.06.19.13.59.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 19 Jun 2024 13:59:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1718830797; x=1719435597; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=hRI+iU8AoyX8CSaqkMr42RrHAGDYxA7DtYX1JOZeQXQ=; b=o8aDzx1sEFnKy7+asrBgPek3J3U0+D8o+A/9Fo8l7B66o8xOPaM4Cr8pA5OakA/0G3 fB74MtxuTb8VCcFDtRAuank6G+5NfGZBtIfTGexT4OLPEcjoPZuasnMKYZCrdQzu4QG0 LTJ5G3x4UTq6PXdOzxV+ao9/q25oRkI6hqXfweaxqzub0KfWargkQNrt/v5WOH/HPXjw 6o2ybKdzqNFrqI2aCCDbFdWtk0PJFQghP5q5OiTT1Wx3PGNrV5Y92v5i97vxBJ5I0noH VC9P3WBuFJ6LjzyAdEI79mlGlf8t505w9r68bsQ9FKGv6ypl1pXkwst/mbmGeTECbxAu yoyg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1718830797; x=1719435597; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=hRI+iU8AoyX8CSaqkMr42RrHAGDYxA7DtYX1JOZeQXQ=; b=GBPiqt8iz6X81+lE4RRqBpCnNukI0TuED2AS1rorLjAR0+s3MkiQdCjrewzGCT9dLF tlS3twB3qxKYg3e5i5iVL0Az3v1eb1hymYq2vZ2rBf5UA9/aIdiFJbTwuhFv+TpcwWIy H8fFmlANTVU9V57nBUruRuh/Aquh2Q2fUm5N4LXgBPhI5vypVCAXSKH+XOl1wqC4jOux inD/Qb6CnE0sVV//qVHyBwms2rmtyLMbI1/mFqwMVQFKLGgQS0CGI/oa/C8Fc1M/tiAD 3fY1WasftA7PCE0FpqOYz/HMa3OHMq7lOGrB9wk8UMXlLwjsuFVzn64hl9Z3HRJcmE1O OHYQ== X-Gm-Message-State: AOJu0YyNGHYFMmhalJHWTwFIPmlfp01Yuvr7QupKbGFmKfDSVx00gFeZ Dh+KPgzxifYNhryELmsia/cG5WXsjv5o4GoSOKtEIhX7da6dPfv6YR1H/0Rkcr4cz7dMCztdqB2 a X-Google-Smtp-Source: AGHT+IGIGXzjtKqqN1tc3yHA3aOPWmsoeMcKUn3cGHNBmmoLBn6P49PpJMX4fU2gbs50WEb+WSyOzQ== X-Received: by 2002:a17:903:22d1:b0:1f6:e20f:86ab with SMTP id d9443c01a7336-1f9aa44c98cmr37708065ad.40.1718830797361; Wed, 19 Jun 2024 13:59:57 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Song Gao , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL 04/24] tcg/loongarch64: Support TCG_TYPE_V64 Date: Wed, 19 Jun 2024 13:59:32 -0700 Message-Id: <20240619205952.235946-5-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240619205952.235946-1-richard.henderson@linaro.org> References: <20240619205952.235946-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62b; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1718830928727100004 We can implement this with fld_d, fst_d for load and store, and then use the normal v128 operations in registers. This will improve support for guests which use v64. Reviewed-by: Song Gao Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson --- tcg/loongarch64/tcg-target.h | 2 +- tcg/loongarch64/tcg-target.c.inc | 8 ++++++-- 2 files changed, 7 insertions(+), 3 deletions(-) diff --git a/tcg/loongarch64/tcg-target.h b/tcg/loongarch64/tcg-target.h index 29e4860d20..990bad1d51 100644 --- a/tcg/loongarch64/tcg-target.h +++ b/tcg/loongarch64/tcg-target.h @@ -171,7 +171,7 @@ typedef enum { =20 #define TCG_TARGET_HAS_tst 0 =20 -#define TCG_TARGET_HAS_v64 0 +#define TCG_TARGET_HAS_v64 (cpuinfo & CPUINFO_LSX) #define TCG_TARGET_HAS_v128 (cpuinfo & CPUINFO_LSX) #define TCG_TARGET_HAS_v256 0 =20 diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.= c.inc index de5369536e..980ea10211 100644 --- a/tcg/loongarch64/tcg-target.c.inc +++ b/tcg/loongarch64/tcg-target.c.inc @@ -321,6 +321,7 @@ static bool tcg_out_mov(TCGContext *s, TCGType type, TC= GReg ret, TCGReg arg) } } break; + case TCG_TYPE_V64: case TCG_TYPE_V128: tcg_out_opc_vori_b(s, ret, arg, 0); break; @@ -838,6 +839,7 @@ static void tcg_out_ld(TCGContext *s, TCGType type, TCG= Reg dest, } break; case TCG_TYPE_I64: + case TCG_TYPE_V64: if (dest < TCG_REG_V0) { tcg_out_ldst(s, OPC_LD_D, dest, base, offset); } else { @@ -869,6 +871,7 @@ static void tcg_out_st(TCGContext *s, TCGType type, TCG= Reg src, } break; case TCG_TYPE_I64: + case TCG_TYPE_V64: if (src < TCG_REG_V0) { tcg_out_ldst(s, OPC_ST_D, src, base, offset); } else { @@ -1880,8 +1883,8 @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode o= pc, a2 =3D args[2]; a3 =3D args[3]; =20 - /* Currently only supports V128 */ - tcg_debug_assert(type =3D=3D TCG_TYPE_V128); + /* Currently only supports V64 & V128 */ + tcg_debug_assert(type =3D=3D TCG_TYPE_V64 || type =3D=3D TCG_TYPE_V128= ); =20 switch (opc) { case INDEX_op_st_vec: @@ -2394,6 +2397,7 @@ static void tcg_target_init(TCGContext *s) tcg_regset_reset_reg(tcg_target_call_clobber_regs, TCG_REG_S9); =20 if (cpuinfo & CPUINFO_LSX) { + tcg_target_available_regs[TCG_TYPE_V64] =3D ALL_VECTOR_REGS; tcg_target_available_regs[TCG_TYPE_V128] =3D ALL_VECTOR_REGS; tcg_regset_reset_reg(tcg_target_call_clobber_regs, TCG_REG_V24); tcg_regset_reset_reg(tcg_target_call_clobber_regs, TCG_REG_V25); --=20 2.34.1