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Signed-off-by: Sai Pavan Boddu --- target/arm/debug_helper.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/arm/debug_helper.c b/target/arm/debug_helper.c index 7d856acddf..5deafa4d1f 100644 --- a/target/arm/debug_helper.c +++ b/target/arm/debug_helper.c @@ -970,7 +970,7 @@ static const ARMCPRegInfo debug_cp_reginfo[] =3D { { .name =3D "MDCCSR_EL0", .state =3D ARM_CP_STATE_AA64, .opc0 =3D 2, .opc1 =3D 3, .crn =3D 0, .crm =3D 1, .opc2 =3D 0, .access =3D PL0_R, .accessfn =3D access_tdcc, - .type =3D ARM_CP_CONST, .resetvalue =3D 0 }, + .fieldoffset =3D offsetof(CPUARMState, cp15.mdscr_el1)}, /* Xilinx */ /* * These registers belong to the Debug Communications Channel, * which is not implemented. However we implement RAZ/WI behaviour --=20 2.34.1