From nobody Mon Nov 25 03:53:43 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1718322280; cv=none; d=zohomail.com; s=zohoarc; b=Mr1eRibiFjGASUdBA+CaZWWMe4W7L4VxB4FilIPhDasE0DxfyakQXlnFOYYlGi2E3In1J3dX8OPYstgbGm8EjrpgaVwBWwSFGUgtt1kuz3IxW32wxRCzNWr9Cvyr278g1VJ1rAK8Tvx9lYxFpfCzPmPowzLk0xYGcjA0V2KRnAc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1718322280; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:Reply-To:References:Sender:Subject:Subject:To:To:Message-Id; bh=lvZasbpUGjAOM6smOylcyfv2/qqRdwFfYntDWubUJe8=; b=nQOElNDG9VsfZm3iOQiJFo1/1APg2/4ZoFXqYPDuh6cajqDCsTGmzO695v4HM6MfDEkYXY77bs4U3L5+CBibDCCdbW7Dh0eZ/eqO+HbPX8kOgMDxV3M26uPB1bdxzM+sGDvtvnG6v8Zc/ROlF6CDbm0UKslwxNFjbUytybrna7o= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1718322280009684.5387462692588; Thu, 13 Jun 2024 16:44:40 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sHu7J-0000rb-Gx; Thu, 13 Jun 2024 19:44:29 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sHu7E-0000fa-5k; Thu, 13 Jun 2024 19:44:24 -0400 Received: from frasgout.his.huawei.com ([185.176.79.56]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sHu7C-0004C2-6l; Thu, 13 Jun 2024 19:44:23 -0400 Received: from mail.maildlp.com (unknown [172.18.186.216]) by frasgout.his.huawei.com (SkyGuard) with ESMTP id 4W0fBm4qtcz6K6QZ; Fri, 14 Jun 2024 07:44:16 +0800 (CST) Received: from lhrpeml500001.china.huawei.com (unknown [7.191.163.213]) by mail.maildlp.com (Postfix) with ESMTPS id 871461400D9; Fri, 14 Jun 2024 07:44:19 +0800 (CST) Received: from 00293818-MRGF.china.huawei.com (10.195.245.24) by lhrpeml500001.china.huawei.com (7.191.163.213) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.1.2507.39; Fri, 14 Jun 2024 00:43:57 +0100 To: , , CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH RFC V3 17/29] arm/virt: Release objects for *disabled* possible vCPUs after init Date: Fri, 14 Jun 2024 00:36:27 +0100 Message-ID: <20240613233639.202896-18-salil.mehta@huawei.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240613233639.202896-1-salil.mehta@huawei.com> References: <20240613233639.202896-1-salil.mehta@huawei.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.195.245.24] X-ClientProxiedBy: dggems703-chm.china.huawei.com (10.3.19.180) To lhrpeml500001.china.huawei.com (7.191.163.213) Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=185.176.79.56; envelope-from=salil.mehta@huawei.com; helo=frasgout.his.huawei.com X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-to: Salil Mehta From: Salil Mehta via Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1718322282058100003 Content-Type: text/plain; charset="utf-8" During `machvirt_init()`, QOM ARMCPU objects are pre-created along with the corresponding KVM vCPUs in the host for all possible vCPUs. This is necessa= ry due to the architectural constraint that KVM restricts the deferred creatio= n of KVM vCPUs and VGIC initialization/sizing after VM initialization. Hence, VG= IC is pre-sized with possible vCPUs. After the initialization of the machine is complete, the disabled possible = KVM vCPUs are parked in the per-virt-machine list "kvm_parked_vcpus," and we re= lease the QOM ARMCPU objects for the disabled vCPUs. These will be re-created whe= n the vCPU is hotplugged again. The QOM ARMCPU object is then re-attached to the corresponding parked KVM vCPU. Alternatively, we could have chosen not to release the QOM CPU objects and = kept reusing them. This approach might require some modifications to the `qdevice_add()` interface to retrieve the old ARMCPU object instead of crea= ting a new one for the hotplug request. Each of these approaches has its own pros and cons. This prototype uses the first approach (suggestions are welcome!). Co-developed-by: Keqian Zhu Signed-off-by: Keqian Zhu Signed-off-by: Salil Mehta --- hw/arm/virt.c | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 9d33f30a6a..a72cd3b20d 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -2050,6 +2050,7 @@ static void virt_cpu_post_init(VirtMachineState *vms,= MemoryRegion *sysmem) { CPUArchIdList *possible_cpus =3D vms->parent.possible_cpus; int max_cpus =3D MACHINE(vms)->smp.max_cpus; + MachineState *ms =3D MACHINE(vms); bool aarch64, steal_time; CPUState *cpu; int n; @@ -2111,6 +2112,37 @@ static void virt_cpu_post_init(VirtMachineState *vms= , MemoryRegion *sysmem) } } } + + if (kvm_enabled() || tcg_enabled()) { + for (n =3D 0; n < possible_cpus->len; n++) { + cpu =3D qemu_get_possible_cpu(n); + + /* + * Now, GIC has been sized with possible CPUs and we dont requ= ire + * disabled vCPU objects to be represented in the QOM. Release= the + * disabled ARMCPU objects earlier used during init for pre-si= zing. + * + * We fake to the guest through ACPI about the presence(_STA.P= RES=3D1) + * of these non-existent vCPUs at VMM/qemu and present these as + * disabled vCPUs(_STA.ENA=3D0) so that they cant be used. The= se vCPUs + * can be later added to the guest through hotplug exchanges w= hen + * ARMCPU objects are created back again using 'device_add' QMP + * command. + */ + /* + * RFC: Question: Other approach could've been to keep them fo= rever + * and release it only once when qemu exits as part of finaliz= e or + * when new vCPU is hotplugged. In the later old could be rele= ased + * for the newly created object for the same vCPU? + */ + if (!qemu_enabled_cpu(cpu)) { + CPUArchId *cpu_slot; + cpu_slot =3D virt_find_cpu_slot(ms, cpu->cpu_index); + cpu_slot->cpu =3D NULL; + object_unref(OBJECT(cpu)); + } + } + } } =20 static void virt_cpu_set_properties(Object *cpuobj, const CPUArchId *cpu_s= lot, --=20 2.34.1