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Mon, 10 Jun 2024 20:23:50 -0700 (PDT) From: Chuang Xu To: qemu-devel@nongnu.org Cc: pbonzini@redhat.com, xieyongji@bytedance.com, imammedo@redhat.com, zhao1.liu@intel.com, qemu-stable@nongnu.org, Chuang Xu , Guixiong Wei , Yipeng Yin Subject: [PATCH v3] i386/cpu: fixup number of addressable IDs for processor cores in the physical package Date: Tue, 11 Jun 2024 11:23:14 +0800 Message-Id: <20240611032314.64076-1-xuchuangxclwt@bytedance.com> X-Mailer: git-send-email 2.24.3 (Apple Git-128) MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::236; envelope-from=xuchuangxclwt@bytedance.com; helo=mail-oi1-x236.google.com X-Spam_score_int: -15 X-Spam_score: -1.6 X-Spam_bar: - X-Spam_report: (-1.6 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FROM_LOCAL_NOVOWEL=0.5, HK_RANDOM_ENVFROM=0.001, HK_RANDOM_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @bytedance.com) X-ZM-MESSAGEID: 1718076277494100005 Content-Type: text/plain; charset="utf-8" When QEMU is started with: -cpu host,host-cache-info=3Don,l3-cache=3Doff \ -smp 2,sockets=3D1,dies=3D1,cores=3D1,threads=3D2 Guest can't acquire maximum number of addressable IDs for processor cores in the physical package from CPUID[04H]. When creating a CPU topology of 1 core per package, host-cache-info only uses the Host's addressable core IDs field (CPUID.04H.EAX[bits 31-26]), resulting in a conflict (on the multicore Host) between the Guest core topology information in this field and the Guest's actual cores number. Fix it by removing the unnecessary condition to cover 1 core per package case. This is safe because cores_per_pkg will not be 0 and will be at least 1. Fixes: d7caf13b5fcf ("x86: cpu: fixup number of addressable IDs for logical= processors sharing cache") Signed-off-by: Guixiong Wei Signed-off-by: Yipeng Yin Signed-off-by: Chuang Xu Reviewed-by: Zhao Liu --- target/i386/cpu.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index bc2dceb647..b68f7460db 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -6426,10 +6426,8 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index,= uint32_t count, if (*eax & 31) { int host_vcpus_per_cache =3D 1 + ((*eax & 0x3FFC000) >> 14= ); =20 - if (cores_per_pkg > 1) { - *eax &=3D ~0xFC000000; - *eax |=3D max_core_ids_in_package(&topo_info) << 26; - } + *eax &=3D ~0xFC000000; + *eax |=3D max_core_ids_in_package(&topo_info) << 26; if (host_vcpus_per_cache > threads_per_pkg) { *eax &=3D ~0x3FFC000; =20 --=20 2.20.1