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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::732; envelope-from=porter@cs.unc.edu; helo=mail-qk1-x732.google.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @cs.unc.edu) X-ZM-MESSAGEID: 1717682687219100001 Content-Type: text/plain; charset="utf-8" Signed-off-by: Don Porter --- include/hw/core/sysemu-cpu-ops.h | 6 + include/monitor/monitor.h | 4 + monitor/hmp-cmds-target.c | 5 +- target/i386/cpu.c | 1 + target/i386/cpu.h | 1 + target/i386/monitor.c | 354 ++++--------------------------- 6 files changed, 60 insertions(+), 311 deletions(-) diff --git a/include/hw/core/sysemu-cpu-ops.h b/include/hw/core/sysemu-cpu-= ops.h index bf3de3e004..3bef129460 100644 --- a/include/hw/core/sysemu-cpu-ops.h +++ b/include/hw/core/sysemu-cpu-ops.h @@ -250,6 +250,12 @@ typedef struct SysemuCPUOps { void (*mon_print_pte) (Monitor *mon, CPUArchState *env, hwaddr addr, hwaddr pte); =20 + /** + * @mon_print_mem: Hook called by the monitor to print a range + * of memory mappings in 'info mem' + */ + bool (*mon_print_mem)(CPUState *cs, struct mem_print_state *state); + } SysemuCPUOps; =20 #endif /* SYSEMU_CPU_OPS_H */ diff --git a/include/monitor/monitor.h b/include/monitor/monitor.h index 965f5d5450..e954946ba0 100644 --- a/include/monitor/monitor.h +++ b/include/monitor/monitor.h @@ -5,6 +5,7 @@ #include "qapi/qapi-types-misc.h" #include "qemu/readline.h" #include "exec/hwaddr.h" +#include "hw/core/cpu.h" =20 typedef struct MonitorHMP MonitorHMP; typedef struct MonitorOptions MonitorOptions; @@ -63,4 +64,7 @@ void monitor_register_hmp_info_hrt(const char *name, int error_vprintf_unless_qmp(const char *fmt, va_list ap) G_GNUC_PRINTF(1,= 0); int error_printf_unless_qmp(const char *fmt, ...) G_GNUC_PRINTF(1, 2); =20 +int compressing_iterator(CPUState *cs, void *data, PTE_t *pte, vaddr vaddr= _in, + int height, int offset); + #endif /* MONITOR_H */ diff --git a/monitor/hmp-cmds-target.c b/monitor/hmp-cmds-target.c index 3393e5ad0b..8ce37d3187 100644 --- a/monitor/hmp-cmds-target.c +++ b/monitor/hmp-cmds-target.c @@ -122,9 +122,8 @@ void hmp_info_registers(Monitor *mon, const QDict *qdic= t) } =20 /* Assume only called on present entries */ -static -int compressing_iterator(CPUState *cs, void *data, PTE_t *pte, - vaddr vaddr_in, int height, int offset) +int compressing_iterator(CPUState *cs, void *data, PTE_t *pte, vaddr vaddr= _in, + int height, int offset) { CPUClass *cc =3D CPU_GET_CLASS(cs); struct mem_print_state *state =3D (struct mem_print_state *) data; diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 8bd6164b68..046d75f6bb 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -8316,6 +8316,7 @@ static const struct SysemuCPUOps i386_sysemu_ops =3D { .mon_init_page_table_iterator =3D &x86_mon_init_page_table_iterator, .mon_info_pg_print_header =3D &x86_mon_info_pg_print_header, .mon_flush_page_print_state =3D &x86_mon_flush_print_pg_state, + .mon_print_mem =3D &x86_mon_print_mem, }; #endif =20 diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 1346ec0033..1e463cc556 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -2169,6 +2169,7 @@ void x86_mon_info_pg_print_header(Monitor *mon, struc= t mem_print_state *state); bool x86_mon_flush_print_pg_state(CPUState *cs, struct mem_print_state *st= ate); void x86_mon_print_pte(Monitor *mon, CPUArchState *env, hwaddr addr, hwaddr pte); +bool x86_mon_print_mem(CPUState *cs, struct mem_print_state *state); =20 void x86_cpu_dump_state(CPUState *cs, FILE *f, int flags); =20 diff --git a/target/i386/monitor.c b/target/i386/monitor.c index ecde164857..215c018d1f 100644 --- a/target/i386/monitor.c +++ b/target/i386/monitor.c @@ -281,332 +281,70 @@ void hmp_info_tlb(Monitor *mon, const QDict *qdict) for_each_pte(cs, &mem_print_tlb, &state, false, false); } =20 -static void mem_print(Monitor *mon, CPUArchState *env, - hwaddr *pstart, int *plast_prot, - hwaddr end, int prot) +bool x86_mon_print_mem(CPUState *cs, struct mem_print_state *state) { - int prot1; - prot1 =3D *plast_prot; - if (prot !=3D prot1) { - if (*pstart !=3D -1) { - monitor_printf(mon, HWADDR_FMT_plx "-" HWADDR_FMT_plx " " - HWADDR_FMT_plx " %c%c%c\n", - addr_canonical(env, *pstart), - addr_canonical(env, end), - addr_canonical(env, end - *pstart), - prot1 & PG_USER_MASK ? 'u' : '-', - 'r', - prot1 & PG_RW_MASK ? 'w' : '-'); - } - if (prot !=3D 0) - *pstart =3D end; - else - *pstart =3D -1; - *plast_prot =3D prot; - } -} + CPUArchState *env =3D state->env; + int i =3D 0; =20 -static void mem_info_32(Monitor *mon, CPUArchState *env) -{ - unsigned int l1, l2; - int prot, last_prot; - uint32_t pgd, pde, pte; - hwaddr start, end; - - pgd =3D env->cr[3] & ~0xfff; - last_prot =3D 0; - start =3D -1; - for(l1 =3D 0; l1 < 1024; l1++) { - cpu_physical_memory_read(pgd + l1 * 4, &pde, 4); - pde =3D le32_to_cpu(pde); - end =3D l1 << 22; - if (pde & PG_PRESENT_MASK) { - if ((pde & PG_PSE_MASK) && (env->cr[4] & CR4_PSE_MASK)) { - prot =3D pde & (PG_USER_MASK | PG_RW_MASK | PG_PRESENT_MAS= K); - mem_print(mon, env, &start, &last_prot, end, prot); - } else { - for(l2 =3D 0; l2 < 1024; l2++) { - cpu_physical_memory_read((pde & ~0xfff) + l2 * 4, &pte= , 4); - pte =3D le32_to_cpu(pte); - end =3D (l1 << 22) + (l2 << 12); - if (pte & PG_PRESENT_MASK) { - prot =3D pte & pde & - (PG_USER_MASK | PG_RW_MASK | PG_PRESENT_MASK); - } else { - prot =3D 0; - } - mem_print(mon, env, &start, &last_prot, end, prot); - } - } - } else { - prot =3D 0; - mem_print(mon, env, &start, &last_prot, end, prot); + /* We need to figure out the lowest populated level */ + for ( ; i < state->max_height; i++) { + if (state->vstart[i] !=3D -1) { + break; } } - /* Flush last range */ - mem_print(mon, env, &start, &last_prot, (hwaddr)1 << 32, 0); -} =20 -static void mem_info_pae32(Monitor *mon, CPUArchState *env) -{ - unsigned int l1, l2, l3; - int prot, last_prot; - uint64_t pdpe, pde, pte; - uint64_t pdp_addr, pd_addr, pt_addr; - hwaddr start, end; - - pdp_addr =3D env->cr[3] & ~0x1f; - last_prot =3D 0; - start =3D -1; - for (l1 =3D 0; l1 < 4; l1++) { - cpu_physical_memory_read(pdp_addr + l1 * 8, &pdpe, 8); - pdpe =3D le64_to_cpu(pdpe); - end =3D l1 << 30; - if (pdpe & PG_PRESENT_MASK) { - pd_addr =3D pdpe & 0x3fffffffff000ULL; - for (l2 =3D 0; l2 < 512; l2++) { - cpu_physical_memory_read(pd_addr + l2 * 8, &pde, 8); - pde =3D le64_to_cpu(pde); - end =3D (l1 << 30) + (l2 << 21); - if (pde & PG_PRESENT_MASK) { - if (pde & PG_PSE_MASK) { - prot =3D pde & (PG_USER_MASK | PG_RW_MASK | - PG_PRESENT_MASK); - mem_print(mon, env, &start, &last_prot, end, prot); - } else { - pt_addr =3D pde & 0x3fffffffff000ULL; - for (l3 =3D 0; l3 < 512; l3++) { - cpu_physical_memory_read(pt_addr + l3 * 8, &pt= e, 8); - pte =3D le64_to_cpu(pte); - end =3D (l1 << 30) + (l2 << 21) + (l3 << 12); - if (pte & PG_PRESENT_MASK) { - prot =3D pte & pde & (PG_USER_MASK | PG_RW= _MASK | - PG_PRESENT_MASK); - } else { - prot =3D 0; - } - mem_print(mon, env, &start, &last_prot, end, p= rot); - } - } - } else { - prot =3D 0; - mem_print(mon, env, &start, &last_prot, end, prot); - } - } - } else { - prot =3D 0; - mem_print(mon, env, &start, &last_prot, end, prot); - } - } - /* Flush last range */ - mem_print(mon, env, &start, &last_prot, (hwaddr)1 << 32, 0); -} + hwaddr vstart =3D state->vstart[i]; + hwaddr end =3D state->vend[i] + x86_pte_leaf_page_size(cs, i); + int prot =3D x86_pte_flags(state->ent[i]); =20 =20 -#ifdef TARGET_X86_64 -static void mem_info_la48(Monitor *mon, CPUArchState *env) -{ - int prot, last_prot; - uint64_t l1, l2, l3, l4; - uint64_t pml4e, pdpe, pde, pte; - uint64_t pml4_addr, pdp_addr, pd_addr, pt_addr, start, end; - - pml4_addr =3D env->cr[3] & 0x3fffffffff000ULL; - last_prot =3D 0; - start =3D -1; - for (l1 =3D 0; l1 < 512; l1++) { - cpu_physical_memory_read(pml4_addr + l1 * 8, &pml4e, 8); - pml4e =3D le64_to_cpu(pml4e); - end =3D l1 << 39; - if (pml4e & PG_PRESENT_MASK) { - pdp_addr =3D pml4e & 0x3fffffffff000ULL; - for (l2 =3D 0; l2 < 512; l2++) { - cpu_physical_memory_read(pdp_addr + l2 * 8, &pdpe, 8); - pdpe =3D le64_to_cpu(pdpe); - end =3D (l1 << 39) + (l2 << 30); - if (pdpe & PG_PRESENT_MASK) { - if (pdpe & PG_PSE_MASK) { - prot =3D pdpe & (PG_USER_MASK | PG_RW_MASK | - PG_PRESENT_MASK); - prot &=3D pml4e; - mem_print(mon, env, &start, &last_prot, end, prot); - } else { - pd_addr =3D pdpe & 0x3fffffffff000ULL; - for (l3 =3D 0; l3 < 512; l3++) { - cpu_physical_memory_read(pd_addr + l3 * 8, &pd= e, 8); - pde =3D le64_to_cpu(pde); - end =3D (l1 << 39) + (l2 << 30) + (l3 << 21); - if (pde & PG_PRESENT_MASK) { - if (pde & PG_PSE_MASK) { - prot =3D pde & (PG_USER_MASK | PG_RW_M= ASK | - PG_PRESENT_MASK); - prot &=3D pml4e & pdpe; - mem_print(mon, env, &start, - &last_prot, end, prot); - } else { - pt_addr =3D pde & 0x3fffffffff000ULL; - for (l4 =3D 0; l4 < 512; l4++) { - cpu_physical_memory_read(pt_addr - + l4 * 8, - &pte, 8); - pte =3D le64_to_cpu(pte); - end =3D (l1 << 39) + (l2 << 30) + - (l3 << 21) + (l4 << 12); - if (pte & PG_PRESENT_MASK) { - prot =3D pte & (PG_USER_MASK |= PG_RW_MASK | - PG_PRESENT_MASK); - prot &=3D pml4e & pdpe & pde; - } else { - prot =3D 0; - } - mem_print(mon, env, &start, - &last_prot, end, prot); - } - } - } else { - prot =3D 0; - mem_print(mon, env, &start, - &last_prot, end, prot); - } - } - } - } else { - prot =3D 0; - mem_print(mon, env, &start, &last_prot, end, prot); - } - } - } else { - prot =3D 0; - mem_print(mon, env, &start, &last_prot, end, prot); - } - } - /* Flush last range */ - mem_print(mon, env, &start, &last_prot, (hwaddr)1 << 48, 0); + monitor_printf(state->mon, HWADDR_FMT_plx "-" HWADDR_FMT_plx " " + HWADDR_FMT_plx " %c%c%c\n", + addr_canonical(env, vstart), + addr_canonical(env, end), + addr_canonical(env, end - vstart), + prot & PG_USER_MASK ? 'u' : '-', + 'r', + prot & PG_RW_MASK ? 'w' : '-'); + return true; } =20 -static void mem_info_la57(Monitor *mon, CPUArchState *env) +void hmp_info_mem(Monitor *mon, const QDict *qdict) { - int prot, last_prot; - uint64_t l0, l1, l2, l3, l4; - uint64_t pml5e, pml4e, pdpe, pde, pte; - uint64_t pml5_addr, pml4_addr, pdp_addr, pd_addr, pt_addr, start, end; - - pml5_addr =3D env->cr[3] & 0x3fffffffff000ULL; - last_prot =3D 0; - start =3D -1; - for (l0 =3D 0; l0 < 512; l0++) { - cpu_physical_memory_read(pml5_addr + l0 * 8, &pml5e, 8); - pml5e =3D le64_to_cpu(pml5e); - end =3D l0 << 48; - if (!(pml5e & PG_PRESENT_MASK)) { - prot =3D 0; - mem_print(mon, env, &start, &last_prot, end, prot); - continue; - } - - pml4_addr =3D pml5e & 0x3fffffffff000ULL; - for (l1 =3D 0; l1 < 512; l1++) { - cpu_physical_memory_read(pml4_addr + l1 * 8, &pml4e, 8); - pml4e =3D le64_to_cpu(pml4e); - end =3D (l0 << 48) + (l1 << 39); - if (!(pml4e & PG_PRESENT_MASK)) { - prot =3D 0; - mem_print(mon, env, &start, &last_prot, end, prot); - continue; - } + struct mem_print_state state; + CPUState *cs =3D mon_get_cpu(mon); =20 - pdp_addr =3D pml4e & 0x3fffffffff000ULL; - for (l2 =3D 0; l2 < 512; l2++) { - cpu_physical_memory_read(pdp_addr + l2 * 8, &pdpe, 8); - pdpe =3D le64_to_cpu(pdpe); - end =3D (l0 << 48) + (l1 << 39) + (l2 << 30); - if (pdpe & PG_PRESENT_MASK) { - prot =3D 0; - mem_print(mon, env, &start, &last_prot, end, prot); - continue; - } - - if (pdpe & PG_PSE_MASK) { - prot =3D pdpe & (PG_USER_MASK | PG_RW_MASK | - PG_PRESENT_MASK); - prot &=3D pml5e & pml4e; - mem_print(mon, env, &start, &last_prot, end, prot); - continue; - } - - pd_addr =3D pdpe & 0x3fffffffff000ULL; - for (l3 =3D 0; l3 < 512; l3++) { - cpu_physical_memory_read(pd_addr + l3 * 8, &pde, 8); - pde =3D le64_to_cpu(pde); - end =3D (l0 << 48) + (l1 << 39) + (l2 << 30) + (l3 << = 21); - if (pde & PG_PRESENT_MASK) { - prot =3D 0; - mem_print(mon, env, &start, &last_prot, end, prot); - continue; - } - - if (pde & PG_PSE_MASK) { - prot =3D pde & (PG_USER_MASK | PG_RW_MASK | - PG_PRESENT_MASK); - prot &=3D pml5e & pml4e & pdpe; - mem_print(mon, env, &start, &last_prot, end, prot); - continue; - } - - pt_addr =3D pde & 0x3fffffffff000ULL; - for (l4 =3D 0; l4 < 512; l4++) { - cpu_physical_memory_read(pt_addr + l4 * 8, &pte, 8= ); - pte =3D le64_to_cpu(pte); - end =3D (l0 << 48) + (l1 << 39) + (l2 << 30) + - (l3 << 21) + (l4 << 12); - if (pte & PG_PRESENT_MASK) { - prot =3D pte & (PG_USER_MASK | PG_RW_MASK | - PG_PRESENT_MASK); - prot &=3D pml5e & pml4e & pdpe & pde; - } else { - prot =3D 0; - } - mem_print(mon, env, &start, &last_prot, end, prot); - } - } - } - } + if (!cs) { + monitor_printf(mon, "Unable to get CPUState. Internal error\n"); + return; } - /* Flush last range */ - mem_print(mon, env, &start, &last_prot, (hwaddr)1 << 57, 0); -} -#endif /* TARGET_X86_64 */ =20 -void hmp_info_mem(Monitor *mon, const QDict *qdict) -{ - CPUArchState *env; + CPUClass *cc =3D CPU_GET_CLASS(cs); =20 - env =3D mon_get_cpu_env(mon); - if (!env) { - monitor_printf(mon, "No CPU available\n"); - return; + if ((!cc->sysemu_ops->pte_child) + || (!cc->sysemu_ops->pte_leaf) + || (!cc->sysemu_ops->pte_leaf_page_size) + || (!cc->sysemu_ops->page_table_entries_per_node) + || (!cc->sysemu_ops->pte_flags) + || (!cc->sysemu_ops->mon_print_mem) + || (!cc->sysemu_ops->mon_init_page_table_iterator)) { + monitor_printf(mon, "Info tlb unsupported on this ISA\n"); } =20 - if (!(env->cr[0] & CR0_PG_MASK)) { - monitor_printf(mon, "PG disabled\n"); + if (!cc->sysemu_ops->mon_init_page_table_iterator(mon, &state)) { + monitor_printf(mon, "Unable to initialize page table iterator\n"); return; } - if (env->cr[4] & CR4_PAE_MASK) { -#ifdef TARGET_X86_64 - if (env->hflags & HF_LMA_MASK) { - if (env->cr[4] & CR4_LA57_MASK) { - mem_info_la57(mon, env); - } else { - mem_info_la48(mon, env); - } - } else -#endif - { - mem_info_pae32(mon, env); - } - } else { - mem_info_32(mon, env); - } + + state.flusher =3D cc->sysemu_ops->mon_print_mem; + + /** + * We must visit interior entries to update prot + */ + for_each_pte(cs, &compressing_iterator, &state, true, false); + + /* Flush the last entry, if needed */ + cc->sysemu_ops->mon_print_mem(cs, &state); } =20 void hmp_mce(Monitor *mon, const QDict *qdict) --=20 2.34.1