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([71.212.132.216]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2c28066d511sm1720915a91.9.2024.06.05.10.23.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 05 Jun 2024 10:23:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1717608185; x=1718212985; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=iHJotesaXwGLwu2EOqL2F77EqNf5qS0c2hknFMUEE6I=; b=dc5mwgRx0SJ67sKHKz6TIcyitWrP5zhXt5ZFGfsaoVFh78heAzKoR2Nej3tw7z2ORr 8ODKt2p9IOnzi9YtEiqhW2vU57uuGyENrijtX4aHyz2JU3qePBejEY7C783zwTU9dodU j2ldCXOjSd3MKFEfGuBbi7W2r9SrbhJ/4AZVVs71ryo/VhZFypsa/Y9GgFs9vDnkuttN 0HWBiVuXwVxuT9S76x0DPcBP5oQ/1Rh+xjn+1gUC6h/JJ+xYOx0CmiD311w/ZnEBHspp TjS99upVv6VOEMRWhsJymy8hMNWcDr5sXs8jnVxvr7ZtARsM/DPb6wwOsPQzl1Qp6NLw 3iqg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1717608185; x=1718212985; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=iHJotesaXwGLwu2EOqL2F77EqNf5qS0c2hknFMUEE6I=; b=pUBj0KPaY3vBid1onfxS+EKVNt4ChKStN0DNNmhtwCdf3Pv4WKY1f9SRYFk4sKzUDq zh6cP6uU+uSqQTXEDR7aeG+uUgFmYo2BgWim/+amuWBeOoTZtRnQdHDsI+9N9hlagrps kduE5R6kndtlfhO9BBSCIGgyI8eZU2njPssDlc0vExgZi99wgkS6DAoxq+E/lrbV1vVZ f895bos4epeYW5wnpfttV/rrfH44fBNojKtDcxuuEd6IUSYbf88oOzrpGNsCygdMCS1M aQ3BS5dvLuUWOnSVDeMQj+CXyKaOW3MqBj+AGAC3unddGd/9Vus+qJUJGvy7vrpwfXsk Hl5Q== X-Gm-Message-State: AOJu0Yy6y0Z2zbPgo96EEZkhS2kW3k9dqqj96JQHKnvj0U/OCdZXUmxm vJ2QNDurasFYisY2KaaFlCOAse14D8E4Q8yrqFR9iSRd1ki39G8mJcnaByIn33s2HEJl5vbvgte k X-Google-Smtp-Source: AGHT+IGZ7UJd184z0i7ayZIKGigLyHWYbsnzKmYWuKM/BLRRq8y0KVuKW9t4MACpG41y/dicWLTbbg== X-Received: by 2002:a17:90b:1bcd:b0:2bd:f4ba:fc3 with SMTP id 98e67ed59e1d1-2c29998dd5amr399530a91.7.1717608185467; Wed, 05 Jun 2024 10:23:05 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PULL 11/38] target/sparc: Add feature bits for VIS 3 Date: Wed, 5 Jun 2024 10:22:26 -0700 Message-Id: <20240605172253.356302-12-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240605172253.356302-1-richard.henderson@linaro.org> References: <20240605172253.356302-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::432; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x432.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1717608258660100001 The manual separates VIS 3 and VIS 3B, even though they are both present in all extant cpus. For clarity, let the translator match the manual but otherwise leave them on the same feature bit. Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson --- target/sparc/cpu-feature.h.inc | 1 + target/sparc/translate.c | 4 ++++ 2 files changed, 5 insertions(+) diff --git a/target/sparc/cpu-feature.h.inc b/target/sparc/cpu-feature.h.inc index a30b9255b2..3913fb4a54 100644 --- a/target/sparc/cpu-feature.h.inc +++ b/target/sparc/cpu-feature.h.inc @@ -13,3 +13,4 @@ FEATURE(CACHE_CTRL) FEATURE(POWERDOWN) FEATURE(CASA) FEATURE(FMAF) +FEATURE(VIS3) diff --git a/target/sparc/translate.c b/target/sparc/translate.c index 5efd09f4f4..59b922c903 100644 --- a/target/sparc/translate.c +++ b/target/sparc/translate.c @@ -2188,6 +2188,8 @@ static int extract_qfpreg(DisasContext *dc, int x) # define avail_HYPV(C) ((C)->def->features & CPU_FEATURE_HYPV) # define avail_VIS1(C) ((C)->def->features & CPU_FEATURE_VIS1) # define avail_VIS2(C) ((C)->def->features & CPU_FEATURE_VIS2) +# define avail_VIS3(C) ((C)->def->features & CPU_FEATURE_VIS3) +# define avail_VIS3B(C) avail_VIS3(C) #else # define avail_32(C) true # define avail_ASR17(C) ((C)->def->features & CPU_FEATURE_ASR17) @@ -2201,6 +2203,8 @@ static int extract_qfpreg(DisasContext *dc, int x) # define avail_HYPV(C) false # define avail_VIS1(C) false # define avail_VIS2(C) false +# define avail_VIS3(C) false +# define avail_VIS3B(C) false #endif =20 /* Default case for non jump instructions. */ --=20 2.34.1