From nobody Mon Nov 25 07:45:18 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1717157356; cv=none; d=zohomail.com; s=zohoarc; b=hb5BTJkoMHAN7gKrDY7LIxYc3vCk1LOb3G09iakuH84szLoWSsPFhU39TnD3uNHJQ/8Exk7vGdxHWSeYmjuHijxr6/ONn9JCn0YDdJl0Yy/vNObPjRxNCxH2KLWmxibYf1FFhc9E1/BeHtVe4SHxuSXLRU4cBvgz/2IGzBcn1bU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1717157356; h=Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=uKUpbO0X2klFGTk6Eos5V4Xr1EKeA/yz40dK6kKVqHU=; b=Y/D62/Z3hI5nbunArawCeMA+x6q/LN+0qwTSMADAm1BlQfJ6tbW9Q7dAyRDYWylCM3QIk3bgGoCffYGRBFfg4lH0P2mPGxr3pCetbFS6BNi8FWy/+m58KjFxyvk+o64kIZP56F2/W2iAMTW2lsQqp1/41mBcBionvbldS3AF9p4= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1717157356880164.86427535402868; Fri, 31 May 2024 05:09:16 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sD0zu-0004UG-GY; Fri, 31 May 2024 08:04:38 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sD0zg-0004Ms-3u for qemu-devel@nongnu.org; Fri, 31 May 2024 08:04:24 -0400 Received: from mail-lj1-x22e.google.com ([2a00:1450:4864:20::22e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sD0za-0003RQ-T5 for qemu-devel@nongnu.org; Fri, 31 May 2024 08:04:23 -0400 Received: by mail-lj1-x22e.google.com with SMTP id 38308e7fff4ca-2e72224c395so17490291fa.3 for ; Fri, 31 May 2024 05:04:18 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-42129de0cf9sm37027685e9.13.2024.05.31.05.04.16 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 31 May 2024 05:04:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1717157057; x=1717761857; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=uKUpbO0X2klFGTk6Eos5V4Xr1EKeA/yz40dK6kKVqHU=; b=qRdy1wTS4Fn3Az07bSBqOSfeWO2ZAxWOfw1Ff3VeMU3zpynKkW0dWmbw5TZFCwWxhQ fnN2BJFqGDZV+097SWX8MCbboLCwh0KclVK8xwRBD9ExtaEIZwi6gVymoz5MRqV/OJyU mbdrTQgePPdZyL46rhognvFjduW24P/6XGVBLPvF/i8l/qK0hnQpCdNKBaPt6NSFkVOV NeqbqNd78QYUphPKau/vM0sh2Njj2VF32HDS82KLhcsIrpCLPTnZcwvuVjhvK8w+/HPP jk3wYlPHjzrpZ6B1ZSGFGFQUdDm19xijNHFKzSJcii0IvKbFJCoh5KZeLkxhqy7KDTOx 5mlQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1717157057; x=1717761857; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=uKUpbO0X2klFGTk6Eos5V4Xr1EKeA/yz40dK6kKVqHU=; b=JLC4gzIq+F8J8X8iow8lp9D6CR6TxWtrQCJ7VpxhL/wusUxkMJzsTAhsSA4IMf9ehZ mciMtIokqen1oaDpGX/HG0H4z+R7DWd+Dnht/2H8AW5WmsEubohGvTDPhOtAJcQzTPQ0 HqyNYgde6FVapgaR1CC73+fAcRt0s7UGRJV972+LghcY/InPRMInNZNgEyQxWpxKLZla 1E24PImrGPTYg1trhxxQrC9D2PZ/yZS7ot5LEFp0j3BfMnDBImUCjjIMkKfv+gwwrEZj tzL2dU5MjF9ZNxc/xSyI8zo/m4u8LhZmOxZ4D62/T5u6Ij9W/YCPLujyI1rVUnQgoac9 HMbQ== X-Gm-Message-State: AOJu0YyjhFBCOle7HKr67ZZT3PD5kUDpV5Qg1TiVRj/9sbGCsD+g9DW4 0U2gQEpB9+YZc2rpTNQAv2w89G3q6CtvjhZPh39bQ2mFZWB3lB6m2+TNduUw0TQXuiVwc5CwHJe X X-Google-Smtp-Source: AGHT+IHBkPAaUBj38ShdW6oJ+089nm9VrkYTnqMF5bDLSg3ULvtXtVcyMeRXbVAGMoOXgcFNWcXN5w== X-Received: by 2002:a2e:9843:0:b0:2ea:8895:ae9c with SMTP id 38308e7fff4ca-2ea950f078amr11805631fa.17.1717157056790; Fri, 31 May 2024 05:04:16 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 18/43] target/arm: Convert SQSHL, UQSHL to decodetree Date: Fri, 31 May 2024 13:03:36 +0100 Message-Id: <20240531120401.394550-19-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240531120401.394550-1-peter.maydell@linaro.org> References: <20240531120401.394550-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::22e; envelope-from=peter.maydell@linaro.org; helo=mail-lj1-x22e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1717157357346100001 Content-Type: text/plain; charset="utf-8" From: Richard Henderson Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson Message-id: 20240528203044.612851-14-richard.henderson@linaro.org Signed-off-by: Peter Maydell --- target/arm/tcg/a64.decode | 4 ++ target/arm/tcg/translate-a64.c | 74 ++++++++++++++++++++++------------ 2 files changed, 53 insertions(+), 25 deletions(-) diff --git a/target/arm/tcg/a64.decode b/target/arm/tcg/a64.decode index 9e027760367..85caf379486 100644 --- a/target/arm/tcg/a64.decode +++ b/target/arm/tcg/a64.decode @@ -760,6 +760,8 @@ SSHL_s 0101 1110 111 ..... 01000 1 ..... .....= @rrr_d USHL_s 0111 1110 111 ..... 01000 1 ..... ..... @rrr_d SRSHL_s 0101 1110 111 ..... 01010 1 ..... ..... @rrr_d URSHL_s 0111 1110 111 ..... 01010 1 ..... ..... @rrr_d +SQSHL_s 0101 1110 ..1 ..... 01001 1 ..... ..... @rrr_e +UQSHL_s 0111 1110 ..1 ..... 01001 1 ..... ..... @rrr_e =20 ### Advanced SIMD scalar pairwise =20 @@ -886,6 +888,8 @@ SSHL_v 0.00 1110 ..1 ..... 01000 1 ..... .....= @qrrr_e USHL_v 0.10 1110 ..1 ..... 01000 1 ..... ..... @qrrr_e SRSHL_v 0.00 1110 ..1 ..... 01010 1 ..... ..... @qrrr_e URSHL_v 0.10 1110 ..1 ..... 01010 1 ..... ..... @qrrr_e +SQSHL_v 0.00 1110 ..1 ..... 01001 1 ..... ..... @qrrr_e +UQSHL_v 0.10 1110 ..1 ..... 01001 1 ..... ..... @qrrr_e =20 ### Advanced SIMD scalar x indexed element =20 diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c index c88702dad66..97bd69eb3f8 100644 --- a/target/arm/tcg/translate-a64.c +++ b/target/arm/tcg/translate-a64.c @@ -5119,6 +5119,49 @@ TRANS(USHL_s, do_int3_scalar_d, a, gen_ushl_i64) TRANS(SRSHL_s, do_int3_scalar_d, a, gen_helper_neon_rshl_s64) TRANS(URSHL_s, do_int3_scalar_d, a, gen_helper_neon_rshl_u64) =20 +typedef struct ENVScalar2 { + NeonGenTwoOpEnvFn *gen_bhs[3]; + NeonGenTwo64OpEnvFn *gen_d; +} ENVScalar2; + +static bool do_env_scalar2(DisasContext *s, arg_rrr_e *a, const ENVScalar2= *f) +{ + if (!fp_access_check(s)) { + return true; + } + if (a->esz =3D=3D MO_64) { + TCGv_i64 t0 =3D read_fp_dreg(s, a->rn); + TCGv_i64 t1 =3D read_fp_dreg(s, a->rm); + f->gen_d(t0, tcg_env, t0, t1); + write_fp_dreg(s, a->rd, t0); + } else { + TCGv_i32 t0 =3D tcg_temp_new_i32(); + TCGv_i32 t1 =3D tcg_temp_new_i32(); + + read_vec_element_i32(s, t0, a->rn, 0, a->esz); + read_vec_element_i32(s, t1, a->rm, 0, a->esz); + f->gen_bhs[a->esz](t0, tcg_env, t0, t1); + write_fp_sreg(s, a->rd, t0); + } + return true; +} + +static const ENVScalar2 f_scalar_sqshl =3D { + { gen_helper_neon_qshl_s8, + gen_helper_neon_qshl_s16, + gen_helper_neon_qshl_s32 }, + gen_helper_neon_qshl_s64, +}; +TRANS(SQSHL_s, do_env_scalar2, a, &f_scalar_sqshl) + +static const ENVScalar2 f_scalar_uqshl =3D { + { gen_helper_neon_qshl_u8, + gen_helper_neon_qshl_u16, + gen_helper_neon_qshl_u32 }, + gen_helper_neon_qshl_u64, +}; +TRANS(UQSHL_s, do_env_scalar2, a, &f_scalar_uqshl) + static bool do_fp3_vector(DisasContext *s, arg_qrrr_e *a, gen_helper_gvec_3_ptr * const fns[3]) { @@ -5368,6 +5411,8 @@ TRANS(SSHL_v, do_gvec_fn3, a, gen_gvec_sshl) TRANS(USHL_v, do_gvec_fn3, a, gen_gvec_ushl) TRANS(SRSHL_v, do_gvec_fn3, a, gen_gvec_srshl) TRANS(URSHL_v, do_gvec_fn3, a, gen_gvec_urshl) +TRANS(SQSHL_v, do_gvec_fn3, a, gen_neon_sqshl) +TRANS(UQSHL_v, do_gvec_fn3, a, gen_neon_uqshl) =20 =20 /* @@ -9381,13 +9426,6 @@ static void handle_3same_64(DisasContext *s, int opc= ode, bool u, } gen_cmtst_i64(tcg_rd, tcg_rn, tcg_rm); break; - case 0x9: /* SQSHL, UQSHL */ - if (u) { - gen_helper_neon_qshl_u64(tcg_rd, tcg_env, tcg_rn, tcg_rm); - } else { - gen_helper_neon_qshl_s64(tcg_rd, tcg_env, tcg_rn, tcg_rm); - } - break; case 0xb: /* SQRSHL, UQRSHL */ if (u) { gen_helper_neon_qrshl_u64(tcg_rd, tcg_env, tcg_rn, tcg_rm); @@ -9406,6 +9444,7 @@ static void handle_3same_64(DisasContext *s, int opco= de, bool u, case 0x1: /* SQADD / UQADD */ case 0x5: /* SQSUB / UQSUB */ case 0x8: /* SSHL, USHL */ + case 0x9: /* SQSHL, UQSHL */ case 0xa: /* SRSHL, URSHL */ g_assert_not_reached(); } @@ -9428,7 +9467,6 @@ static void disas_simd_scalar_three_reg_same(DisasCon= text *s, uint32_t insn) TCGv_i64 tcg_rd; =20 switch (opcode) { - case 0x9: /* SQSHL, UQSHL */ case 0xb: /* SQRSHL, UQRSHL */ break; case 0x6: /* CMGT, CMHI */ @@ -9450,6 +9488,7 @@ static void disas_simd_scalar_three_reg_same(DisasCon= text *s, uint32_t insn) case 0x1: /* SQADD, UQADD */ case 0x5: /* SQSUB, UQSUB */ case 0x8: /* SSHL, USHL */ + case 0x9: /* SQSHL, UQSHL */ case 0xa: /* SRSHL, URSHL */ unallocated_encoding(s); return; @@ -9477,16 +9516,6 @@ static void disas_simd_scalar_three_reg_same(DisasCo= ntext *s, uint32_t insn) void (*genfn)(TCGv_i64, TCGv_i64, TCGv_i64, TCGv_i64, MemOp) =3D N= ULL; =20 switch (opcode) { - case 0x9: /* SQSHL, UQSHL */ - { - static NeonGenTwoOpEnvFn * const fns[3][2] =3D { - { gen_helper_neon_qshl_s8, gen_helper_neon_qshl_u8 }, - { gen_helper_neon_qshl_s16, gen_helper_neon_qshl_u16 }, - { gen_helper_neon_qshl_s32, gen_helper_neon_qshl_u32 }, - }; - genenvfn =3D fns[size][u]; - break; - } case 0xb: /* SQRSHL, UQRSHL */ { static NeonGenTwoOpEnvFn * const fns[3][2] =3D { @@ -9510,6 +9539,7 @@ static void disas_simd_scalar_three_reg_same(DisasCon= text *s, uint32_t insn) default: case 0x1: /* SQADD, UQADD */ case 0x5: /* SQSUB, UQSUB */ + case 0x9: /* SQSHL, UQSHL */ g_assert_not_reached(); } =20 @@ -10927,6 +10957,7 @@ static void disas_simd_3same_int(DisasContext *s, u= int32_t insn) case 0x01: /* SQADD, UQADD */ case 0x05: /* SQSUB, UQSUB */ case 0x08: /* SSHL, USHL */ + case 0x09: /* SQSHL, UQSHL */ case 0x0a: /* SRSHL, URSHL */ unallocated_encoding(s); return; @@ -10937,13 +10968,6 @@ static void disas_simd_3same_int(DisasContext *s, = uint32_t insn) } =20 switch (opcode) { - case 0x09: /* SQSHL, UQSHL */ - if (u) { - gen_gvec_fn3(s, is_q, rd, rn, rm, gen_neon_uqshl, size); - } else { - gen_gvec_fn3(s, is_q, rd, rn, rm, gen_neon_sqshl, size); - } - return; case 0x0c: /* SMAX, UMAX */ if (u) { gen_gvec_fn3(s, is_q, rd, rn, rm, tcg_gen_gvec_umax, size); --=20 2.34.1