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Tsirkin" , Marcel Apfelbaum , qemu-devel@nongnu.org Cc: Nam Cao Subject: [PATCH] pci-bridge/xio3130_downstream: fix invalid link speed and link width Date: Wed, 29 May 2024 15:21:25 +0200 Message-Id: <20240529132125.106790-1-namcao@linutronix.de> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=193.142.43.55; envelope-from=namcao@linutronix.de; helo=galois.linutronix.de X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-Mailman-Approved-At: Wed, 29 May 2024 09:34:10 -0400 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linutronix.de) X-ZM-MESSAGEID: 1716989690294100015 Content-Type: text/plain; charset="utf-8" Set link width to x1 and link speed to 2.5 Gb/s as specified by the datasheet. Without this, these fields in the link status register read zero, which is incorrect. This problem appeared since 3d67447fe7c2 ("pcie: Fill PCIESlot link fields to support higher speeds and widths"), which allows PCIe slot to set link width and link speed. However, if PCIe slot does not explicitly set these properties, they will be zero. Before this commit, the width and speed default to x1 and 2.5 Gb/s. Fixes: 3d67447fe7c2 ("pcie: Fill PCIESlot link fields to support higher spe= eds and widths") Signed-off-by: Nam Cao --- hw/pci-bridge/xio3130_downstream.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/hw/pci-bridge/xio3130_downstream.c b/hw/pci-bridge/xio3130_dow= nstream.c index 38a2361fa2..d949431191 100644 --- a/hw/pci-bridge/xio3130_downstream.c +++ b/hw/pci-bridge/xio3130_downstream.c @@ -172,10 +172,18 @@ static void xio3130_downstream_class_init(ObjectClass= *klass, void *data) device_class_set_props(dc, xio3130_downstream_props); } =20 +static void xio3130_downstream_instance_post_init(Object *obj) +{ + PCIESlot *s =3D PCIE_SLOT(obj); + s->speed =3D QEMU_PCI_EXP_LNK_2_5GT; + s->width =3D QEMU_PCI_EXP_LNK_X1; +} + static const TypeInfo xio3130_downstream_info =3D { .name =3D TYPE_XIO3130_DOWNSTREAM, .parent =3D TYPE_PCIE_SLOT, .class_init =3D xio3130_downstream_class_init, + .instance_post_init =3D xio3130_downstream_instance_post_init, .interfaces =3D (InterfaceInfo[]) { { INTERFACE_PCIE_DEVICE }, { } --=20 2.39.2