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From: Alistair Francis <alistair23@gmail.com>
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To: qemu-devel@nongnu.org
Cc: alistair23@gmail.com, Max Chou <max.chou@sifive.com>,
Daniel Henrique Barboza <dbarboza@ventanamicro.com>,
qemu-stable <qemu-stable@nongnu.org>,
Alistair Francis <alistair.francis@wdc.com>
Subject: [PULL 19/28] target/riscv: rvv: Check single width operator for
vfncvt.rod.f.f.w
Date: Tue, 28 May 2024 12:43:19 +1000
Message-ID: <20240528024328.246965-20-alistair.francis@wdc.com>
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From: Max Chou <max.chou@sifive.com>
The opfv_narrow_check needs to check the single width float operator by
require_rvf.
Signed-off-by: Max Chou <max.chou@sifive.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Cc: qemu-stable <qemu-stable@nongnu.org>
Message-ID: <20240322092600.1198921-4-max.chou@sifive.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
target/riscv/insn_trans/trans_rvv.c.inc | 1 +
1 file changed, 1 insertion(+)
diff --git a/target/riscv/insn_trans/trans_rvv.c.inc b/target/riscv/insn_tr=
ans/trans_rvv.c.inc
index a7217aed4e..c3af38af80 100644
--- a/target/riscv/insn_trans/trans_rvv.c.inc
+++ b/target/riscv/insn_trans/trans_rvv.c.inc
@@ -2817,6 +2817,7 @@ static bool opffv_narrow_check(DisasContext *s, arg_r=
mr *a)
static bool opffv_rod_narrow_check(DisasContext *s, arg_rmr *a)
{
return opfv_narrow_check(s, a) &&
+ require_rvf(s) &&
require_scale_rvf(s) &&
(s->sew !=3D MO_8);
}
--=20
2.45.1