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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::435; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x435.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1716771129539100003 Content-Type: text/plain; charset="utf-8" Signed-off-by: Richard Henderson --- target/i386/tcg/fpu_helper.c | 44 +++++++++++++++++++++++++----------- 1 file changed, 31 insertions(+), 13 deletions(-) diff --git a/target/i386/tcg/fpu_helper.c b/target/i386/tcg/fpu_helper.c index ece22a3553..1662643a8f 100644 --- a/target/i386/tcg/fpu_helper.c +++ b/target/i386/tcg/fpu_helper.c @@ -27,6 +27,7 @@ #include "fpu/softfloat.h" #include "fpu/softfloat-macros.h" #include "helper-tcg.h" +#include "access.h" =20 /* float macros */ #define FT0 (env->ft0) @@ -84,23 +85,22 @@ static inline void fpop(CPUX86State *env) env->fpstt =3D (env->fpstt + 1) & 7; } =20 -static floatx80 do_fldt(CPUX86State *env, target_ulong ptr, uintptr_t reta= ddr) +static floatx80 do_fldt(X86Access *ac, target_ulong ptr) { CPU_LDoubleU temp; =20 - temp.l.lower =3D cpu_ldq_data_ra(env, ptr, retaddr); - temp.l.upper =3D cpu_lduw_data_ra(env, ptr + 8, retaddr); + temp.l.lower =3D access_ldq(ac, ptr); + temp.l.upper =3D access_ldw(ac, ptr + 8); return temp.d; } =20 -static void do_fstt(CPUX86State *env, floatx80 f, target_ulong ptr, - uintptr_t retaddr) +static void do_fstt(X86Access *ac, target_ulong ptr, floatx80 f) { CPU_LDoubleU temp; =20 temp.d =3D f; - cpu_stq_data_ra(env, ptr, temp.l.lower, retaddr); - cpu_stw_data_ra(env, ptr + 8, temp.l.upper, retaddr); + access_stq(ac, ptr, temp.l.lower); + access_stw(ac, ptr + 8, temp.l.upper); } =20 /* x87 FPU helpers */ @@ -382,16 +382,22 @@ int64_t helper_fisttll_ST0(CPUX86State *env) void helper_fldt_ST0(CPUX86State *env, target_ulong ptr) { int new_fpstt; + X86Access ac; + + access_prepare(&ac, env, ptr, 10, MMU_DATA_LOAD, GETPC()); =20 new_fpstt =3D (env->fpstt - 1) & 7; - env->fpregs[new_fpstt].d =3D do_fldt(env, ptr, GETPC()); + env->fpregs[new_fpstt].d =3D do_fldt(&ac, ptr); env->fpstt =3D new_fpstt; env->fptags[new_fpstt] =3D 0; /* validate stack entry */ } =20 void helper_fstt_ST0(CPUX86State *env, target_ulong ptr) { - do_fstt(env, ST0, ptr, GETPC()); + X86Access ac; + + access_prepare(&ac, env, ptr, 10, MMU_DATA_STORE, GETPC()); + do_fstt(&ac, ptr, ST0); } =20 void helper_fpush(CPUX86State *env) @@ -2460,15 +2466,18 @@ void helper_fldenv(CPUX86State *env, target_ulong p= tr, int data32) static void do_fsave(CPUX86State *env, target_ulong ptr, int data32, uintptr_t retaddr) { + X86Access ac; floatx80 tmp; int i; =20 do_fstenv(env, ptr, data32, retaddr); =20 ptr +=3D (target_ulong)14 << data32; + access_prepare(&ac, env, ptr, 80, MMU_DATA_STORE, retaddr); + for (i =3D 0; i < 8; i++) { tmp =3D ST(i); - do_fstt(env, tmp, ptr, retaddr); + do_fstt(&ac, ptr, tmp); ptr +=3D 10; } =20 @@ -2483,14 +2492,17 @@ void helper_fsave(CPUX86State *env, target_ulong pt= r, int data32) static void do_frstor(CPUX86State *env, target_ulong ptr, int data32, uintptr_t retaddr) { + X86Access ac; floatx80 tmp; int i; =20 do_fldenv(env, ptr, data32, retaddr); ptr +=3D (target_ulong)14 << data32; =20 + access_prepare(&ac, env, ptr, 80, MMU_DATA_LOAD, retaddr); + for (i =3D 0; i < 8; i++) { - tmp =3D do_fldt(env, ptr, retaddr); + tmp =3D do_fldt(&ac, ptr); ST(i) =3D tmp; ptr +=3D 10; } @@ -2507,6 +2519,7 @@ static void do_xsave_fpu(CPUX86State *env, target_ulo= ng ptr, uintptr_t ra) { int fpus, fptag, i; target_ulong addr; + X86Access ac; =20 fpus =3D (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11; fptag =3D 0; @@ -2525,9 +2538,11 @@ static void do_xsave_fpu(CPUX86State *env, target_ul= ong ptr, uintptr_t ra) cpu_stq_data_ra(env, ptr + XO(legacy.fpdp), 0, ra); /* edp+sel; rdp */ =20 addr =3D ptr + XO(legacy.fpregs); + access_prepare(&ac, env, addr, 8 * 16, MMU_DATA_STORE, ra); + for (i =3D 0; i < 8; i++) { floatx80 tmp =3D ST(i); - do_fstt(env, tmp, addr, ra); + do_fstt(&ac, addr, tmp); addr +=3D 16; } } @@ -2700,6 +2715,7 @@ static void do_xrstor_fpu(CPUX86State *env, target_ul= ong ptr, uintptr_t ra) { int i, fpuc, fpus, fptag; target_ulong addr; + X86Access ac; =20 fpuc =3D cpu_lduw_data_ra(env, ptr + XO(legacy.fcw), ra); fpus =3D cpu_lduw_data_ra(env, ptr + XO(legacy.fsw), ra); @@ -2712,8 +2728,10 @@ static void do_xrstor_fpu(CPUX86State *env, target_u= long ptr, uintptr_t ra) } =20 addr =3D ptr + XO(legacy.fpregs); + access_prepare(&ac, env, addr, 8 * 16, MMU_DATA_LOAD, ra); + for (i =3D 0; i < 8; i++) { - floatx80 tmp =3D do_fldt(env, addr, ra); + floatx80 tmp =3D do_fldt(&ac, addr); ST(i) =3D tmp; addr +=3D 16; } --=20 2.34.1