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[174.21.72.5]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-1f46ad93c2esm28165935ad.263.2024.05.26.12.42.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 26 May 2024 12:42:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1716752577; x=1717357377; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=9GjOknDfw6CA/cxmtAArnOVpVQknG/Iz5WJ6byoYh9I=; b=fHj1fi10z9afJk+niE4Tr1g69sFWAwxo4M/rzWfvRNDicgudvjBu58iubavjzUQrc6 bQw7XXQ3VBE1xGH4Z0Zeftxs1CprM2BhIMT/XzCfzkrfKtgknXCsQQWybiRfLUGI8AjF MnWUc4X0zS0nec4Rct7ipssmq3aSQKUWov+AOxyTIotmn4YQx+gaIHbJ8mFA+bfWB64W TXQKrqzKgD4lcZZZk2BjbtmdY4QZbKB12uUT9dyxTuZYC+TY2mcqy0RuZh6szfYnNuox y0RGvFRLN5j1Rniwd5/aLO8LHPsiJXip8TxzQ4oyQliWx+R8bM9fls63RfvRg/amRtuo i9UA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1716752577; x=1717357377; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=9GjOknDfw6CA/cxmtAArnOVpVQknG/Iz5WJ6byoYh9I=; b=LZsuo5kUaCiA+hRqHGranEq7+Kb3Xhc0hNj9hYlpMJ60z8FHQRVvemvoP6nsXhcc8F 3JjSxJaO1hQVa9sui92dargV5f47zhVtqBlZ5mdtyGIz6kII66TtRg9odl7tyJ8yGl/M /srnSz7TaJyajWI6WTkCWTackVOM6ih8YW+F6CPmn7ZeLRf+zJQUvdJQ+CNb2Cqmr+z8 hPeYi4zrYEOqDWPEOTwF3aO+1Hdp3T/kou0a5dApk3tgGiuqp3ezWT5hgIRJOOcQcnVW IUaFt2gsv9TfE6JIE+RV8zv4DAdHxPzz+d+nJCDxPzMHGqPX4yPH623Vi22SNcpWC3I6 D1jQ== X-Gm-Message-State: AOJu0Yyzwv9fhrIERnDXS5VF/hf0K0W3p1kESZIL1VR4eRZhYFVZFgHH C7m1aQrpUNWF5iOHkdeX1qnebMshXg30nG1LAZbQa0YcCiJrqYWEUG6OJVPncFz7YXiL4mXP9rC x X-Google-Smtp-Source: AGHT+IEsRGohjHX8Df/j+T2Roo3PFyAPDP27dNMKXytRDC86w5WqyYEKkmdPec4tH354ZHticb4SWg== X-Received: by 2002:a17:902:fa46:b0:1f3:4232:76df with SMTP id d9443c01a7336-1f4487400b4mr66133285ad.36.1716752577046; Sun, 26 May 2024 12:42:57 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: mark.cave-ayland@ilande.co.uk Subject: [PATCH v2 02/37] target/sparc: Rewrite gen_edge Date: Sun, 26 May 2024 12:42:19 -0700 Message-Id: <20240526194254.459395-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240526194254.459395-1-richard.henderson@linaro.org> References: <20240526194254.459395-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::636; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x636.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1716752732212100007 Content-Type: text/plain; charset="utf-8" Drop the tables and compute the left and right edges directly. Signed-off-by: Richard Henderson --- target/sparc/translate.c | 98 +++++++++++++++------------------------- 1 file changed, 37 insertions(+), 61 deletions(-) diff --git a/target/sparc/translate.c b/target/sparc/translate.c index dca072888a..00c2a11353 100644 --- a/target/sparc/translate.c +++ b/target/sparc/translate.c @@ -3519,11 +3519,10 @@ static bool trans_SDIVX(DisasContext *dc, arg_r_r_r= i *a) } =20 static bool gen_edge(DisasContext *dc, arg_r_r_r *a, - int width, bool cc, bool left) + int width, bool cc, bool little_endian) { - TCGv dst, s1, s2, lo1, lo2; - uint64_t amask, tabl, tabr; - int shift, imask, omask; + TCGv dst, s1, s2, l, r, t, m; + uint64_t amask =3D address_mask_i(dc, -8); =20 dst =3D gen_dest_gpr(dc, a->rd); s1 =3D gen_load_gpr(dc, a->rs1); @@ -3533,75 +3532,52 @@ static bool gen_edge(DisasContext *dc, arg_r_r_r *a, gen_op_subcc(cpu_cc_N, s1, s2); } =20 - /* - * Theory of operation: there are two tables, left and right (not to - * be confused with the left and right versions of the opcode). These - * are indexed by the low 3 bits of the inputs. To make things "easy", - * these tables are loaded into two constants, TABL and TABR below. - * The operation index =3D (input & imask) << shift calculates the ind= ex - * into the constant, while val =3D (table >> index) & omask calculates - * the value we're looking for. - */ + l =3D tcg_temp_new(); + r =3D tcg_temp_new(); + t =3D tcg_temp_new(); + switch (width) { case 8: - imask =3D 0x7; - shift =3D 3; - omask =3D 0xff; - if (left) { - tabl =3D 0x80c0e0f0f8fcfeffULL; - tabr =3D 0xff7f3f1f0f070301ULL; - } else { - tabl =3D 0x0103070f1f3f7fffULL; - tabr =3D 0xfffefcf8f0e0c080ULL; - } + tcg_gen_andi_tl(l, s1, 7); + tcg_gen_andi_tl(r, s2, 7); + tcg_gen_xori_tl(r, r, 7); + m =3D tcg_constant_tl(0xff); break; case 16: - imask =3D 0x6; - shift =3D 1; - omask =3D 0xf; - if (left) { - tabl =3D 0x8cef; - tabr =3D 0xf731; - } else { - tabl =3D 0x137f; - tabr =3D 0xfec8; - } + tcg_gen_extract_tl(l, s1, 1, 2); + tcg_gen_extract_tl(r, s2, 1, 2); + tcg_gen_xori_tl(r, r, 3); + m =3D tcg_constant_tl(0xf); break; case 32: - imask =3D 0x4; - shift =3D 0; - omask =3D 0x3; - if (left) { - tabl =3D (2 << 2) | 3; - tabr =3D (3 << 2) | 1; - } else { - tabl =3D (1 << 2) | 3; - tabr =3D (3 << 2) | 2; - } + tcg_gen_extract_tl(l, s1, 2, 1); + tcg_gen_extract_tl(r, s2, 2, 1); + tcg_gen_xori_tl(r, r, 1); + m =3D tcg_constant_tl(0x3); break; default: abort(); } =20 - lo1 =3D tcg_temp_new(); - lo2 =3D tcg_temp_new(); - tcg_gen_andi_tl(lo1, s1, imask); - tcg_gen_andi_tl(lo2, s2, imask); - tcg_gen_shli_tl(lo1, lo1, shift); - tcg_gen_shli_tl(lo2, lo2, shift); + /* Compute Left Edge */ + if (little_endian) { + tcg_gen_shl_tl(l, m, l); + tcg_gen_and_tl(l, l, m); + } else { + tcg_gen_shr_tl(l, m, l); + } + /* Compute Right Edge */ + if (little_endian) { + tcg_gen_shr_tl(r, m, r); + } else { + tcg_gen_shl_tl(r, m, r); + tcg_gen_and_tl(r, r, m); + } =20 - tcg_gen_shr_tl(lo1, tcg_constant_tl(tabl), lo1); - tcg_gen_shr_tl(lo2, tcg_constant_tl(tabr), lo2); - tcg_gen_andi_tl(lo1, lo1, omask); - tcg_gen_andi_tl(lo2, lo2, omask); - - amask =3D address_mask_i(dc, -8); - tcg_gen_andi_tl(s1, s1, amask); - tcg_gen_andi_tl(s2, s2, amask); - - /* Compute dst =3D (s1 =3D=3D s2 ? lo1 : lo1 & lo2). */ - tcg_gen_and_tl(lo2, lo2, lo1); - tcg_gen_movcond_tl(TCG_COND_EQ, dst, s1, s2, lo1, lo2); + /* Compute dst =3D (s1 =3D=3D s2 under amask ? l : l & r) */ + tcg_gen_xor_tl(t, s1, s2); + tcg_gen_and_tl(r, r, l); + tcg_gen_movcond_tl(TCG_COND_TSTEQ, dst, t, tcg_constant_tl(amask), r, = l); =20 gen_store_gpr(dc, a->rd, dst); return advance_pc(dc); --=20 2.34.1