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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62b; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1716752832583100005 Content-Type: text/plain; charset="utf-8" Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- target/sparc/helper.h | 4 ++++ target/sparc/insns.decode | 5 +++++ target/sparc/translate.c | 9 +++++++++ target/sparc/vis_helper.c | 40 +++++++++++++++++++++++++++++++++++++++ 4 files changed, 58 insertions(+) diff --git a/target/sparc/helper.h b/target/sparc/helper.h index f1b84dc9b3..ed295c01e0 100644 --- a/target/sparc/helper.h +++ b/target/sparc/helper.h @@ -128,6 +128,10 @@ VIS_CMPHELPER(cmpgt) VIS_CMPHELPER(cmpeq) VIS_CMPHELPER(cmple) VIS_CMPHELPER(cmpne) +DEF_HELPER_FLAGS_2(fcmpeq8, TCG_CALL_NO_RWG_SE, i64, i64, i64) +DEF_HELPER_FLAGS_2(fcmpne8, TCG_CALL_NO_RWG_SE, i64, i64, i64) +DEF_HELPER_FLAGS_2(fcmpule8, TCG_CALL_NO_RWG_SE, i64, i64, i64) +DEF_HELPER_FLAGS_2(fcmpugt8, TCG_CALL_NO_RWG_SE, i64, i64, i64) #endif #undef VIS_HELPER #undef VIS_CMPHELPER diff --git a/target/sparc/insns.decode b/target/sparc/insns.decode index b6553362eb..295fc36128 100644 --- a/target/sparc/insns.decode +++ b/target/sparc/insns.decode @@ -408,6 +408,11 @@ FCMPEq 10 000 cc:2 110101 ..... 0 0101 0111 ....= . \ FPCMPGT32 10 ..... 110110 ..... 0 0010 1100 ..... @r_d_d FPCMPEQ32 10 ..... 110110 ..... 0 0010 1110 ..... @r_d_d =20 + FPCMPULE8 10 ..... 110110 ..... 1 0010 0000 ..... @r_d_d + FPCMPUGT8 10 ..... 110110 ..... 1 0010 1000 ..... @r_d_d + FPCMPNE8 10 ..... 110110 ..... 1 0010 0010 ..... @r_d_d + FPCMPEQ8 10 ..... 110110 ..... 1 0010 1010 ..... @r_d_d + FMUL8x16 10 ..... 110110 ..... 0 0011 0001 ..... @d_r_d FMUL8x16AU 10 ..... 110110 ..... 0 0011 0011 ..... @d_r_r FMUL8x16AL 10 ..... 110110 ..... 0 0011 0101 ..... @d_r_r diff --git a/target/sparc/translate.c b/target/sparc/translate.c index b9e932496e..7a20e79b7e 100644 --- a/target/sparc/translate.c +++ b/target/sparc/translate.c @@ -64,14 +64,18 @@ # define gen_helper_cmask8 ({ qemu_build_not_reached(); NULL= ; }) # define gen_helper_cmask16 ({ qemu_build_not_reached(); NULL= ; }) # define gen_helper_cmask32 ({ qemu_build_not_reached(); NULL= ; }) +# define gen_helper_fcmpeq8 ({ qemu_build_not_reached(); NULL= ; }) # define gen_helper_fcmpeq16 ({ qemu_build_not_reached(); NULL= ; }) # define gen_helper_fcmpeq32 ({ qemu_build_not_reached(); NULL= ; }) # define gen_helper_fcmpgt16 ({ qemu_build_not_reached(); NULL= ; }) # define gen_helper_fcmpgt32 ({ qemu_build_not_reached(); NULL= ; }) # define gen_helper_fcmple16 ({ qemu_build_not_reached(); NULL= ; }) # define gen_helper_fcmple32 ({ qemu_build_not_reached(); NULL= ; }) +# define gen_helper_fcmpne8 ({ qemu_build_not_reached(); NULL= ; }) # define gen_helper_fcmpne16 ({ qemu_build_not_reached(); NULL= ; }) # define gen_helper_fcmpne32 ({ qemu_build_not_reached(); NULL= ; }) +# define gen_helper_fcmpule8 ({ qemu_build_not_reached(); NULL= ; }) +# define gen_helper_fcmpugt8 ({ qemu_build_not_reached(); NULL= ; }) # define gen_helper_fdtox ({ qemu_build_not_reached(); NULL= ; }) # define gen_helper_fexpand ({ qemu_build_not_reached(); NULL= ; }) # define gen_helper_fmul8sux16 ({ qemu_build_not_reached(); NULL= ; }) @@ -5021,6 +5025,11 @@ TRANS(FPCMPNE32, VIS1, do_rdd, a, gen_helper_fcmpne3= 2) TRANS(FPCMPGT32, VIS1, do_rdd, a, gen_helper_fcmpgt32) TRANS(FPCMPEQ32, VIS1, do_rdd, a, gen_helper_fcmpeq32) =20 +TRANS(FPCMPEQ8, VIS3B, do_rdd, a, gen_helper_fcmpeq8) +TRANS(FPCMPNE8, VIS3B, do_rdd, a, gen_helper_fcmpne8) +TRANS(FPCMPULE8, VIS3B, do_rdd, a, gen_helper_fcmpule8) +TRANS(FPCMPUGT8, VIS3B, do_rdd, a, gen_helper_fcmpugt8) + static bool do_env_ddd(DisasContext *dc, arg_r_r_r *a, void (*func)(TCGv_i64, TCGv_env, TCGv_i64, TCGv_i64= )) { diff --git a/target/sparc/vis_helper.c b/target/sparc/vis_helper.c index 6ef36755c3..5a5da17132 100644 --- a/target/sparc/vis_helper.c +++ b/target/sparc/vis_helper.c @@ -238,6 +238,46 @@ VIS_CMPHELPER(helper_fcmpeq, FCMPEQ) VIS_CMPHELPER(helper_fcmple, FCMPLE) VIS_CMPHELPER(helper_fcmpne, FCMPNE) =20 +uint64_t helper_fcmpeq8(uint64_t src1, uint64_t src2) +{ + uint64_t a =3D src1 ^ src2; + uint64_t m =3D 0x7f7f7f7f7f7f7f7fULL; + uint64_t c =3D ~(((a & m) + m) | a | m); + + /* a.......b.......c.......d.......e.......f.......g.......h....... */ + c |=3D c << 7; + /* ab......bc......cd......de......ef......fg......gh......h....... */ + c |=3D c << 14; + /* abcd....bcde....cdef....defg....efgh....fgh.....gh......h....... */ + c |=3D c << 28; + /* abcdefghbcdefgh.cdefgh..defgh...efgh....fgh.....gh......h....... */ + return c >> 56; +} + +uint64_t helper_fcmpne8(uint64_t src1, uint64_t src2) +{ + return helper_fcmpeq8(src1, src2) ^ 0xff; +} + +uint64_t helper_fcmpule8(uint64_t src1, uint64_t src2) +{ + VIS64 s1, s2; + uint64_t r =3D 0; + + s1.ll =3D src1; + s2.ll =3D src2; + + for (int i =3D 0; i < 8; ++i) { + r |=3D (s1.VIS_B64(i) <=3D s2.VIS_B64(i)) << i; + } + return r; +} + +uint64_t helper_fcmpugt8(uint64_t src1, uint64_t src2) +{ + return helper_fcmpule8(src1, src2) ^ 0xff; +} + uint64_t helper_pdist(uint64_t sum, uint64_t src1, uint64_t src2) { int i; --=20 2.34.1