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[174.21.72.5]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-6f8fbf2cfd1sm1591695b3a.3.2024.05.24.16.25.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 24 May 2024 16:25:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1716593110; x=1717197910; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=KkrM6eUfNQC4/ZxOfw3RoQ+l/U6+/yIajWSBPEUqefU=; b=emsgS+iFjgBL5HsXZJJwTe2WGH+23g0HnCDQCoIzaD7bsYBi0+IJlQVA6NvGAIyAN0 xoN4llMYhwVILwTY0fuxSPTr6kTJJDF+J3KB2Hl9f1UjJ+DnNEPqseSvhfXksCOIL1oC jef15ld2Wq8ZgqkdbGZPGXVnSbkBQ/rhfmDNhJdExwQvzd043qmUFfQA7m/1lTCJayr8 YOnrrZx/uO1/w2rUBeuieR9ETNDEP3fb7RuelbVSixhAvesLOYambWDRYnHhg4D4ovdK xGNEZ2m95G7T6pG/GvAHqr/qjT0HLau4Y6J4d7OFG2J+pYuiw1muuaCT3ve5Z/XOO5vm 9mUg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1716593110; x=1717197910; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=KkrM6eUfNQC4/ZxOfw3RoQ+l/U6+/yIajWSBPEUqefU=; b=Xi39AZjzz1tM/UsIbzgfTx6XiE6z+5UjoUlheJCBBBlVJdG3oxp8Rl5ZMfqaa4qCgy zxO43wcy6Xx58yK5GZ3DNtlvJ8R74+xaiVgu6otEHPCbBIkJmBuzsn+PPJR/mwha8roO 7YCvwDKWps+Mh4E4LswhkLu5ITH3yUKs+eHRwNRT4qccmTzfv+mDglAtpudU6PaJbrnI nOvWl0G68U34WYpUEEw9Ll0jdo2FE5WRZIzp2FxvxSaQUeVxPsKYc6wgp5LJ7gabJsKg 2V/JKtw53mTHnIikBmoPEboIGfNv/se9ct8eJuEorr+HPFBjbRAilpxYVSXWg9bSgHle woBw== X-Gm-Message-State: AOJu0YyZqRgfnc+LnrvhC4OFcIWgfLeiMCSQ+oz/xAO9Eq1xd7dM+kSp OYhNRxVRC8anj/Jh+Tf2y7/YVZh+8McLShSbi9uffLrF5RM8pJz0HqDBRXJB7/gBoIoskAUwLGe Q X-Google-Smtp-Source: AGHT+IH7FurCjsBAAZDits9Raqncawm0dy4V/L+dqXoZ6Kp8bOSTE9aa17L9zcQH98f2nVEdVugyHA== X-Received: by 2002:a05:6a00:4405:b0:6f3:f062:c09b with SMTP id d2e1a72fcca58-6f8f2c6c7b4mr4166051b3a.6.1716593109917; Fri, 24 May 2024 16:25:09 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org Subject: [PATCH v2 53/67] target/arm: Use TCG_COND_TSTNE in gen_cmtst_vec Date: Fri, 24 May 2024 16:21:07 -0700 Message-Id: <20240524232121.284515-54-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240524232121.284515-1-richard.henderson@linaro.org> References: <20240524232121.284515-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::432; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x432.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1716593401146100003 Content-Type: text/plain; charset="utf-8" Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- target/arm/tcg/gengvec.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/target/arm/tcg/gengvec.c b/target/arm/tcg/gengvec.c index 1d6bc6021d..1895c3b19f 100644 --- a/target/arm/tcg/gengvec.c +++ b/target/arm/tcg/gengvec.c @@ -943,9 +943,7 @@ void gen_cmtst_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b) =20 static void gen_cmtst_vec(unsigned vece, TCGv_vec d, TCGv_vec a, TCGv_vec = b) { - tcg_gen_and_vec(vece, d, a, b); - tcg_gen_dupi_vec(vece, a, 0); - tcg_gen_cmp_vec(TCG_COND_NE, vece, d, d, a); + tcg_gen_cmp_vec(TCG_COND_TSTNE, vece, d, a, b); } =20 void gen_gvec_cmtst(unsigned vece, uint32_t rd_ofs, uint32_t rn_ofs, --=20 2.34.1