From nobody Mon Nov 25 09:38:15 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1716593558; cv=none; d=zohomail.com; s=zohoarc; b=QsUksQxLJhN2rDTCO9i4+u2dZhC6rJNBwM0sMx96vif/9ndIuQO6KAC4RDaUbPZzO8G/aYbO4xlYIrC31iU+V1p0uzC9U+Qqt1Cegle37PUP8RNyjYdEouLgty0Eg56KeXLywgSmPpZw2lqOzVNpmGunBatHuxST8OAcRK9in0s= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1716593558; h=Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; bh=NvOdWZ+hqbNSpKMnrqkieEhwTauPHntKblfxGeb+PLo=; b=Fl9ua0VWTIRr/JaUoFSUUr7gNYzZmgWFiBFhCitUdsUXu9HE4MRKwon6sdDZKubtMynVzIpxBDd4C9bxaMU6PJ2DCRZKC8lGSXSSlaZrVT0eSfVDOFUc9okzvJ2C/xcfiCsWk+PFDb3LMFirUiAhnHmABdXTUwNEpNmycGEjGVw= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass header.from= (p=none dis=none) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1716593558797886.1306517513775; Fri, 24 May 2024 16:32:38 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1sAeJA-00036R-5d; Fri, 24 May 2024 19:26:44 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1sAeI3-0007ks-AN for qemu-devel@nongnu.org; Fri, 24 May 2024 19:25:35 -0400 Received: from mail-pg1-x532.google.com ([2607:f8b0:4864:20::532]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1sAeHt-0006sP-CY for qemu-devel@nongnu.org; Fri, 24 May 2024 19:25:33 -0400 Received: by mail-pg1-x532.google.com with SMTP id 41be03b00d2f7-681919f89f2so1127064a12.1 for ; Fri, 24 May 2024 16:25:08 -0700 (PDT) Received: from stoup.. (174-21-72-5.tukw.qwest.net. [174.21.72.5]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-6f8fbf2cfd1sm1591695b3a.3.2024.05.24.16.25.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 24 May 2024 16:25:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1716593106; x=1717197906; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=NvOdWZ+hqbNSpKMnrqkieEhwTauPHntKblfxGeb+PLo=; b=JHgzSqiiWNx0X53Ezj20P55980e0w+mml0CgOPlw3SNedTZ+ATDUXUvAsZxsL/mX7O 2VL0LnQC3oiPl2kDLF1loPSvDb1gimxjXhzUChti7ipGSJOwcNi2IuOrBELCfUuKt0YB q5eiUC70Wo42Ns3Lf//0kIfEj2ykv9wrJyRLXjwSQSSshQT7xw5uSap2bSf6qOvFobrl RseRDDzGnd9z0eLwimUEOeKKCkZ5IoZj5/CFMM64Pp/Vfx/2T+Iar59RzAFVeo4DRK/h 4524vK8kKZ2vM4Xb23wZEcJNcx2ESjvIJuOHtQ/77NtyEWMWEZk/I1UqKfMYY28E8JCu jomA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1716593106; x=1717197906; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=NvOdWZ+hqbNSpKMnrqkieEhwTauPHntKblfxGeb+PLo=; b=W46lZXHC+0333IuN1r2bQsP/jYGrZtczGGTdI4SxM0TAmcjkI8Ivn/q9E9TBeEifFr IdkZqo5L0LG2CQniD6zmxSy8AGXz8pro1Pmaw9ZrRhlssR9JJJe2bMxX4O9898NgSHzt dS4itmCEolH9MIwf2BT/wFq2MVMZHkrQpSB3Z6ORbz5HeZhxI6OhKMx7lhM1svWArNJe D6gGr6+mQiuuAN4PsCVLBo57bXQkztddXwPptT4uqgQbt3R+V2CZfvyLPEFzGitw5Cf0 yIlxqbM8ylDZqbldKmqntEs2FlmSi6KsDsVvg3K8otM5TR3P9wFpv1X7H36F6cXq0DWR sIew== X-Gm-Message-State: AOJu0YxC4GUNe173IZqLTSlSt+1j4BH+ZodIK5WJ9BetcC2OFd+NmEAY Rl72ldyvu0fcpzuZx6eZPsrayVuEYeOpAGovZosNVbHOt3dhref9+5XhSKh5pSfs5ElZIATk/Fp W X-Google-Smtp-Source: AGHT+IFJgTxFRgsuQs4ilwJ52GFO1EFa5P3qYVElPEofmRVJx54+wj1LsEHgZ8bCBqjkFOGxNtZfhA== X-Received: by 2002:a05:6a20:9146:b0:1ad:6c36:ee82 with SMTP id adf61e73a8af0-1b212cbcf34mr5737568637.13.1716593106444; Fri, 24 May 2024 16:25:06 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org Subject: [PATCH v2 49/67] target/arm: Convert SQRSHL, UQRSHL to decodetree Date: Fri, 24 May 2024 16:21:03 -0700 Message-Id: <20240524232121.284515-50-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240524232121.284515-1-richard.henderson@linaro.org> References: <20240524232121.284515-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::532; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x532.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1716593559288100009 Content-Type: text/plain; charset="utf-8" Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- target/arm/tcg/a64.decode | 4 +++ target/arm/tcg/translate-a64.c | 48 ++++++++++++++++------------------ 2 files changed, 26 insertions(+), 26 deletions(-) diff --git a/target/arm/tcg/a64.decode b/target/arm/tcg/a64.decode index 85caf37948..96ce35ad40 100644 --- a/target/arm/tcg/a64.decode +++ b/target/arm/tcg/a64.decode @@ -762,6 +762,8 @@ SRSHL_s 0101 1110 111 ..... 01010 1 ..... .....= @rrr_d URSHL_s 0111 1110 111 ..... 01010 1 ..... ..... @rrr_d SQSHL_s 0101 1110 ..1 ..... 01001 1 ..... ..... @rrr_e UQSHL_s 0111 1110 ..1 ..... 01001 1 ..... ..... @rrr_e +SQRSHL_s 0101 1110 ..1 ..... 01011 1 ..... ..... @rrr_e +UQRSHL_s 0111 1110 ..1 ..... 01011 1 ..... ..... @rrr_e =20 ### Advanced SIMD scalar pairwise =20 @@ -890,6 +892,8 @@ SRSHL_v 0.00 1110 ..1 ..... 01010 1 ..... .....= @qrrr_e URSHL_v 0.10 1110 ..1 ..... 01010 1 ..... ..... @qrrr_e SQSHL_v 0.00 1110 ..1 ..... 01001 1 ..... ..... @qrrr_e UQSHL_v 0.10 1110 ..1 ..... 01001 1 ..... ..... @qrrr_e +SQRSHL_v 0.00 1110 ..1 ..... 01011 1 ..... ..... @qrrr_e +UQRSHL_v 0.10 1110 ..1 ..... 01011 1 ..... ..... @qrrr_e =20 ### Advanced SIMD scalar x indexed element =20 diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c index b0004e2c6f..b76682cabf 100644 --- a/target/arm/tcg/translate-a64.c +++ b/target/arm/tcg/translate-a64.c @@ -5162,6 +5162,22 @@ static const ENVScalar2 f_scalar_uqshl =3D { }; TRANS(UQSHL_s, do_env_scalar2, a, &f_scalar_uqshl) =20 +static const ENVScalar2 f_scalar_sqrshl =3D { + { gen_helper_neon_qrshl_s8, + gen_helper_neon_qrshl_s16, + gen_helper_neon_qrshl_s32 }, + gen_helper_neon_qrshl_s64, +}; +TRANS(SQRSHL_s, do_env_scalar2, a, &f_scalar_sqrshl) + +static const ENVScalar2 f_scalar_uqrshl =3D { + { gen_helper_neon_qrshl_u8, + gen_helper_neon_qrshl_u16, + gen_helper_neon_qrshl_u32 }, + gen_helper_neon_qrshl_u64, +}; +TRANS(UQRSHL_s, do_env_scalar2, a, &f_scalar_uqrshl) + static bool do_fp3_vector(DisasContext *s, arg_qrrr_e *a, gen_helper_gvec_3_ptr * const fns[3]) { @@ -5413,6 +5429,8 @@ TRANS(SRSHL_v, do_gvec_fn3, a, gen_gvec_srshl) TRANS(URSHL_v, do_gvec_fn3, a, gen_gvec_urshl) TRANS(SQSHL_v, do_gvec_fn3, a, gen_neon_sqshl) TRANS(UQSHL_v, do_gvec_fn3, a, gen_neon_uqshl) +TRANS(SQRSHL_v, do_gvec_fn3, a, gen_neon_sqrshl) +TRANS(UQRSHL_v, do_gvec_fn3, a, gen_neon_uqrshl) =20 =20 /* @@ -9426,13 +9444,6 @@ static void handle_3same_64(DisasContext *s, int opc= ode, bool u, } gen_cmtst_i64(tcg_rd, tcg_rn, tcg_rm); break; - case 0xb: /* SQRSHL, UQRSHL */ - if (u) { - gen_helper_neon_qrshl_u64(tcg_rd, tcg_env, tcg_rn, tcg_rm); - } else { - gen_helper_neon_qrshl_s64(tcg_rd, tcg_env, tcg_rn, tcg_rm); - } - break; case 0x10: /* ADD, SUB */ if (u) { tcg_gen_sub_i64(tcg_rd, tcg_rn, tcg_rm); @@ -9446,6 +9457,7 @@ static void handle_3same_64(DisasContext *s, int opco= de, bool u, case 0x8: /* SSHL, USHL */ case 0x9: /* SQSHL, UQSHL */ case 0xa: /* SRSHL, URSHL */ + case 0xb: /* SQRSHL, UQRSHL */ g_assert_not_reached(); } } @@ -9467,8 +9479,6 @@ static void disas_simd_scalar_three_reg_same(DisasCon= text *s, uint32_t insn) TCGv_i64 tcg_rd; =20 switch (opcode) { - case 0xb: /* SQRSHL, UQRSHL */ - break; case 0x6: /* CMGT, CMHI */ case 0x7: /* CMGE, CMHS */ case 0x11: /* CMTST, CMEQ */ @@ -9490,6 +9500,7 @@ static void disas_simd_scalar_three_reg_same(DisasCon= text *s, uint32_t insn) case 0x8: /* SSHL, USHL */ case 0x9: /* SQSHL, UQSHL */ case 0xa: /* SRSHL, URSHL */ + case 0xb: /* SQRSHL, UQRSHL */ unallocated_encoding(s); return; } @@ -9516,16 +9527,6 @@ static void disas_simd_scalar_three_reg_same(DisasCo= ntext *s, uint32_t insn) void (*genfn)(TCGv_i64, TCGv_i64, TCGv_i64, TCGv_i64, MemOp) =3D N= ULL; =20 switch (opcode) { - case 0xb: /* SQRSHL, UQRSHL */ - { - static NeonGenTwoOpEnvFn * const fns[3][2] =3D { - { gen_helper_neon_qrshl_s8, gen_helper_neon_qrshl_u8 }, - { gen_helper_neon_qrshl_s16, gen_helper_neon_qrshl_u16 }, - { gen_helper_neon_qrshl_s32, gen_helper_neon_qrshl_u32 }, - }; - genenvfn =3D fns[size][u]; - break; - } case 0x16: /* SQDMULH, SQRDMULH */ { static NeonGenTwoOpEnvFn * const fns[2][2] =3D { @@ -9540,6 +9541,7 @@ static void disas_simd_scalar_three_reg_same(DisasCon= text *s, uint32_t insn) case 0x1: /* SQADD, UQADD */ case 0x5: /* SQSUB, UQSUB */ case 0x9: /* SQSHL, UQSHL */ + case 0xb: /* SQRSHL, UQRSHL */ g_assert_not_reached(); } =20 @@ -10965,13 +10967,6 @@ static void disas_simd_3same_int(DisasContext *s, = uint32_t insn) } =20 switch (opcode) { - case 0x0b: /* SQRSHL, UQRSHL */ - if (u) { - gen_gvec_fn3(s, is_q, rd, rn, rm, gen_neon_uqrshl, size); - } else { - gen_gvec_fn3(s, is_q, rd, rn, rm, gen_neon_sqrshl, size); - } - return; case 0x0c: /* SMAX, UMAX */ if (u) { gen_gvec_fn3(s, is_q, rd, rn, rm, tcg_gen_gvec_umax, size); @@ -11055,6 +11050,7 @@ static void disas_simd_3same_int(DisasContext *s, u= int32_t insn) case 0x08: /* SSHL, USHL */ case 0x09: /* SQSHL, UQSHL */ case 0x0a: /* SRSHL, URSHL */ + case 0x0b: /* SQRSHL, UQRSHL */ g_assert_not_reached(); } =20 --=20 2.34.1