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Fri, 24 May 2024 01:10:52 -0700 (PDT) X-Google-Smtp-Source: AGHT+IGYe+hCAukNlsjh9haF38siBXMXm3UkSykoGAKgeOq0WfQELLVWimVKXOA16xUnarOquV6dtg== X-Received: by 2002:a17:906:d147:b0:a59:9f4e:4e3b with SMTP id a640c23a62f3a-a62641a3aafmr93173266b.2.1716538251765; Fri, 24 May 2024 01:10:51 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PATCH 14/16] target/i386: remove aflag argument of gen_lea_v_seg Date: Fri, 24 May 2024 10:10:17 +0200 Message-ID: <20240524081019.1141359-15-pbonzini@redhat.com> X-Mailer: git-send-email 2.45.1 In-Reply-To: <20240524081019.1141359-1-pbonzini@redhat.com> References: <20240524081019.1141359-1-pbonzini@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.129.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1716538324942100001 Content-Type: text/plain; charset="utf-8" It is always s->aflag. Signed-off-by: Paolo Bonzini Reviewed-by: Richard Henderson --- target/i386/tcg/translate.c | 20 ++++++++++---------- target/i386/tcg/emit.c.inc | 6 +++--- 2 files changed, 13 insertions(+), 13 deletions(-) diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c index 18d8c0de674..1a776e77297 100644 --- a/target/i386/tcg/translate.c +++ b/target/i386/tcg/translate.c @@ -673,20 +673,20 @@ static void gen_lea_v_seg_dest(DisasContext *s, MemOp= aflag, TCGv dest, TCGv a0, } } =20 -static void gen_lea_v_seg(DisasContext *s, MemOp aflag, TCGv a0, +static void gen_lea_v_seg(DisasContext *s, TCGv a0, int def_seg, int ovr_seg) { - gen_lea_v_seg_dest(s, aflag, s->A0, a0, def_seg, ovr_seg); + gen_lea_v_seg_dest(s, s->aflag, s->A0, a0, def_seg, ovr_seg); } =20 static inline void gen_string_movl_A0_ESI(DisasContext *s) { - gen_lea_v_seg(s, s->aflag, cpu_regs[R_ESI], R_DS, s->override); + gen_lea_v_seg(s, cpu_regs[R_ESI], R_DS, s->override); } =20 static inline void gen_string_movl_A0_EDI(DisasContext *s) { - gen_lea_v_seg(s, s->aflag, cpu_regs[R_EDI], R_ES, -1); + gen_lea_v_seg(s, cpu_regs[R_EDI], R_ES, -1); } =20 static inline TCGv gen_compute_Dshift(DisasContext *s, MemOp ot) @@ -1777,7 +1777,7 @@ static void gen_lea_modrm(CPUX86State *env, DisasCont= ext *s, int modrm) { AddressParts a =3D gen_lea_modrm_0(env, s, modrm); TCGv ea =3D gen_lea_modrm_1(s, a, false); - gen_lea_v_seg(s, s->aflag, ea, a.def_seg, s->override); + gen_lea_v_seg(s, ea, a.def_seg, s->override); } =20 static void gen_nop_modrm(CPUX86State *env, DisasContext *s, int modrm) @@ -2516,7 +2516,7 @@ static bool disas_insn_x87(DisasContext *s, CPUState = *cpu, int b) bool update_fdp =3D true; =20 tcg_gen_mov_tl(last_addr, ea); - gen_lea_v_seg(s, s->aflag, ea, a.def_seg, s->override); + gen_lea_v_seg(s, ea, a.def_seg, s->override); =20 switch (op) { case 0x00 ... 0x07: /* fxxxs */ @@ -3313,7 +3313,7 @@ static void disas_insn_old(DisasContext *s, CPUState = *cpu, int b) tcg_gen_sari_tl(s->tmp0, s->T1, 3 + ot); tcg_gen_shli_tl(s->tmp0, s->tmp0, ot); tcg_gen_add_tl(s->A0, gen_lea_modrm_1(s, a, false), s->tmp0); - gen_lea_v_seg(s, s->aflag, s->A0, a.def_seg, s->override); + gen_lea_v_seg(s, s->A0, a.def_seg, s->override); if (!(s->prefix & PREFIX_LOCK)) { gen_op_ld_v(s, ot, s->T0, s->A0); } @@ -3634,7 +3634,7 @@ static void disas_insn_old(DisasContext *s, CPUState = *cpu, int b) } gen_update_cc_op(s); gen_update_eip_cur(s); - gen_lea_v_seg(s, s->aflag, cpu_regs[R_EAX], R_DS, s->override); + gen_lea_v_seg(s, cpu_regs[R_EAX], R_DS, s->override); gen_helper_monitor(tcg_env, s->A0); break; =20 @@ -4040,7 +4040,7 @@ static void disas_insn_old(DisasContext *s, CPUState = *cpu, int b) } else { tcg_gen_movi_tl(s->A0, 0); } - gen_lea_v_seg(s, s->aflag, s->A0, a.def_seg, s->override); + gen_lea_v_seg(s, s->A0, a.def_seg, s->override); if (a.index >=3D 0) { tcg_gen_mov_tl(s->T0, cpu_regs[a.index]); } else { @@ -4145,7 +4145,7 @@ static void disas_insn_old(DisasContext *s, CPUState = *cpu, int b) } else { tcg_gen_movi_tl(s->A0, 0); } - gen_lea_v_seg(s, s->aflag, s->A0, a.def_seg, s->override); + gen_lea_v_seg(s, s->A0, a.def_seg, s->override); if (a.index >=3D 0) { tcg_gen_mov_tl(s->T0, cpu_regs[a.index]); } else { diff --git a/target/i386/tcg/emit.c.inc b/target/i386/tcg/emit.c.inc index bc96735f61d..9eecf7ab56c 100644 --- a/target/i386/tcg/emit.c.inc +++ b/target/i386/tcg/emit.c.inc @@ -76,7 +76,7 @@ static void gen_NM_exception(DisasContext *s) static void gen_load_ea(DisasContext *s, AddressParts *mem, bool is_vsib) { TCGv ea =3D gen_lea_modrm_1(s, *mem, is_vsib); - gen_lea_v_seg(s, s->aflag, ea, mem->def_seg, s->override); + gen_lea_v_seg(s, ea, mem->def_seg, s->override); } =20 static inline int mmx_offset(MemOp ot) @@ -2044,7 +2044,7 @@ static void gen_MOV(DisasContext *s, CPUX86State *env= , X86DecodedInsn *decode) =20 static void gen_MASKMOV(DisasContext *s, CPUX86State *env, X86DecodedInsn = *decode) { - gen_lea_v_seg(s, s->aflag, cpu_regs[R_EDI], R_DS, s->override); + gen_lea_v_seg(s, cpu_regs[R_EDI], R_DS, s->override); =20 if (s->prefix & PREFIX_DATA) { gen_helper_maskmov_xmm(tcg_env, OP_PTR1, OP_PTR2, s->A0); @@ -4039,7 +4039,7 @@ static void gen_XLAT(DisasContext *s, CPUX86State *en= v, X86DecodedInsn *decode) { /* AL is already zero-extended into s->T0. */ tcg_gen_add_tl(s->A0, cpu_regs[R_EBX], s->T0); - gen_lea_v_seg(s, s->aflag, s->A0, R_DS, s->override); + gen_lea_v_seg(s, s->A0, R_DS, s->override); gen_op_ld_v(s, MO_8, s->T0, s->A0); } =20 --=20 2.45.1