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[110.175.65.7]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-682227f1838sm87041a12.46.2024.05.23.16.09.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 23 May 2024 16:09:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1716505790; x=1717110590; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=6HIn6EebDMl7L2UyZZ1L1MF0Eu/S2CM8hT7PYe2WBK0=; b=kZc37eWBIaqHCWAqi82K5YbalF+sIBlZI2YpCRtveRXjELUklAXWP2JpBTc0X+0R+w OV3X+UOasWQRL44X+f1xvKQWQTjHzmaSGFhyjc9pfNSr09jLc4kLJDdN/nCOkbdHWCq+ qhq8OTGfPN/QySfGgbCYkyEO7SZXbEwwVQujmSgI+s82M8T+Gr+5rbzl4zeH6TLwJnam gwBKD99Qmh7uPUJja4aTniqsH83v/ufk17QBIs7GRqrUrAA91S8qXOY3wQcrqXlGZNLw AJPIH63oG3zGMqoEldqrMFo83hsp5Nt3P8yOmoAki7EpU1K1MxYxAYPNtkW1n0ggaMb7 JzhA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1716505790; x=1717110590; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=6HIn6EebDMl7L2UyZZ1L1MF0Eu/S2CM8hT7PYe2WBK0=; b=nd8CEbIvB8xtOLebu9vNzKE94dj7+fApPXL2J2Vpwc0xZjuHNcZxsFVHJD+EooEPz1 76CjV8c8E1FaLu7pwkDt9E7BDRw5AEu9gBMSahDlW7muK8KhMm7KwSYtiVYOE05WPVwD HioIHLGnJzCfAxsayZrFbiGX23JZrSOawSosDrZe0l1L2qem67F/9hQQQHxzZbDA9pqg QjhNIgbq2jXCWhrl+A2AyygRz/ZMa8g7Y3Pu6yUxYAWzF831Pp9nMAjEoMCQSCn1ZGEc hnf81NeAfU5UYbDkdAKPl8KrMybRxGFzIsxom2K9iP5OH/dnPPBfUeKHWyRdpTQt7gHq oIVQ== X-Forwarded-Encrypted: i=1; AJvYcCV3uZ5prAqXsBap3sJM66HlgkM7MOczqaVt/3isJzZMFDpvFcp4kyGZantNO1D+AQMKf+1Hge12lUTqgoKBbkiFw3iO X-Gm-Message-State: AOJu0YwylNrxWkV2cfIuBnw/jV1NQQhgZnGde8rKTUiRIghAwaF1n2oI /oU4jeq9AjtJXQH86Vd7WxhIq6npCBddwJrvS57gO9WcDDXABweb1340hA== X-Google-Smtp-Source: AGHT+IH16v6oEV/8o4Y8hKuDJPsHMX4/YBTJFvKwNDu7CuBzg0ffNE+CkYwxEyuihoRA/e6hLJpR4A== X-Received: by 2002:a05:6a20:9752:b0:1af:9ec6:afbd with SMTP id adf61e73a8af0-1b212d5b99amr924080637.11.1716505789621; Thu, 23 May 2024 16:09:49 -0700 (PDT) From: Nicholas Piggin To: qemu-devel@nongnu.org Cc: Nicholas Piggin , qemu-ppc@nongnu.org, Glenn Miles Subject: [PULL 36/72] target/ppc: Implement LDBAR, TTR SPRs Date: Fri, 24 May 2024 09:07:09 +1000 Message-ID: <20240523230747.45703-37-npiggin@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240523230747.45703-1-npiggin@gmail.com> References: <20240523230747.45703-1-npiggin@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::42c; envelope-from=npiggin@gmail.com; helo=mail-pf1-x42c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1716505970668100005 Content-Type: text/plain; charset="utf-8" LDBAR, TTR are a Power-specific SPRs. These simple implementations are enough for IBM proprietary firmware for now. Reviewed-by: Glenn Miles Signed-off-by: Nicholas Piggin --- target/ppc/cpu.h | 2 ++ target/ppc/cpu_init.c | 10 ++++++++++ 2 files changed, 12 insertions(+) diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index 141cbefb4c..823be85d03 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -2098,6 +2098,7 @@ void ppc_compat_add_property(Object *obj, const char = *name, #define SPR_DEXCR (0x33C) #define SPR_IC (0x350) #define SPR_VTB (0x351) +#define SPR_LDBAR (0x352) #define SPR_MMCRC (0x353) #define SPR_PSSCR (0x357) #define SPR_440_INV0 (0x370) @@ -2144,6 +2145,7 @@ void ppc_compat_add_property(Object *obj, const char = *name, #define SPR_440_IVLIM (0x399) #define SPR_TSCR (0x399) #define SPR_750_DMAU (0x39A) +#define SPR_POWER_TTR (0x39A) #define SPR_750_DMAL (0x39B) #define SPR_440_RSTCFG (0x39B) #define SPR_BOOKE_DCDBTRL (0x39C) diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index 415cc7a4e2..d181adc5f1 100644 --- a/target/ppc/cpu_init.c +++ b/target/ppc/cpu_init.c @@ -5767,6 +5767,16 @@ static void register_power_common_book4_sprs(CPUPPCS= tate *env) &spr_access_nop, &spr_write_generic, &spr_access_nop, &spr_write_generic, 0x00000000); + spr_register_hv(env, SPR_LDBAR, "LDBAR", + SPR_NOACCESS, SPR_NOACCESS, + SPR_NOACCESS, SPR_NOACCESS, + &spr_read_generic, &spr_core_lpar_write_generic, + 0x00000000); + spr_register_hv(env, SPR_POWER_TTR, "TTR", + SPR_NOACCESS, SPR_NOACCESS, + SPR_NOACCESS, SPR_NOACCESS, + &spr_read_generic, &spr_core_write_generic, + 0x00000000); #endif } =20 --=20 2.43.0