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Thu, 23 May 2024 08:00:57 -0700 (PDT) X-Google-Smtp-Source: AGHT+IF/Jd+10a5QOCxHN7FohL3jqfVV9WJ8VXZOV2ru77aqUuREjvc7MTQZGWfAb3XrQ/quXCGoUQ== X-Received: by 2002:a17:906:f2ce:b0:a62:c02:425a with SMTP id a640c23a62f3a-a62281c804amr373190166b.74.1716476456742; Thu, 23 May 2024 08:00:56 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Cc: Zhao Liu , Yongwei Ma , Babu Moger , Xiaoyao Li Subject: [PULL 08/23] i386/cpu: Use APIC ID info get NumSharingCache for CPUID[0x8000001D].EAX[bits 25:14] Date: Thu, 23 May 2024 17:00:21 +0200 Message-ID: <20240523150036.1050011-9-pbonzini@redhat.com> X-Mailer: git-send-email 2.45.1 In-Reply-To: <20240523150036.1050011-1-pbonzini@redhat.com> References: <20240523150036.1050011-1-pbonzini@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1716476540151100001 Content-Type: text/plain; charset="utf-8" From: Zhao Liu The commit 8f4202fb1080 ("i386: Populate AMD Processor Cache Information for cpuid 0x8000001D") adds the cache topology for AMD CPU by encoding the number of sharing threads directly. From AMD's APM, NumSharingCache (CPUID[0x8000001D].EAX[bits 25:14]) means [1]: The number of logical processors sharing this cache is the value of this field incremented by 1. To determine which logical processors are sharing a cache, determine a Share Id for each processor as follows: ShareId =3D LocalApicId >> log2(NumSharingCache+1) Logical processors with the same ShareId then share a cache. If NumSharingCache+1 is not a power of two, round it up to the next power of two. From the description above, the calculation of this field should be same as CPUID[4].EAX[bits 25:14] for Intel CPUs. So also use the offsets of APIC ID to calculate this field. [1]: APM, vol.3, appendix.E.4.15 Function 8000_001Dh--Cache Topology Information Tested-by: Yongwei Ma Signed-off-by: Zhao Liu Reviewed-by: Babu Moger Tested-by: Babu Moger Reviewed-by: Xiaoyao Li Message-ID: <20240424154929.1487382-8-zhao1.liu@intel.com> Signed-off-by: Paolo Bonzini --- target/i386/cpu.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index f3d2b8053b2..22a8ca1c9b4 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -331,7 +331,7 @@ static void encode_cache_cpuid8000001d(CPUCacheInfo *ca= che, uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx) { - uint32_t l3_threads; + uint32_t num_sharing_cache; assert(cache->size =3D=3D cache->line_size * cache->associativity * cache->partitions * cache->sets); =20 @@ -340,11 +340,11 @@ static void encode_cache_cpuid8000001d(CPUCacheInfo *= cache, =20 /* L3 is shared among multiple cores */ if (cache->level =3D=3D 3) { - l3_threads =3D topo_info->cores_per_die * topo_info->threads_per_c= ore; - *eax |=3D (l3_threads - 1) << 14; + num_sharing_cache =3D 1 << apicid_die_offset(topo_info); } else { - *eax |=3D ((topo_info->threads_per_core - 1) << 14); + num_sharing_cache =3D 1 << apicid_core_offset(topo_info); } + *eax |=3D (num_sharing_cache - 1) << 14; =20 assert(cache->line_size > 0); assert(cache->partitions > 0); --=20 2.45.1