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Thu, 23 May 2024 08:01:33 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFWUvHz/WWG9n92xS9THX5XlIQgWnlW34CNhdGutSmy/oCptKLRru/5YxvHBMfmdMV5Q/2SjA== X-Received: by 2002:ac2:4831:0:b0:51d:a87e:27ec with SMTP id 2adb3069b0e04-526bd6935camr3149288e87.9.1716476492704; Thu, 23 May 2024 08:01:32 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Cc: Zhao Liu , Yongwei Ma , Babu Moger Subject: [PULL 22/23] i386/cpu: Use CPUCacheInfo.share_level to encode CPUID[0x8000001D].EAX[bits 25:14] Date: Thu, 23 May 2024 17:00:35 +0200 Message-ID: <20240523150036.1050011-23-pbonzini@redhat.com> X-Mailer: git-send-email 2.45.1 In-Reply-To: <20240523150036.1050011-1-pbonzini@redhat.com> References: <20240523150036.1050011-1-pbonzini@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.129.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1716476542110100005 Content-Type: text/plain; charset="utf-8" From: Zhao Liu CPUID[0x8000001D].EAX[bits 25:14] NumSharingCache: number of logical processors sharing cache. The number of logical processors sharing this cache is NumSharingCache + 1. After cache models have topology information, we can use CPUCacheInfo.share_level to decide which topology level to be encoded into CPUID[0x8000001D].EAX[bits 25:14]. Tested-by: Yongwei Ma Signed-off-by: Zhao Liu Tested-by: Babu Moger Reviewed-by: Babu Moger Message-ID: <20240424154929.1487382-22-zhao1.liu@intel.com> Signed-off-by: Paolo Bonzini --- target/i386/cpu.c | 10 +--------- 1 file changed, 1 insertion(+), 9 deletions(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index f91e1500266..bc2dceb647f 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -478,20 +478,12 @@ static void encode_cache_cpuid8000001d(CPUCacheInfo *= cache, uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx) { - uint32_t num_sharing_cache; assert(cache->size =3D=3D cache->line_size * cache->associativity * cache->partitions * cache->sets); =20 *eax =3D CACHE_TYPE(cache->type) | CACHE_LEVEL(cache->level) | (cache->self_init ? CACHE_SELF_INIT_LEVEL : 0); - - /* L3 is shared among multiple cores */ - if (cache->level =3D=3D 3) { - num_sharing_cache =3D 1 << apicid_die_offset(topo_info); - } else { - num_sharing_cache =3D 1 << apicid_core_offset(topo_info); - } - *eax |=3D (num_sharing_cache - 1) << 14; + *eax |=3D max_thread_ids_for_cache(topo_info, cache->share_level) << 1= 4; =20 assert(cache->line_size > 0); assert(cache->partitions > 0); --=20 2.45.1