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a="37972598" X-IronPort-AV: E=Sophos;i="6.08,179,1712646000"; d="scan'208";a="37972598" X-CSE-ConnectionGUID: sK/wx7g0RHuybRbUvu6qhg== X-CSE-MsgGUID: HK9q6lR9S4aiY1zhbTU+Tg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,179,1712646000"; d="scan'208";a="33597830" From: Zhenzhong Duan To: qemu-devel@nongnu.org Cc: alex.williamson@redhat.com, clg@redhat.com, eric.auger@redhat.com, mst@redhat.com, peterx@redhat.com, jasowang@redhat.com, jgg@nvidia.com, nicolinc@nvidia.com, joao.m.martins@oracle.com, clement.mathieu--drif@eviden.com, kevin.tian@intel.com, yi.l.liu@intel.com, chao.p.peng@intel.com, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Zhenzhong Duan , Paolo Bonzini , Richard Henderson , Eduardo Habkost , Marcel Apfelbaum Subject: [PATCH rfcv2 11/17] intel_iommu: Extract device IOTLB invalidation logic Date: Wed, 22 May 2024 14:23:07 +0800 Message-Id: <20240522062313.453317-12-zhenzhong.duan@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240522062313.453317-1-zhenzhong.duan@intel.com> References: <20240522062313.453317-1-zhenzhong.duan@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=192.198.163.7; envelope-from=zhenzhong.duan@intel.com; helo=mgamail.intel.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @intel.com) X-ZM-MESSAGEID: 1716359461333100017 From: Cl=C3=A9ment Mathieu--Drif This piece of code can be shared by both IOTLB invalidation and PASID-based IOTLB invalidation No functional changes intended. Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Cl=C3=A9ment Mathieu--Drif Signed-off-by: Zhenzhong Duan --- hw/i386/intel_iommu.c | 57 +++++++++++++++++++++++++------------------ 1 file changed, 33 insertions(+), 24 deletions(-) diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index f6c429ae4c..3c14fd85cc 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -2955,13 +2955,43 @@ static bool vtd_process_inv_iec_desc(IntelIOMMUStat= e *s, return true; } =20 +static void do_invalidate_device_tlb(VTDAddressSpace *vtd_dev_as, + bool size, hwaddr addr) +{ + /* + * According to ATS spec table 2.4: + * S =3D 0, bits 15:12 =3D xxxx range size: 4K + * S =3D 1, bits 15:12 =3D xxx0 range size: 8K + * S =3D 1, bits 15:12 =3D xx01 range size: 16K + * S =3D 1, bits 15:12 =3D x011 range size: 32K + * S =3D 1, bits 15:12 =3D 0111 range size: 64K + * ... + */ + + IOMMUTLBEvent event; + uint64_t sz; + + if (size) { + sz =3D (VTD_PAGE_SIZE * 2) << cto64(addr >> VTD_PAGE_SHIFT); + addr &=3D ~(sz - 1); + } else { + sz =3D VTD_PAGE_SIZE; + } + + event.type =3D IOMMU_NOTIFIER_DEVIOTLB_UNMAP; + event.entry.target_as =3D &vtd_dev_as->as; + event.entry.addr_mask =3D sz - 1; + event.entry.iova =3D addr; + event.entry.perm =3D IOMMU_NONE; + event.entry.translated_addr =3D 0; + memory_region_notify_iommu(&vtd_dev_as->iommu, 0, event); +} + static bool vtd_process_device_iotlb_desc(IntelIOMMUState *s, VTDInvDesc *inv_desc) { VTDAddressSpace *vtd_dev_as; - IOMMUTLBEvent event; hwaddr addr; - uint64_t sz; uint16_t sid; bool size; =20 @@ -2986,28 +3016,7 @@ static bool vtd_process_device_iotlb_desc(IntelIOMMU= State *s, goto done; } =20 - /* According to ATS spec table 2.4: - * S =3D 0, bits 15:12 =3D xxxx range size: 4K - * S =3D 1, bits 15:12 =3D xxx0 range size: 8K - * S =3D 1, bits 15:12 =3D xx01 range size: 16K - * S =3D 1, bits 15:12 =3D x011 range size: 32K - * S =3D 1, bits 15:12 =3D 0111 range size: 64K - * ... - */ - if (size) { - sz =3D (VTD_PAGE_SIZE * 2) << cto64(addr >> VTD_PAGE_SHIFT); - addr &=3D ~(sz - 1); - } else { - sz =3D VTD_PAGE_SIZE; - } - - event.type =3D IOMMU_NOTIFIER_DEVIOTLB_UNMAP; - event.entry.target_as =3D &vtd_dev_as->as; - event.entry.addr_mask =3D sz - 1; - event.entry.iova =3D addr; - event.entry.perm =3D IOMMU_NONE; - event.entry.translated_addr =3D 0; - memory_region_notify_iommu(&vtd_dev_as->iommu, 0, event); + do_invalidate_device_tlb(vtd_dev_as, size, addr); =20 done: return true; --=20 2.34.1