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charset="utf-8" X-Sendblock-Type: AUTO_CONFIDENTIAL CMS-TYPE: 102P DLP-Filter: Pass X-CFilter-Loop: Reflected X-CMS-RootMailID: 20240521111643epcas2p3c86343fde1fdd6dbd868d09188084ae0 References: <20240521110544.258772-1-minwoo.im@samsung.com> Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=203.254.224.25; envelope-from=minwoo.im@samsung.com; helo=mailout2.samsung.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @samsung.com) X-ZM-MESSAGEID: 1716290288512100003 This patch is a prep patch for the following MCQ support patch for hw/ufs. This patch updated minimal mandatory fields to support MCQ based on UFSHCI 4.0. Signed-off-by: Minwoo Im --- include/block/ufs.h | 108 +++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 106 insertions(+), 2 deletions(-) diff --git a/include/block/ufs.h b/include/block/ufs.h index d61598b8f3..3513b6e772 100644 --- a/include/block/ufs.h +++ b/include/block/ufs.h @@ -7,7 +7,7 @@ =20 typedef struct QEMU_PACKED UfsReg { uint32_t cap; - uint32_t rsvd0; + uint32_t mcqcap; uint32_t ver; uint32_t rsvd1; uint32_t hcpid; @@ -46,6 +46,13 @@ typedef struct QEMU_PACKED UfsReg { uint32_t rsvd7[4]; uint32_t rsvd8[16]; uint32_t ccap; + uint32_t rsvd9[127]; + uint32_t config; + uint32_t rsvd10[3]; + uint32_t rsvd11[28]; + uint32_t mcqconfig; + uint32_t esilba; + uint32_t esiuba; } UfsReg; =20 REG32(CAP, offsetof(UfsReg, cap)) @@ -57,6 +64,15 @@ REG32(CAP, offsetof(UfsReg, cap)) FIELD(CAP, OODDS, 25, 1) FIELD(CAP, UICDMETMS, 26, 1) FIELD(CAP, CS, 28, 1) + FIELD(CAP, LSDBS, 29, 1) + FIELD(CAP, MCQS, 30, 1) +REG32(MCQCAP, offsetof(UfsReg, mcqcap)) + FIELD(MCQCAP, MAXQ, 0, 8) + FIELD(MCQCAP, SP, 8, 1) + FIELD(MCQCAP, RRP, 9, 1) + FIELD(MCQCAP, EIS, 10, 1) + FIELD(MCQCAP, QCFGPTR, 16, 8) + FIELD(MCQCAP, MIAG, 24, 8) REG32(VER, offsetof(UfsReg, ver)) REG32(HCPID, offsetof(UfsReg, hcpid)) REG32(HCMID, offsetof(UfsReg, hcmid)) @@ -78,6 +94,7 @@ REG32(IS, offsetof(UfsReg, is)) FIELD(IS, HCFES, 16, 1) FIELD(IS, SBFES, 17, 1) FIELD(IS, CEFES, 18, 1) + FIELD(IS, CQES, 20, 1) REG32(IE, offsetof(UfsReg, ie)) FIELD(IE, UTRCE, 0, 1) FIELD(IE, UDEPRIE, 1, 1) @@ -95,6 +112,7 @@ REG32(IE, offsetof(UfsReg, ie)) FIELD(IE, HCFEE, 16, 1) FIELD(IE, SBFEE, 17, 1) FIELD(IE, CEFEE, 18, 1) + FIELD(IE, CQEE, 20, 1) REG32(HCS, offsetof(UfsReg, hcs)) FIELD(HCS, DP, 0, 1) FIELD(HCS, UTRLRDY, 1, 1) @@ -128,6 +146,10 @@ REG32(UCMDARG1, offsetof(UfsReg, ucmdarg1)) REG32(UCMDARG2, offsetof(UfsReg, ucmdarg2)) REG32(UCMDARG3, offsetof(UfsReg, ucmdarg3)) REG32(CCAP, offsetof(UfsReg, ccap)) +REG32(CONFIG, offsetof(UfsReg, config)) + FIELD(CONFIG, QT, 0, 1) +REG32(MCQCONFIG, offsetof(UfsReg, mcqconfig)) + FIELD(MCQCONFIG, MAC, 8, 8) =20 #define UFS_INTR_MASK \ ((1 << R_IS_CEFES_SHIFT) | (1 << R_IS_SBFES_SHIFT) | \ @@ -157,6 +179,69 @@ REG32(CCAP, offsetof(UfsReg, ccap)) ((be32_to_cpu(dword2) >> UFS_UPIU_HEADER_DATA_SEGMENT_LENGTH_SHIFT) & \ UFS_UPIU_HEADER_DATA_SEGMENT_LENGTH_MASK) =20 +typedef struct QEMU_PACKED UfsMcqReg { + uint32_t sqattr; + uint32_t sqlba; + uint32_t squba; + uint32_t sqdao; + uint32_t sqisao; + uint32_t sqcfg; + uint32_t rsvd0[2]; + uint32_t cqattr; + uint32_t cqlba; + uint32_t cquba; + uint32_t cqdao; + uint32_t cqisao; + uint32_t cqcfg; + uint32_t rsvd1[2]; +} UfsMcqReg; + +REG32(SQATTR, offsetof(UfsMcqReg, sqattr)) + FIELD(SQATTR, SIZE, 0, 16) + FIELD(SQATTR, CQID, 16, 8) + FIELD(SQATTR, SQPL, 28, 3) + FIELD(SQATTR, SQEN, 31, 1) +REG32(SQLBA, offsetof(UfsMcqReg, sqlba)) +REG32(SQUBA, offsetof(UfsMcqReg, squba)) +REG32(SQDAO, offsetof(UfsMcqReg, sqdao)) +REG32(SQISAO, offsetof(UfsMcqReg, sqisao)) +REG32(SQCFG, offsetof(UfsMcqReg, sqcfg)) +REG32(CQATTR, offsetof(UfsMcqReg, cqattr)) + FIELD(CQATTR, SIZE, 0, 16) + FIELD(CQATTR, CQEN, 31, 1) +REG32(CQLBA, offsetof(UfsMcqReg, cqlba)) +REG32(CQUBA, offsetof(UfsMcqReg, cquba)) +REG32(CQDAO, offsetof(UfsMcqReg, cqdao)) +REG32(CQISAO, offsetof(UfsMcqReg, cqisao)) +REG32(CQCFG, offsetof(UfsMcqReg, cqcfg)) + +typedef struct QEMU_PACKED UfsMcqSqReg { + uint32_t hp; + uint32_t tp; + uint32_t rtc; + uint32_t cti; + uint32_t rts; +} UfsMcqSqReg; + +typedef struct QEMU_PACKED UfsMcqCqReg { + uint32_t hp; + uint32_t tp; +} UfsMcqCqReg; + +typedef struct QEMU_PACKED UfsMcqSqIntReg { + uint32_t is; + uint32_t ie; +} UfsMcqSqIntReg; + +typedef struct QEMU_PACKED UfsMcqCqIntReg { + uint32_t is; + uint32_t ie; + uint32_t iacr; +} UfsMcqCqIntReg; + +REG32(CQIS, offsetof(UfsMcqCqIntReg, is)) + FIELD(CQIS, TEPS, 0, 1) + typedef struct QEMU_PACKED DeviceDescriptor { uint8_t length; uint8_t descriptor_idn; @@ -1064,9 +1149,26 @@ typedef struct QEMU_PACKED UtpUpiuRsp { }; } UtpUpiuRsp; =20 +/* + * MCQ Completion Queue Entry + */ +typedef UtpTransferReqDesc UfsSqEntry; +typedef struct QEMU_PACKED UfsCqEntry { + uint64_t utp_addr; + uint16_t resp_len; + uint16_t resp_off; + uint16_t prdt_len; + uint16_t prdt_off; + uint8_t status; + uint8_t error; + uint16_t rsvd1; + uint32_t rsvd2[3]; +} UfsCqEntry; + static inline void _ufs_check_size(void) { - QEMU_BUILD_BUG_ON(sizeof(UfsReg) !=3D 0x104); + QEMU_BUILD_BUG_ON(sizeof(UfsReg) !=3D 0x38C); + QEMU_BUILD_BUG_ON(sizeof(UfsMcqReg) !=3D 64); QEMU_BUILD_BUG_ON(sizeof(DeviceDescriptor) !=3D 89); QEMU_BUILD_BUG_ON(sizeof(GeometryDescriptor) !=3D 87); QEMU_BUILD_BUG_ON(sizeof(UnitDescriptor) !=3D 45); @@ -1086,5 +1188,7 @@ static inline void _ufs_check_size(void) QEMU_BUILD_BUG_ON(sizeof(UtpTaskReqDesc) !=3D 80); QEMU_BUILD_BUG_ON(sizeof(UtpCmdRsp) !=3D 40); QEMU_BUILD_BUG_ON(sizeof(UtpUpiuRsp) !=3D 288); + QEMU_BUILD_BUG_ON(sizeof(UfsSqEntry) !=3D 32); + QEMU_BUILD_BUG_ON(sizeof(UfsCqEntry) !=3D 32); } #endif --=20 2.34.1