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Mon, 20 May 2024 10:33:40 +0000 Received: from smtpav03.fra02v.mail.ibm.com (smtpav03.fra02v.mail.ibm.com [10.20.54.102]) by smtprelay07.fra02v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 44KAXaVW51249480 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Mon, 20 May 2024 10:33:39 GMT Received: from smtpav03.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id DA7B820067; Mon, 20 May 2024 10:33:36 +0000 (GMT) Received: from smtpav03.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 5C79A2004B; Mon, 20 May 2024 10:33:35 +0000 (GMT) Received: from li-1901474c-32f3-11b2-a85c-fc5ff2c001f3.ibm.com (unknown [9.195.33.101]) by smtpav03.fra02v.mail.ibm.com (Postfix) with ESMTP; Mon, 20 May 2024 10:33:35 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding; s=pp1; bh=kiUm3CTdqcX7ZE+siiqzqIMJQ6QJt8w5BNVfDuzRtQ0=; b=EbJVXN1BHHSrp+LcyWocFyuUXzZ3QQC5R+oXF6ZOaGXAS90zUK1WRJWnjZwUQk1M3+7K dBE2S/cHNtViidXfpiKKZQgw166OVJIZduHFiTn8X3SF8g/z8AcfTJ8zC46WQHLqkv2g QCMmdgqRxUI5IIOCYfURuC0M3Eo39BzxEYVzXNWn8GUIeu9RVNxZc2XW3K0hWZYAbIgg Bx0MjJ+elBegLasWqCVGRUIXVxIfSazQ1Me9Qwh1mcYajPW3a937iYe4XL6noFfgeGrI U5Bahoo/f65V+GBlGFKr3YG1/izrz29KlzzfyTnIsJ6qE3AoJrnsUlkub9VZK24BQGGP gg== From: Harsh Prateek Bora To: npiggin@gmail.com, qemu-ppc@nongnu.org Cc: danielhb413@gmail.com, qemu-devel@nongnu.org Subject: [PATCH 1/6] target/ppc: use locally stored msr and avoid indirect access Date: Mon, 20 May 2024 16:03:24 +0530 Message-Id: <20240520103329.381158-2-harshpb@linux.ibm.com> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20240520103329.381158-1-harshpb@linux.ibm.com> References: <20240520103329.381158-1-harshpb@linux.ibm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-TM-AS-GCONF: 00 X-Proofpoint-GUID: 4GWajSrecyuy0dVinF_MHVh-_eA5vCge X-Proofpoint-ORIG-GUID: PW77nY7Q8-cPFOmg0t_gk4O_cp4Cck3D X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.650,FMLib:17.11.176.26 definitions=2024-05-20_05,2024-05-17_03,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 priorityscore=1501 mlxlogscore=717 adultscore=0 phishscore=0 clxscore=1015 mlxscore=0 spamscore=0 malwarescore=0 suspectscore=0 lowpriorityscore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2405010000 definitions=main-2405200087 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=148.163.156.1; envelope-from=harshpb@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ibm.com) X-ZM-MESSAGEID: 1716201280668100008 Content-Type: text/plain; charset="utf-8" hreg_compute_hflags_value already stores msr locally to be used in most of the logic in the routine however some instances are still using env->msr which is unnecessary. Use locally stored value as available. Signed-off-by: Harsh Prateek Bora --- target/ppc/helper_regs.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/ppc/helper_regs.c b/target/ppc/helper_regs.c index 25258986e3..945fa1a596 100644 --- a/target/ppc/helper_regs.c +++ b/target/ppc/helper_regs.c @@ -106,10 +106,10 @@ static uint32_t hreg_compute_hflags_value(CPUPPCState= *env) =20 if (ppc_flags & POWERPC_FLAG_DE) { target_ulong dbcr0 =3D env->spr[SPR_BOOKE_DBCR0]; - if ((dbcr0 & DBCR0_ICMP) && FIELD_EX64(env->msr, MSR, DE)) { + if ((dbcr0 & DBCR0_ICMP) && FIELD_EX64(msr, MSR, DE)) { hflags |=3D 1 << HFLAGS_SE; } - if ((dbcr0 & DBCR0_BRT) && FIELD_EX64(env->msr, MSR, DE)) { + if ((dbcr0 & DBCR0_BRT) && FIELD_EX64(msr, MSR, DE)) { hflags |=3D 1 << HFLAGS_BE; } } else { --=20 2.39.3 From nobody Mon Nov 25 09:41:47 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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Mon, 20 May 2024 10:33:40 GMT Received: from smtpav03.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 87BBC20076; Mon, 20 May 2024 10:33:38 +0000 (GMT) Received: from smtpav03.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 4760120040; Mon, 20 May 2024 10:33:37 +0000 (GMT) Received: from li-1901474c-32f3-11b2-a85c-fc5ff2c001f3.ibm.com (unknown [9.195.33.101]) by smtpav03.fra02v.mail.ibm.com (Postfix) with ESMTP; Mon, 20 May 2024 10:33:37 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding; s=pp1; bh=HjqK2NAGi9XWKEgUhbZl8ayDln1Jdj+CNjARTqU5kCo=; b=Dmqn1+FFJgW9eAsCroQLVDdJhg5Qhb2eaXiL3aqGwZASX8bRExZTYAcYSC6PL7DCL4Bc hKRSntQ7O24OL/RYKb6KYMwrQcxL8Z5ar6fm21TDfSvHYycK8+7f7kVK4wPAu9SG9FF5 OlFHq43XrnEcelhv7tFkl0p6zTAupCAyjjAjIl/gfU4Z3b5pRaP90GTEC2BJuzBwpRYv vpBElog4tF8pflTEHO1cuJAtnU6KsZU+smYfcV2flcDVJ3DaLyllgXZUW/8/1a6o8Pn4 F4FkG1fdMuZIp6wJ/tQKxUhHtvATqFCtK3kFfJeXMP78zPvqiMJO/3EXeeGVrPNgeddX sg== From: Harsh Prateek Bora To: npiggin@gmail.com, qemu-ppc@nongnu.org Cc: danielhb413@gmail.com, qemu-devel@nongnu.org Subject: [PATCH 2/6] target/ppc: optimize hreg_compute_pmu_hflags_value Date: Mon, 20 May 2024 16:03:25 +0530 Message-Id: <20240520103329.381158-3-harshpb@linux.ibm.com> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20240520103329.381158-1-harshpb@linux.ibm.com> References: <20240520103329.381158-1-harshpb@linux.ibm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-TM-AS-GCONF: 00 X-Proofpoint-GUID: IAHv8jm-KbRJ07_Pez8VygllLfOgoPg6 X-Proofpoint-ORIG-GUID: 6NvQfNilhiwHnRn1DuVUm5pb2LsYDEbn X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.650,FMLib:17.11.176.26 definitions=2024-05-20_05,2024-05-17_03,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 mlxscore=0 mlxlogscore=399 lowpriorityscore=0 malwarescore=0 spamscore=0 bulkscore=0 priorityscore=1501 adultscore=0 phishscore=0 clxscore=1015 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2405010000 definitions=main-2405200087 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=148.163.158.5; envelope-from=harshpb@linux.ibm.com; helo=mx0b-001b2d01.pphosted.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ibm.com) X-ZM-MESSAGEID: 1716201314795100003 Content-Type: text/plain; charset="utf-8" Cache env->spr[SPR_POWER_MMCR0] in a local variable as used in multiple conditions to avoid multiple indirect accesses. Signed-off-by: Harsh Prateek Bora --- target/ppc/helper_regs.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/target/ppc/helper_regs.c b/target/ppc/helper_regs.c index 945fa1a596..5de0df5795 100644 --- a/target/ppc/helper_regs.c +++ b/target/ppc/helper_regs.c @@ -50,15 +50,16 @@ void hreg_swap_gpr_tgpr(CPUPPCState *env) static uint32_t hreg_compute_pmu_hflags_value(CPUPPCState *env) { uint32_t hflags =3D 0; - #if defined(TARGET_PPC64) - if (env->spr[SPR_POWER_MMCR0] & MMCR0_PMCC0) { + target_ulong spr_power_mmcr0 =3D env->spr[SPR_POWER_MMCR0]; + + if (spr_power_mmcr0 & MMCR0_PMCC0) { hflags |=3D 1 << HFLAGS_PMCC0; } - if (env->spr[SPR_POWER_MMCR0] & MMCR0_PMCC1) { + if (spr_power_mmcr0 & MMCR0_PMCC1) { hflags |=3D 1 << HFLAGS_PMCC1; } - if (env->spr[SPR_POWER_MMCR0] & MMCR0_PMCjCE) { + if (spr_power_mmcr0 & MMCR0_PMCjCE) { hflags |=3D 1 << HFLAGS_PMCJCE; } =20 --=20 2.39.3 From nobody Mon Nov 25 09:41:47 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; 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Mon, 20 May 2024 10:33:44 +0000 Received: from smtpav03.fra02v.mail.ibm.com (smtpav03.fra02v.mail.ibm.com [10.20.54.102]) by smtprelay05.fra02v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 44KAXePO50987470 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Mon, 20 May 2024 10:33:42 GMT Received: from smtpav03.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 3C3022005A; Mon, 20 May 2024 10:33:40 +0000 (GMT) Received: from smtpav03.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id E978E20040; Mon, 20 May 2024 10:33:38 +0000 (GMT) Received: from li-1901474c-32f3-11b2-a85c-fc5ff2c001f3.ibm.com (unknown [9.195.33.101]) by smtpav03.fra02v.mail.ibm.com (Postfix) with ESMTP; Mon, 20 May 2024 10:33:38 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding; s=pp1; bh=oLHPP48FJQe4PgExs5XPQk+GKvk1IrOf0AnrZ2Opom4=; b=pqI36mLb+1llZX0P7EiuKHdd4zUcJq8wE0NYD2G+IcXJVeQszNK5/MMW78HRAiDwmdsU syCjKKHW1ugCwyzGithHpTBpYSjvNL9UN9enTNFztGf3i8rOuXXeR/kfz4PCzeoswr2q q3L91lKch2tjKLq+mbShm/tSNLxGTBKfXpaJGSw8a6si9EwgsQyv/JNU0uywKvuyY/zO JUInfSkuVikoEp/PK2yIWmb1Emx8FSiQ9c0Kl9wLnYdR5E8dfMjlZcn78J4VF8tDR5yH r5ENQja6ynYir/0INHv//jyU6dl0LQ8UflDtYwL0m8zLufYM2oiWtHolwJ8PT5Y9akCC gA== From: Harsh Prateek Bora To: npiggin@gmail.com, qemu-ppc@nongnu.org Cc: danielhb413@gmail.com, qemu-devel@nongnu.org Subject: [PATCH 3/6] target/ppc: optimize hreg_compute_pmu_hflags_value Date: Mon, 20 May 2024 16:03:26 +0530 Message-Id: <20240520103329.381158-4-harshpb@linux.ibm.com> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20240520103329.381158-1-harshpb@linux.ibm.com> References: <20240520103329.381158-1-harshpb@linux.ibm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: HtDraHpu1X5ey4Ykf7Sniyogq6_FmzgG X-Proofpoint-GUID: Qi5kRh1_LvDV6wI5F6IbLMW8M_O2uBv4 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.650,FMLib:17.11.176.26 definitions=2024-05-20_05,2024-05-17_03,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 suspectscore=0 mlxscore=0 lowpriorityscore=0 impostorscore=0 phishscore=0 bulkscore=0 malwarescore=0 clxscore=1015 adultscore=0 spamscore=0 mlxlogscore=430 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2405010000 definitions=main-2405200087 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=148.163.158.5; envelope-from=harshpb@linux.ibm.com; helo=mx0b-001b2d01.pphosted.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ibm.com) X-ZM-MESSAGEID: 1716201292730100001 Content-Type: text/plain; charset="utf-8" The second if-condition can be true only if the first one above is true. Enclose the latter into the former to avoid un-necessary check if first condition fails. Signed-off-by: Harsh Prateek Bora Reviewed-by: BALATON Zoltan --- target/ppc/helper_regs.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/target/ppc/helper_regs.c b/target/ppc/helper_regs.c index 5de0df5795..89aacdf212 100644 --- a/target/ppc/helper_regs.c +++ b/target/ppc/helper_regs.c @@ -66,9 +66,9 @@ static uint32_t hreg_compute_pmu_hflags_value(CPUPPCState= *env) #ifndef CONFIG_USER_ONLY if (env->pmc_ins_cnt) { hflags |=3D 1 << HFLAGS_INSN_CNT; - } - if (env->pmc_ins_cnt & 0x1e) { - hflags |=3D 1 << HFLAGS_PMC_OTHER; + if (env->pmc_ins_cnt & 0x1e) { + hflags |=3D 1 << HFLAGS_PMC_OTHER; + } } #endif #endif --=20 2.39.3 From nobody Mon Nov 25 09:41:47 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=linux.ibm.com ARC-Seal: i=1; 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Mon, 20 May 2024 10:33:44 GMT Received: from smtpav03.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id E9AE62004D; Mon, 20 May 2024 10:33:41 +0000 (GMT) Received: from smtpav03.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 9D68C20040; Mon, 20 May 2024 10:33:40 +0000 (GMT) Received: from li-1901474c-32f3-11b2-a85c-fc5ff2c001f3.ibm.com (unknown [9.195.33.101]) by smtpav03.fra02v.mail.ibm.com (Postfix) with ESMTP; Mon, 20 May 2024 10:33:40 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding; s=pp1; bh=0el9Vuo4hmVFd1M6Rs7vUpttBZy2/hKb73FLJFQ3Wg4=; b=JHDDcQ343DaJ3Mc0qnKIR9DfJObGo1fD9TASaZxOAIo5QjXKf6GB3mUIDrNOXFutmmJJ GR5yvtXxNWWLTVB1QCZd+upbxI0TTjXa/gf3cyFVNocXDcF2zL5bwJPNIM9PDez4oQ1/ K4PqtY/Ec1fjCX6p/9GqMV/B/4j5TTwI3Gv926uCynsLHZkpRY0nA3sF+GTXeoGutEik gE6I1XxM+FqEEh/e52xim5wOSIbTPn0rtap6LWMKjz0hrE+Nkpn0Ucsa22PxBQBEzigz waYVsAsJiFCtnygXIOw9ptTXhmR7TqtIJ259EW73mruTKIpMHbGyBu9lWZhHbceSxKfM mQ== From: Harsh Prateek Bora To: npiggin@gmail.com, qemu-ppc@nongnu.org Cc: danielhb413@gmail.com, qemu-devel@nongnu.org Subject: [PATCH 4/6] target/ppc: optimize p9 exception handling routines Date: Mon, 20 May 2024 16:03:27 +0530 Message-Id: <20240520103329.381158-5-harshpb@linux.ibm.com> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20240520103329.381158-1-harshpb@linux.ibm.com> References: <20240520103329.381158-1-harshpb@linux.ibm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: tFPQseUoPgVS2-dqK_tww0clG3yptsVQ X-Proofpoint-GUID: SPKRe3ESoBiIMIzjQlrRF-AZG5ZjH55q X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.650,FMLib:17.11.176.26 definitions=2024-05-20_05,2024-05-17_03,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 spamscore=0 lowpriorityscore=0 bulkscore=0 priorityscore=1501 mlxlogscore=657 suspectscore=0 malwarescore=0 phishscore=0 impostorscore=0 clxscore=1015 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2405010000 definitions=main-2405200087 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=148.163.156.1; envelope-from=harshpb@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ibm.com) X-ZM-MESSAGEID: 1716201330897100001 Content-Type: text/plain; charset="utf-8" Currently, p9 exception handling has multiple if-condition checks where it does an indirect access to pending_interrupts via env. Cache the value during entry and reuse later to avoid multiple indirect accesses. Signed-off-by: Harsh Prateek Bora --- target/ppc/excp_helper.c | 39 +++++++++++++++++++++------------------ 1 file changed, 21 insertions(+), 18 deletions(-) diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c index 0712098cf7..4f158196bb 100644 --- a/target/ppc/excp_helper.c +++ b/target/ppc/excp_helper.c @@ -1844,8 +1844,10 @@ static int p8_next_unmasked_interrupt(CPUPPCState *e= nv) =20 static int p9_interrupt_powersave(CPUPPCState *env) { + uint32_t pending_interrupts =3D env->pending_interrupts; + /* External Exception */ - if ((env->pending_interrupts & PPC_INTERRUPT_EXT) && + if ((pending_interrupts & PPC_INTERRUPT_EXT) && (env->spr[SPR_LPCR] & LPCR_EEE)) { bool heic =3D !!(env->spr[SPR_LPCR] & LPCR_HEIC); if (!heic || !FIELD_EX64_HV(env->msr) || @@ -1854,35 +1856,35 @@ static int p9_interrupt_powersave(CPUPPCState *env) } } /* Decrementer Exception */ - if ((env->pending_interrupts & PPC_INTERRUPT_DECR) && + if ((pending_interrupts & PPC_INTERRUPT_DECR) && (env->spr[SPR_LPCR] & LPCR_DEE)) { return PPC_INTERRUPT_DECR; } /* Machine Check or Hypervisor Maintenance Exception */ if (env->spr[SPR_LPCR] & LPCR_OEE) { - if (env->pending_interrupts & PPC_INTERRUPT_MCK) { + if (pending_interrupts & PPC_INTERRUPT_MCK) { return PPC_INTERRUPT_MCK; } - if (env->pending_interrupts & PPC_INTERRUPT_HMI) { + if (pending_interrupts & PPC_INTERRUPT_HMI) { return PPC_INTERRUPT_HMI; } } /* Privileged Doorbell Exception */ - if ((env->pending_interrupts & PPC_INTERRUPT_DOORBELL) && + if ((pending_interrupts & PPC_INTERRUPT_DOORBELL) && (env->spr[SPR_LPCR] & LPCR_PDEE)) { return PPC_INTERRUPT_DOORBELL; } /* Hypervisor Doorbell Exception */ - if ((env->pending_interrupts & PPC_INTERRUPT_HDOORBELL) && + if ((pending_interrupts & PPC_INTERRUPT_HDOORBELL) && (env->spr[SPR_LPCR] & LPCR_HDEE)) { return PPC_INTERRUPT_HDOORBELL; } /* Hypervisor virtualization exception */ - if ((env->pending_interrupts & PPC_INTERRUPT_HVIRT) && + if ((pending_interrupts & PPC_INTERRUPT_HVIRT) && (env->spr[SPR_LPCR] & LPCR_HVEE)) { return PPC_INTERRUPT_HVIRT; } - if (env->pending_interrupts & PPC_INTERRUPT_RESET) { + if (pending_interrupts & PPC_INTERRUPT_RESET) { return PPC_INTERRUPT_RESET; } return 0; @@ -1891,11 +1893,12 @@ static int p9_interrupt_powersave(CPUPPCState *env) static int p9_next_unmasked_interrupt(CPUPPCState *env) { CPUState *cs =3D env_cpu(env); + uint32_t pending_interrupts =3D env->pending_interrupts; =20 /* Ignore MSR[EE] when coming out of some power management states */ bool msr_ee =3D FIELD_EX64(env->msr, MSR, EE) || env->resume_as_sreset; =20 - assert((env->pending_interrupts & P9_UNUSED_INTERRUPTS) =3D=3D 0); + assert((pending_interrupts & P9_UNUSED_INTERRUPTS) =3D=3D 0); =20 if (cs->halted) { if (env->spr[SPR_PSSCR] & PSSCR_EC) { @@ -1914,12 +1917,12 @@ static int p9_next_unmasked_interrupt(CPUPPCState *= env) } =20 /* Machine check exception */ - if (env->pending_interrupts & PPC_INTERRUPT_MCK) { + if (pending_interrupts & PPC_INTERRUPT_MCK) { return PPC_INTERRUPT_MCK; } =20 /* Hypervisor decrementer exception */ - if (env->pending_interrupts & PPC_INTERRUPT_HDECR) { + if (pending_interrupts & PPC_INTERRUPT_HDECR) { /* LPCR will be clear when not supported so this will work */ bool hdice =3D !!(env->spr[SPR_LPCR] & LPCR_HDICE); if ((msr_ee || !FIELD_EX64_HV(env->msr)) && hdice) { @@ -1929,7 +1932,7 @@ static int p9_next_unmasked_interrupt(CPUPPCState *en= v) } =20 /* Hypervisor virtualization interrupt */ - if (env->pending_interrupts & PPC_INTERRUPT_HVIRT) { + if (pending_interrupts & PPC_INTERRUPT_HVIRT) { /* LPCR will be clear when not supported so this will work */ bool hvice =3D !!(env->spr[SPR_LPCR] & LPCR_HVICE); if ((msr_ee || !FIELD_EX64_HV(env->msr)) && hvice) { @@ -1938,7 +1941,7 @@ static int p9_next_unmasked_interrupt(CPUPPCState *en= v) } =20 /* External interrupt can ignore MSR:EE under some circumstances */ - if (env->pending_interrupts & PPC_INTERRUPT_EXT) { + if (pending_interrupts & PPC_INTERRUPT_EXT) { bool lpes0 =3D !!(env->spr[SPR_LPCR] & LPCR_LPES0); bool heic =3D !!(env->spr[SPR_LPCR] & LPCR_HEIC); /* HEIC blocks delivery to the hypervisor */ @@ -1950,20 +1953,20 @@ static int p9_next_unmasked_interrupt(CPUPPCState *= env) } if (msr_ee !=3D 0) { /* Decrementer exception */ - if (env->pending_interrupts & PPC_INTERRUPT_DECR) { + if (pending_interrupts & PPC_INTERRUPT_DECR) { return PPC_INTERRUPT_DECR; } - if (env->pending_interrupts & PPC_INTERRUPT_DOORBELL) { + if (pending_interrupts & PPC_INTERRUPT_DOORBELL) { return PPC_INTERRUPT_DOORBELL; } - if (env->pending_interrupts & PPC_INTERRUPT_HDOORBELL) { + if (pending_interrupts & PPC_INTERRUPT_HDOORBELL) { return PPC_INTERRUPT_HDOORBELL; } - if (env->pending_interrupts & PPC_INTERRUPT_PERFM) { + if (pending_interrupts & PPC_INTERRUPT_PERFM) { return PPC_INTERRUPT_PERFM; } /* EBB exception */ - if (env->pending_interrupts & PPC_INTERRUPT_EBB) { + if (pending_interrupts & PPC_INTERRUPT_EBB) { /* * EBB exception must be taken in problem state and * with BESCR_GE set. --=20 2.39.3 From nobody Mon Nov 25 09:41:47 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=reject dis=none) header.from=linux.ibm.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1716201278856997.3086204213538; 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Mon, 20 May 2024 10:33:44 +0000 (GMT) Received: from smtpav03.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 5886B20069; Mon, 20 May 2024 10:33:42 +0000 (GMT) Received: from li-1901474c-32f3-11b2-a85c-fc5ff2c001f3.ibm.com (unknown [9.195.33.101]) by smtpav03.fra02v.mail.ibm.com (Postfix) with ESMTP; Mon, 20 May 2024 10:33:42 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding; s=pp1; bh=C1z55ob6ILFhB/F9XKyEAxuTVH6f8WG1wpN0kMBnKnY=; b=Flo3io/Mlkj8YhgXMnVc+2J4d0B4TlIEyk80R4++A7KIuNu4yI1D3OUci2y/MbnQbaTv XUb/YOTVaq5gt41O/z5rIwJ/eYnMHhjOLnw9GEDKIsNdo2kLL2Sx6maRtEUXG/1Nw1ri qt5lxOqClZf3diBMvSyvObL/CtCtci1hN5FOnzqAyA2EKFlmyyBHlBWaz6KEVl254L9A YNe8xZBTCrygdvqMKfRPblYk0k37e8NzgI0J1o9L1+2weBRTiAYmuMDbuikH06hFQcPI mzzwLQGzICwY6Rtjje3HnYm3A/kiW2XvRS+xQPvAUUpr1MgJ+A21/nEaiMT1csVi2fTk mQ== From: Harsh Prateek Bora To: npiggin@gmail.com, qemu-ppc@nongnu.org Cc: danielhb413@gmail.com, qemu-devel@nongnu.org Subject: [PATCH 5/6] target/ppc: reduce duplicate code between init_proc_POWER{9, 10} Date: Mon, 20 May 2024 16:03:28 +0530 Message-Id: <20240520103329.381158-6-harshpb@linux.ibm.com> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20240520103329.381158-1-harshpb@linux.ibm.com> References: <20240520103329.381158-1-harshpb@linux.ibm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: QkvDSY17tvLvv2_WyIhPouoBruNc4y98 X-Proofpoint-GUID: Q0_wjmUpPTOSOc3ukwoZCJVivRpLmGKc X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.650,FMLib:17.11.176.26 definitions=2024-05-20_05,2024-05-17_03,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 lowpriorityscore=0 phishscore=0 spamscore=0 suspectscore=0 bulkscore=0 adultscore=0 impostorscore=0 clxscore=1015 mlxlogscore=573 malwarescore=0 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2405010000 definitions=main-2405200087 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=148.163.156.1; envelope-from=harshpb@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1716201280682100009 Content-Type: text/plain; charset="utf-8" Historically, the registration of sprs have been inherited alongwith every new Power arch support being added leading to a lot of code duplication. It's time to do necessary cleanups now to avoid further duplication with newer arch support being added. Signed-off-by: Harsh Prateek Bora --- target/ppc/cpu_init.c | 43 +++++++++---------------------------------- 1 file changed, 9 insertions(+), 34 deletions(-) diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index 6d82f24c87..636e12ba7a 100644 --- a/target/ppc/cpu_init.c +++ b/target/ppc/cpu_init.c @@ -6307,7 +6307,7 @@ static struct ppc_radix_page_info POWER9_radix_page_i= nfo =3D { }; #endif /* CONFIG_USER_ONLY */ =20 -static void init_proc_POWER9(CPUPPCState *env) +static inline void register_power9_common_sprs(CPUPPCState *env) { /* Common Registers */ init_proc_book3s_common(env); @@ -6326,7 +6326,6 @@ static void init_proc_POWER9(CPUPPCState *env) register_power5p_ear_sprs(env); register_power5p_tb_sprs(env); register_power6_common_sprs(env); - register_HEIR32_spr(env); register_power6_dbg_sprs(env); register_power8_tce_address_control_sprs(env); register_power8_ids_sprs(env); @@ -6342,6 +6341,12 @@ static void init_proc_POWER9(CPUPPCState *env) register_power9_book4_sprs(env); register_power8_rpr_sprs(env); register_power9_mmu_sprs(env); +} + +static void init_proc_POWER9(CPUPPCState *env) +{ + register_power9_common_sprs(env); + register_HEIR32_spr(env); =20 /* POWER9 Specific registers */ spr_register_kvm(env, SPR_TIDR, "TIDR", NULL, NULL, @@ -6499,39 +6504,9 @@ static struct ppc_radix_page_info POWER10_radix_page= _info =3D { =20 static void init_proc_POWER10(CPUPPCState *env) { - /* Common Registers */ - init_proc_book3s_common(env); - register_book3s_207_dbg_sprs(env); - - /* Common TCG PMU */ - init_tcg_pmu_power8(env); - - /* POWER8 Specific Registers */ - register_book3s_ids_sprs(env); - register_amr_sprs(env); - register_iamr_sprs(env); - register_book3s_purr_sprs(env); - register_power5p_common_sprs(env); - register_power5p_lpar_sprs(env); - register_power5p_ear_sprs(env); - register_power5p_tb_sprs(env); - register_power6_common_sprs(env); + register_power9_common_sprs(env); register_HEIR64_spr(env); - register_power6_dbg_sprs(env); - register_power8_tce_address_control_sprs(env); - register_power8_ids_sprs(env); - register_power8_ebb_sprs(env); - register_power8_fscr_sprs(env); - register_power8_pmu_sup_sprs(env); - register_power8_pmu_user_sprs(env); - register_power8_tm_sprs(env); - register_power8_pspb_sprs(env); - register_power8_dpdes_sprs(env); - register_vtb_sprs(env); - register_power8_ic_sprs(env); - register_power9_book4_sprs(env); - register_power8_rpr_sprs(env); - register_power9_mmu_sprs(env); + register_power10_hash_sprs(env); register_power10_dexcr_sprs(env); register_power10_pmu_sup_sprs(env); --=20 2.39.3 From nobody Mon Nov 25 09:41:47 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=reject dis=none) header.from=linux.ibm.com ARC-Seal: i=1; a=rsa-sha256; t=1716201330; cv=none; d=zohomail.com; s=zohoarc; b=INkN3nR55mY19NQkdbyhO66iz9OwikdY+ePO1d0xcNeGAhEL60eEhIFi6zZYqt7RpWglI17C12dTmLL1dmoYIEWinTKdT2joFag50I2TGb5jbfs6P9MXTd/VECe4PKTZLMupvXt+y0W/9clWsY9oFRx4DeAqHg4h6CmHYYSLqOM= ARC-Message-Signature: i=1; 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Mon, 20 May 2024 10:33:44 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding; s=pp1; bh=KTOq10yvZhFXALEkREdFPnVXyjeE568UYyiVEIZJazo=; b=PQrBSrpyTxO6bNaSc93a+px+TAuF1XXUKs2niMCPPWDrb959A7cPoecjWwM59GB6yRR9 V4DVEcpNyccrI0bkEB2ckNzKvIsI1ILguMA5mjdTH+eiotGGq9R2j8mhOhfv88T+iU+Q zAwBCY5ue2nGFkl1dqDOCEKwVRUpzpJfJgdUz7p7M45QzG//mq9w0eMRXX9Td00hTf0O KuEoaxrixJwDA6BQOEBtzEbxB5qb2E2/yYtaKNl3Lkz5EVBuVYOZDZWzq5OxZIfKT4mI zqPaV123R2APwUqoJNjWaQhUn9e21r0Rhse9io63jkDgr050r13PpdEBN0a1OxBL9m1W aA== From: Harsh Prateek Bora To: npiggin@gmail.com, qemu-ppc@nongnu.org Cc: danielhb413@gmail.com, qemu-devel@nongnu.org Subject: [PATCH 6/6] target/ppc: redue code duplication across Power9/10 init code Date: Mon, 20 May 2024 16:03:29 +0530 Message-Id: <20240520103329.381158-7-harshpb@linux.ibm.com> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20240520103329.381158-1-harshpb@linux.ibm.com> References: <20240520103329.381158-1-harshpb@linux.ibm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-TM-AS-GCONF: 00 X-Proofpoint-GUID: 8CBHzPOYohJUPfGSrtOwaQO2hVmgx5-L X-Proofpoint-ORIG-GUID: WeXOy5SCAGEX3Lw7m0b4uU9Ybt7mF3zh X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.650,FMLib:17.11.176.26 definitions=2024-05-20_05,2024-05-17_03,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 phishscore=0 mlxlogscore=999 adultscore=0 spamscore=0 suspectscore=0 bulkscore=0 priorityscore=1501 clxscore=1015 lowpriorityscore=0 malwarescore=0 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2405010000 definitions=main-2405200087 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=148.163.156.1; envelope-from=harshpb@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, UPPERCASE_50_75=0.008 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @ibm.com) X-ZM-MESSAGEID: 1716201333095100007 Content-Type: text/plain; charset="utf-8" Power9/10 initialization code consists of a lot of logical OR of various flag bits as supported by respective Power platform during its initialization, most of which is duplicated and only selected bits are added or removed as needed with each new platform support being added. Remove the duplicate code and share using common macros. Signed-off-by: Harsh Prateek Bora --- target/ppc/cpu_init.h | 79 +++++++++++++++++++++++++++ target/ppc/cpu_init.c | 123 ++++++------------------------------------ 2 files changed, 94 insertions(+), 108 deletions(-) create mode 100644 target/ppc/cpu_init.h diff --git a/target/ppc/cpu_init.h b/target/ppc/cpu_init.h new file mode 100644 index 0000000000..29358bfdf6 --- /dev/null +++ b/target/ppc/cpu_init.h @@ -0,0 +1,79 @@ +#ifndef TARGET_PPC_CPU_INIT_H +#define TARGET_PPC_CPU_INIT_H + +#define POWERPC_FAMILY_POWER9_INSNS_FLAGS \ + PPC_INSNS_BASE | PPC_ISEL | PPC_STRING | PPC_MFTB | \ + PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES | \ + PPC_FLOAT_FSQRT | PPC_FLOAT_FRSQRTE | PPC_FLOAT_FRSQRTES | \ + PPC_FLOAT_STFIWX | PPC_FLOAT_EXT |PPC_CACHE | PPC_CACHE_ICBI | \ + PPC_CACHE_DCBZ | PPC_MEM_SYNC | PPC_MEM_EIEIO | PPC_MEM_TLBIE | \ + PPC_MEM_TLBSYNC | PPC_64B | PPC_64H | PPC_64BX | PPC_ALTIVEC | \ + PPC_SEGMENT_64B | PPC_SLBI | PPC_POPCNTB | PPC_POPCNTWD | \ + PPC_CILDST +#define POWERPC_FAMILY_POWER10_INSNS_FLAGS \ + POWERPC_FAMILY_POWER9_INSNS_FLAGS + +#define POWERPC_FAMILY_POWER9_INSNS_FLAGS2_COMMON \ + PPC2_VSX | PPC2_VSX207 | PPC2_DFP | PPC2_DBRX | \ + PPC2_PERM_ISA206 | PPC2_DIVE_ISA206 | PPC2_ATOMIC_ISA206 | \ + PPC2_FP_CVT_ISA206 | PPC2_FP_TST_ISA206 | PPC2_BCTAR_ISA207 | \ + PPC2_LSQ_ISA207 | PPC2_ALTIVEC_207 | PPC2_ISA205 | \ + PPC2_ISA207S | PPC2_FP_CVT_S64 | PPC2_ISA300 | PPC2_PRCNTL | \ + PPC2_MEM_LWSYNC | PPC2_BCDA_ISA206 + +#define POWERPC_FAMILY_POWER9_INSNS_FLAGS2 \ + POWERPC_FAMILY_POWER9_INSNS_FLAGS2_COMMON | PPC2_TM +#define POWERPC_FAMILY_POWER10_INSNS_FLAGS2 \ + POWERPC_FAMILY_POWER9_INSNS_FLAGS2_COMMON | PPC2_ISA310 + +#define POWERPC_POWER9_COMMON_PCC_MSR_MASK \ + (1ull << MSR_SF) | \ + (1ull << MSR_HV) | \ + (1ull << MSR_VR) | \ + (1ull << MSR_VSX) | \ + (1ull << MSR_EE) | \ + (1ull << MSR_PR) | \ + (1ull << MSR_FP) | \ + (1ull << MSR_ME) | \ + (1ull << MSR_FE0) | \ + (1ull << MSR_SE) | \ + (1ull << MSR_DE) | \ + (1ull << MSR_FE1) | \ + (1ull << MSR_IR) | \ + (1ull << MSR_DR) | \ + (1ull << MSR_PMM) | \ + (1ull << MSR_RI) | \ + (1ull << MSR_LE) + +#define POWERPC_POWER9_PCC_MSR_MASK \ + POWERPC_POWER9_COMMON_PCC_MSR_MASK | (1ull << MSR_TM) +#define POWERPC_POWER10_PCC_MSR_MASK \ + POWERPC_POWER9_COMMON_PCC_MSR_MASK +#define POWERPC_POWER9_PCC_PCR_MASK \ + PCR_COMPAT_2_05 | PCR_COMPAT_2_06 | PCR_COMPAT_2_07 +#define POWERPC_POWER10_PCC_PCR_MASK \ + POWERPC_POWER9_PCC_PCR_MASK | PCR_COMPAT_3_00 +#define POWERPC_POWER9_PCC_PCR_SUPPORTED \ + PCR_COMPAT_3_00 | PCR_COMPAT_2_07 | PCR_COMPAT_2_06 | PCR_COMPAT_2_05 +#define POWERPC_POWER10_PCC_PCR_SUPPORTED \ + POWERPC_POWER9_PCC_PCR_SUPPORTED | PCR_COMPAT_3_10 +#define POWERPC_POWER9_PCC_LPCR_MASK = \ + LPCR_VPM1 | LPCR_ISL | LPCR_KBV | LPCR_DPFD | = \ + (LPCR_PECE_U_MASK & LPCR_HVEE) | LPCR_ILE | LPCR_AIL | = \ + LPCR_UPRT | LPCR_EVIRT | LPCR_ONL | LPCR_HR | LPCR_LD | = \ + (LPCR_PECE_L_MASK & (LPCR_PDEE|LPCR_HDEE|LPCR_EEE|LPCR_DEE|LPCR_OEE)) = | \ + LPCR_MER | LPCR_GTSE | LPCR_TC | LPCR_HEIC | LPCR_LPES0 | LPCR_HVICE |= \ + LPCR_HDICE +/* DD2 adds an extra HAIL bit */ +#define POWERPC_POWER10_PCC_LPCR_MASK \ + POWERPC_POWER9_PCC_LPCR_MASK | LPCR_HAIL +#define POWERPC_POWER9_PCC_FLAGS_COMMON \ + POWERPC_FLAG_VRE | POWERPC_FLAG_SE | POWERPC_FLAG_BE | \ + POWERPC_FLAG_PMM | POWERPC_FLAG_BUS_CLK | POWERPC_FLAG_CFAR | \ + POWERPC_FLAG_VSX | POWERPC_FLAG_SCV + +#define POWERPC_POWER9_PCC_FLAGS \ + POWERPC_POWER9_PCC_FLAGS_COMMON | POWERPC_FLAG_TM +#define POWERPC_POWER10_PCC_FLAGS POWERPC_POWER9_PCC_FLAGS_COMMON + +#endif /* TARGET_PPC_CPU_INIT_H */ diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index 636e12ba7a..48773ec831 100644 --- a/target/ppc/cpu_init.c +++ b/target/ppc/cpu_init.c @@ -51,6 +51,7 @@ #include "kvm_ppc.h" #endif =20 +#include "cpu_init.h" /* #define PPC_DEBUG_SPR */ /* #define USE_APPLE_GDB */ =20 @@ -6412,57 +6413,14 @@ POWERPC_FAMILY(POWER9)(ObjectClass *oc, void *data) dc->fw_name =3D "PowerPC,POWER9"; dc->desc =3D "POWER9"; pcc->pvr_match =3D ppc_pvr_match_power9; - pcc->pcr_mask =3D PCR_COMPAT_2_05 | PCR_COMPAT_2_06 | PCR_COMPAT_2_07; - pcc->pcr_supported =3D PCR_COMPAT_3_00 | PCR_COMPAT_2_07 | PCR_COMPAT_= 2_06 | - PCR_COMPAT_2_05; + pcc->pcr_mask =3D POWERPC_POWER9_PCC_PCR_MASK; + pcc->pcr_supported =3D POWERPC_POWER9_PCC_PCR_SUPPORTED; pcc->init_proc =3D init_proc_POWER9; pcc->check_pow =3D check_pow_nocheck; - pcc->insns_flags =3D PPC_INSNS_BASE | PPC_ISEL | PPC_STRING | PPC_MFTB= | - PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES | - PPC_FLOAT_FSQRT | PPC_FLOAT_FRSQRTE | - PPC_FLOAT_FRSQRTES | - PPC_FLOAT_STFIWX | - PPC_FLOAT_EXT | - PPC_CACHE | PPC_CACHE_ICBI | PPC_CACHE_DCBZ | - PPC_MEM_SYNC | PPC_MEM_EIEIO | - PPC_MEM_TLBIE | PPC_MEM_TLBSYNC | - PPC_64B | PPC_64H | PPC_64BX | PPC_ALTIVEC | - PPC_SEGMENT_64B | PPC_SLBI | - PPC_POPCNTB | PPC_POPCNTWD | - PPC_CILDST; - pcc->insns_flags2 =3D PPC2_VSX | PPC2_VSX207 | PPC2_DFP | PPC2_DBRX | - PPC2_PERM_ISA206 | PPC2_DIVE_ISA206 | - PPC2_ATOMIC_ISA206 | PPC2_FP_CVT_ISA206 | - PPC2_FP_TST_ISA206 | PPC2_BCTAR_ISA207 | - PPC2_LSQ_ISA207 | PPC2_ALTIVEC_207 | - PPC2_ISA205 | PPC2_ISA207S | PPC2_FP_CVT_S64 | - PPC2_TM | PPC2_ISA300 | PPC2_PRCNTL | PPC2_MEM_LWS= YNC | - PPC2_BCDA_ISA206; - pcc->msr_mask =3D (1ull << MSR_SF) | - (1ull << MSR_HV) | - (1ull << MSR_TM) | - (1ull << MSR_VR) | - (1ull << MSR_VSX) | - (1ull << MSR_EE) | - (1ull << MSR_PR) | - (1ull << MSR_FP) | - (1ull << MSR_ME) | - (1ull << MSR_FE0) | - (1ull << MSR_SE) | - (1ull << MSR_DE) | - (1ull << MSR_FE1) | - (1ull << MSR_IR) | - (1ull << MSR_DR) | - (1ull << MSR_PMM) | - (1ull << MSR_RI) | - (1ull << MSR_LE); - pcc->lpcr_mask =3D LPCR_VPM1 | LPCR_ISL | LPCR_KBV | LPCR_DPFD | - (LPCR_PECE_U_MASK & LPCR_HVEE) | LPCR_ILE | LPCR_AIL | - LPCR_UPRT | LPCR_EVIRT | LPCR_ONL | LPCR_HR | LPCR_LD | - (LPCR_PECE_L_MASK & (LPCR_PDEE | LPCR_HDEE | LPCR_EEE | - LPCR_DEE | LPCR_OEE)) - | LPCR_MER | LPCR_GTSE | LPCR_TC | - LPCR_HEIC | LPCR_LPES0 | LPCR_HVICE | LPCR_HDICE; + pcc->insns_flags =3D POWERPC_FAMILY_POWER9_INSNS_FLAGS; + pcc->insns_flags2 =3D POWERPC_FAMILY_POWER9_INSNS_FLAGS2; + pcc->msr_mask =3D POWERPC_POWER9_PCC_MSR_MASK; + pcc->lpcr_mask =3D POWERPC_POWER9_PCC_LPCR_MASK; pcc->lpcr_pm =3D LPCR_PDEE | LPCR_HDEE | LPCR_EEE | LPCR_DEE | LPCR_OE= E; pcc->mmu_model =3D POWERPC_MMU_3_00; #if !defined(CONFIG_USER_ONLY) @@ -6475,10 +6433,7 @@ POWERPC_FAMILY(POWER9)(ObjectClass *oc, void *data) pcc->excp_model =3D POWERPC_EXCP_POWER9; pcc->bus_model =3D PPC_FLAGS_INPUT_POWER9; pcc->bfd_mach =3D bfd_mach_ppc64; - pcc->flags =3D POWERPC_FLAG_VRE | POWERPC_FLAG_SE | - POWERPC_FLAG_BE | POWERPC_FLAG_PMM | - POWERPC_FLAG_BUS_CLK | POWERPC_FLAG_CFAR | - POWERPC_FLAG_VSX | POWERPC_FLAG_TM | POWERPC_FLAG_SCV; + pcc->flags =3D POWERPC_POWER9_PCC_FLAGS; pcc->l1_dcache_size =3D 0x8000; pcc->l1_icache_size =3D 0x8000; } @@ -6557,59 +6512,14 @@ POWERPC_FAMILY(POWER10)(ObjectClass *oc, void *data) dc->fw_name =3D "PowerPC,POWER10"; dc->desc =3D "POWER10"; pcc->pvr_match =3D ppc_pvr_match_power10; - pcc->pcr_mask =3D PCR_COMPAT_2_05 | PCR_COMPAT_2_06 | PCR_COMPAT_2_07 | - PCR_COMPAT_3_00; - pcc->pcr_supported =3D PCR_COMPAT_3_10 | PCR_COMPAT_3_00 | PCR_COMPAT_= 2_07 | - PCR_COMPAT_2_06 | PCR_COMPAT_2_05; + pcc->pcr_mask =3D POWERPC_POWER10_PCC_PCR_MASK; + pcc->pcr_supported =3D POWERPC_POWER10_PCC_PCR_SUPPORTED; pcc->init_proc =3D init_proc_POWER10; pcc->check_pow =3D check_pow_nocheck; - pcc->insns_flags =3D PPC_INSNS_BASE | PPC_ISEL | PPC_STRING | PPC_MFTB= | - PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES | - PPC_FLOAT_FSQRT | PPC_FLOAT_FRSQRTE | - PPC_FLOAT_FRSQRTES | - PPC_FLOAT_STFIWX | - PPC_FLOAT_EXT | - PPC_CACHE | PPC_CACHE_ICBI | PPC_CACHE_DCBZ | - PPC_MEM_SYNC | PPC_MEM_EIEIO | - PPC_MEM_TLBIE | PPC_MEM_TLBSYNC | - PPC_64B | PPC_64H | PPC_64BX | PPC_ALTIVEC | - PPC_SEGMENT_64B | PPC_SLBI | - PPC_POPCNTB | PPC_POPCNTWD | - PPC_CILDST; - pcc->insns_flags2 =3D PPC2_VSX | PPC2_VSX207 | PPC2_DFP | PPC2_DBRX | - PPC2_PERM_ISA206 | PPC2_DIVE_ISA206 | - PPC2_ATOMIC_ISA206 | PPC2_FP_CVT_ISA206 | - PPC2_FP_TST_ISA206 | PPC2_BCTAR_ISA207 | - PPC2_LSQ_ISA207 | PPC2_ALTIVEC_207 | - PPC2_ISA205 | PPC2_ISA207S | PPC2_FP_CVT_S64 | - PPC2_ISA300 | PPC2_PRCNTL | PPC2_ISA310 | - PPC2_MEM_LWSYNC | PPC2_BCDA_ISA206; - pcc->msr_mask =3D (1ull << MSR_SF) | - (1ull << MSR_HV) | - (1ull << MSR_VR) | - (1ull << MSR_VSX) | - (1ull << MSR_EE) | - (1ull << MSR_PR) | - (1ull << MSR_FP) | - (1ull << MSR_ME) | - (1ull << MSR_FE0) | - (1ull << MSR_SE) | - (1ull << MSR_DE) | - (1ull << MSR_FE1) | - (1ull << MSR_IR) | - (1ull << MSR_DR) | - (1ull << MSR_PMM) | - (1ull << MSR_RI) | - (1ull << MSR_LE); - pcc->lpcr_mask =3D LPCR_VPM1 | LPCR_ISL | LPCR_KBV | LPCR_DPFD | - (LPCR_PECE_U_MASK & LPCR_HVEE) | LPCR_ILE | LPCR_AIL | - LPCR_UPRT | LPCR_EVIRT | LPCR_ONL | LPCR_HR | LPCR_LD | - (LPCR_PECE_L_MASK & (LPCR_PDEE | LPCR_HDEE | LPCR_EEE | - LPCR_DEE | LPCR_OEE)) - | LPCR_MER | LPCR_GTSE | LPCR_TC | - LPCR_HEIC | LPCR_LPES0 | LPCR_HVICE | LPCR_HDICE; - /* DD2 adds an extra HAIL bit */ - pcc->lpcr_mask |=3D LPCR_HAIL; + pcc->insns_flags =3D POWERPC_FAMILY_POWER10_INSNS_FLAGS; + pcc->insns_flags2 =3D POWERPC_FAMILY_POWER10_INSNS_FLAGS2; + pcc->msr_mask =3D POWERPC_POWER10_PCC_MSR_MASK; + pcc->lpcr_mask =3D POWERPC_POWER10_PCC_LPCR_MASK; =20 pcc->lpcr_pm =3D LPCR_PDEE | LPCR_HDEE | LPCR_EEE | LPCR_DEE | LPCR_OE= E; pcc->mmu_model =3D POWERPC_MMU_3_00; @@ -6622,10 +6532,7 @@ POWERPC_FAMILY(POWER10)(ObjectClass *oc, void *data) pcc->excp_model =3D POWERPC_EXCP_POWER10; pcc->bus_model =3D PPC_FLAGS_INPUT_POWER9; pcc->bfd_mach =3D bfd_mach_ppc64; - pcc->flags =3D POWERPC_FLAG_VRE | POWERPC_FLAG_SE | - POWERPC_FLAG_BE | POWERPC_FLAG_PMM | - POWERPC_FLAG_BUS_CLK | POWERPC_FLAG_CFAR | - POWERPC_FLAG_VSX | POWERPC_FLAG_SCV; + pcc->flags =3D POWERPC_POWER10_PCC_FLAGS; pcc->l1_dcache_size =3D 0x8000; pcc->l1_icache_size =3D 0x8000; } --=20 2.39.3