From nobody Thu Sep 19 15:48:41 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=quicinc.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1715870114240576.7333776956144; Thu, 16 May 2024 07:35:14 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1s7cBs-0004Os-Vr; Thu, 16 May 2024 10:34:41 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s7cBp-0004Kp-Hb; Thu, 16 May 2024 10:34:37 -0400 Received: from mx0a-0031df01.pphosted.com ([205.220.168.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s7cBm-0008Li-PO; Thu, 16 May 2024 10:34:37 -0400 Received: from pps.filterd (m0279867.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 44GBLF5S008886; Thu, 16 May 2024 14:34:31 GMT Received: from nalasppmta04.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3y3x51pwwj-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 16 May 2024 14:34:31 +0000 (GMT) Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA04.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 44GEYDAU009227 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 16 May 2024 14:34:13 GMT Received: from blr-ubuntu-31.qualcomm.com (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Thu, 16 May 2024 07:34:08 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s= qcppdkim1; bh=SnPAwMXXVZYe7Q+nI/EdBVzc4Z9dngQFeu9fGBE3f4Q=; b=Ji I9qA6CrckW0FsOPvEAz+0XgqT7owu8VBNjiecXI4fuhNleQARGGfBR23D0FEoxtN o7ghWeQnGHrZqPs4vdlQiNEluoInNa3i3ue6+eBIU7FAGaL/CCEK+jla6TXXZu9G 55IkwTngzz4RIKX1zg6tUnMgyZ2SbX89JpuF35n+yJBch2KsVK2KdT3hZhKwRafI eKTPRQreQxPuH3iF7txCOe75ySGWHVSumsryp/eAs7GE563hvlzoBRkS9er1zEfq pBgTarabQWXe+Kjy7mCPSelUpGLqFMKYcVQjPyzurLm6f4ocHecamwhv7TJ90gOo kd931JgbXC36YcW+95tQ== From: Srivatsa Vaddagiri To: , , , , CC: , , , , , , Subject: [RFC/PATCH v2 01/12] gunyah: UAPI header (NOT FOR MERGE) Date: Thu, 16 May 2024 14:33:45 +0000 Message-ID: <20240516143356.1739402-2-quic_svaddagi@quicinc.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240516143356.1739402-1-quic_svaddagi@quicinc.com> References: <20240516143356.1739402-1-quic_svaddagi@quicinc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: d6aqF8afrE9RVLSG9NZbh0xMyi-iaP5K X-Proofpoint-ORIG-GUID: d6aqF8afrE9RVLSG9NZbh0xMyi-iaP5K X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.650,FMLib:17.11.176.26 definitions=2024-05-16_07,2024-05-15_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 suspectscore=0 bulkscore=0 spamscore=0 lowpriorityscore=0 phishscore=0 mlxscore=0 impostorscore=0 adultscore=0 clxscore=1015 mlxlogscore=999 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2405010000 definitions=main-2405160103 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=205.220.168.131; envelope-from=quic_svaddagi@quicinc.com; helo=mx0a-0031df01.pphosted.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1715870116154100001 Content-Type: text/plain; charset="utf-8" Gunyah UAPI header file is provided for ease of use, until Gunyah kernel driver is merged upstream. scripts/update-linux-headers.sh will be updated via a separate patch after that for Qemu to pick up gunyah.h UAPI header from Linux kernel sources. This header file is based on the Gunyah driver present in Android-14. https://android.googlesource.com/kernel/common Branch: android14-6.1 Signed-off-by: Srivatsa Vaddagiri --- linux-headers/linux/gunyah.h | 311 +++++++++++++++++++++++++++++++++++ 1 file changed, 311 insertions(+) create mode 100644 linux-headers/linux/gunyah.h diff --git a/linux-headers/linux/gunyah.h b/linux-headers/linux/gunyah.h new file mode 100644 index 0000000000..c8d250a834 --- /dev/null +++ b/linux-headers/linux/gunyah.h @@ -0,0 +1,311 @@ +/* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */ +/* + * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights res= erved. + */ + +#ifndef _LINUX_GUNYAH_H +#define _LINUX_GUNYAH_H + +/* + * Userspace interface for /dev/gunyah - gunyah based virtual machine + */ + +#include +#include + +#define GH_IOCTL_TYPE 'G' + +/* + * ioctls for /dev/gunyah fds: + */ +#define GH_CREATE_VM _IO(GH_IOCTL_TYPE, 0x0) /* Returns a Gunyah VM fd */ + +/* + * ioctls for VM fds + */ + +/** + * enum gh_mem_flags - Possible flags on &struct gh_userspace_memory_region + * @GH_MEM_ALLOW_READ: Allow guest to read the memory + * @GH_MEM_ALLOW_WRITE: Allow guest to write to the memory + * @GH_MEM_ALLOW_EXEC: Allow guest to execute instructions in the memory + */ +enum gh_mem_flags { + GH_MEM_ALLOW_READ =3D 1UL << 0, + GH_MEM_ALLOW_WRITE =3D 1UL << 1, + GH_MEM_ALLOW_EXEC =3D 1UL << 2, +}; + +/** + * struct gh_userspace_memory_region - Userspace memory descripion for GH_= VM_SET_USER_MEM_REGION + * @label: Identifer to the region which is unique to the VM. + * @flags: Flags for memory parcel behavior. See &enum gh_mem_flags. + * @guest_phys_addr: Location of the memory region in guest's memory space= (page-aligned) + * @memory_size: Size of the region (page-aligned) + * @userspace_addr: Location of the memory region in caller (userspace)'s = memory + * + * See Documentation/virt/gunyah/vm-manager.rst for further details. + */ +struct gh_userspace_memory_region { + __u32 label; + __u32 flags; + __u64 guest_phys_addr; + __u64 memory_size; + __u64 userspace_addr; +}; + +#define GH_VM_SET_USER_MEM_REGION _IOW(GH_IOCTL_TYPE, 0x1, \ + struct gh_userspace_memory_region) + +/** + * struct gh_vm_dtb_config - Set the location of the VM's devicetree blob + * @guest_phys_addr: Address of the VM's devicetree in guest memory. + * @size: Maximum size of the devicetree including space for overlays. + * Resource manager applies an overlay to the DTB and dtb_size shou= ld + * include room for the overlay. A page of memory is typicaly plent= y. + */ +struct gh_vm_dtb_config { + __u64 guest_phys_addr; + __u64 size; +}; +#define GH_VM_SET_DTB_CONFIG _IOW(GH_IOCTL_TYPE, 0x2, struct gh_vm_dtb_con= fig) + +#define GH_VM_START _IO(GH_IOCTL_TYPE, 0x3) + +/** + * enum gh_fn_type - Valid types of Gunyah VM functions + * @GH_FN_VCPU: create a vCPU instance to control a vCPU + * &struct gh_fn_desc.arg is a pointer to &struct gh_fn_vcpu_= arg + * Return: file descriptor to manipulate the vcpu. + * @GH_FN_IRQFD: register eventfd to assert a Gunyah doorbell + * &struct gh_fn_desc.arg is a pointer to &struct gh_fn_irqf= d_arg + * @GH_FN_IOEVENTFD: register ioeventfd to trigger when VM faults on param= eter + * &struct gh_fn_desc.arg is a pointer to &struct gh_fn_= ioeventfd_arg + */ +enum gh_fn_type { + GH_FN_VCPU =3D 1, + GH_FN_IRQFD, + GH_FN_IOEVENTFD, +}; + +#define GH_FN_MAX_ARG_SIZE 256 + +/** + * struct gh_fn_vcpu_arg - Arguments to create a vCPU. + * @id: vcpu id + * + * Create this function with &GH_VM_ADD_FUNCTION using type &GH_FN_VCPU. + * + * The vcpu type will register with the VM Manager to expect to control + * vCPU number `vcpu_id`. It returns a file descriptor allowing interactio= n with + * the vCPU. See the Gunyah vCPU API description sections for interacting = with + * the Gunyah vCPU file descriptors. + */ +struct gh_fn_vcpu_arg { + __u32 id; +}; + +/** + * enum gh_irqfd_flags - flags for use in gh_fn_irqfd_arg + * @GH_IRQFD_FLAGS_LEVEL: make the interrupt operate like a level triggered + * interrupt on guest side. Triggering IRQFD before + * guest handles the interrupt causes interrupt to + * stay asserted. + */ +enum gh_irqfd_flags { + GH_IRQFD_FLAGS_LEVEL =3D 1UL << 0, +}; + +/** + * struct gh_fn_irqfd_arg - Arguments to create an irqfd function. + * + * Create this function with &GH_VM_ADD_FUNCTION using type &GH_FN_IRQFD. + * + * Allows setting an eventfd to directly trigger a guest interrupt. + * irqfd.fd specifies the file descriptor to use as the eventfd. + * irqfd.label corresponds to the doorbell label used in the guest VM's de= vicetree. + * + * @fd: an eventfd which when written to will raise a doorbell + * @label: Label of the doorbell created on the guest VM + * @flags: see &enum gh_irqfd_flags + * @padding: padding bytes + */ +struct gh_fn_irqfd_arg { + __u32 fd; + __u32 label; + __u32 flags; + __u32 padding; +}; + +/** + * enum gh_ioeventfd_flags - flags for use in gh_fn_ioeventfd_arg + * @GH_IOEVENTFD_FLAGS_DATAMATCH: the event will be signaled only if the + * written value to the registered address = is + * equal to &struct gh_fn_ioeventfd_arg.dat= amatch + */ +enum gh_ioeventfd_flags { + GH_IOEVENTFD_FLAGS_DATAMATCH =3D 1UL << 0, +}; + +/** + * struct gh_fn_ioeventfd_arg - Arguments to create an ioeventfd function + * @datamatch: data used when GH_IOEVENTFD_DATAMATCH is set + * @addr: Address in guest memory + * @len: Length of access + * @fd: When ioeventfd is matched, this eventfd is written + * @flags: See &enum gh_ioeventfd_flags + * @padding: padding bytes + * + * Create this function with &GH_VM_ADD_FUNCTION using type &GH_FN_IOEVENT= FD. + * + * Attaches an ioeventfd to a legal mmio address within the guest. A guest= write + * in the registered address will signal the provided event instead of tri= ggering + * an exit on the GH_VCPU_RUN ioctl. + */ +struct gh_fn_ioeventfd_arg { + __u64 datamatch; + __u64 addr; /* legal mmio address */ + __u32 len; /* 1, 2, 4, or 8 bytes; or 0 to ignore length */ + __s32 fd; + __u32 flags; + __u32 padding; +}; + +/** + * struct gh_fn_desc - Arguments to create a VM function + * @type: Type of the function. See &enum gh_fn_type. + * @arg_size: Size of argument to pass to the function. arg_size <=3D GH_F= N_MAX_ARG_SIZE + * @arg: Pointer to argument given to the function. See &enum gh_fn_type f= or expected + * arguments for a function type. + */ +struct gh_fn_desc { + __u32 type; + __u32 arg_size; + __u64 arg; +}; + +#define GH_VM_ADD_FUNCTION _IOW(GH_IOCTL_TYPE, 0x4, struct gh_fn_desc) +#define GH_VM_REMOVE_FUNCTION _IOW(GH_IOCTL_TYPE, 0x7, struct gh_fn_desc) + +/* + * ioctls for vCPU fds + */ + +/** + * enum gh_vm_status - Stores status reason why VM is not runnable (exited= ). + * @GH_VM_STATUS_LOAD_FAILED: VM didn't start because it couldn't be loade= d. + * @GH_VM_STATUS_EXITED: VM requested shutdown/reboot. + * Use &struct gh_vm_exit_info.reason for further de= tails. + * @GH_VM_STATUS_CRASHED: VM state is unknown and has crashed. + */ +enum gh_vm_status { + GH_VM_STATUS_LOAD_FAILED =3D 1, + GH_VM_STATUS_EXITED =3D 2, + GH_VM_STATUS_CRASHED =3D 3, +}; + +/* + * Gunyah presently sends max 4 bytes of exit_reason. + * If that changes, this macro can be safely increased without breaking + * userspace so long as struct gh_vcpu_run < PAGE_SIZE. + */ +#define GH_VM_MAX_EXIT_REASON_SIZE 8u + +/** + * struct gh_vm_exit_info - Reason for VM exit as reported by Gunyah + * See Gunyah documentation for values. + * @type: Describes how VM exited + * @padding: padding bytes + * @reason_size: Number of bytes valid for `reason` + * @reason: See Gunyah documentation for interpretation. Note: these value= s are + * not interpreted by Linux and need to be converted from little-= endian + * as applicable. + */ +struct gh_vm_exit_info { + __u16 type; + __u16 padding; + __u32 reason_size; + __u8 reason[GH_VM_MAX_EXIT_REASON_SIZE]; +}; + +/** + * enum gh_vcpu_exit - Stores reason why &GH_VCPU_RUN ioctl recently exite= d with status 0 + * @GH_VCPU_EXIT_UNKNOWN: Not used, status !=3D 0 + * @GH_VCPU_EXIT_MMIO: vCPU performed a read or write that could not be ha= ndled + * by hypervisor or Linux. Use @struct gh_vcpu_run.mmi= o for + * details of the read/write. + * @GH_VCPU_EXIT_STATUS: vCPU not able to run because the VM has exited. + * Use @struct gh_vcpu_run.status for why VM has exi= ted. + */ +enum gh_vcpu_exit { + GH_VCPU_EXIT_UNKNOWN, + GH_VCPU_EXIT_MMIO, + GH_VCPU_EXIT_STATUS, +}; + +/** + * struct gh_vcpu_run - Application code obtains a pointer to the gh_vcpu_= run + * structure by mmap()ing a vcpu fd. + * @immediate_exit: polled when scheduling the vcpu. If set, immediately r= eturns -EINTR. + * @padding: padding bytes + * @exit_reason: Set when GH_VCPU_RUN returns successfully and gives reaso= n why + * GH_VCPU_RUN has stopped running the vCPU. See &enum gh_vc= pu_exit. + * @mmio: Used when exit_reason =3D=3D GH_VCPU_EXIT_MMIO + * The guest has faulted on an memory-mapped I/O instruction that + * couldn't be satisfied by gunyah. + * @mmio.phys_addr: Address guest tried to access + * @mmio.data: the value that was written if `is_write =3D=3D 1`. Filled by + * user for reads (`is_write =3D=3D 0`). + * @mmio.len: Length of write. Only the first `len` bytes of `data` + * are considered by Gunyah. + * @mmio.is_write: 1 if VM tried to perform a write, 0 for a read + * @status: Used when exit_reason =3D=3D GH_VCPU_EXIT_STATUS. + * The guest VM is no longer runnable. This struct informs why. + * @status.status: See &enum gh_vm_status for possible values + * @status.exit_info: Used when status =3D=3D GH_VM_STATUS_EXITED + */ +struct gh_vcpu_run { + /* in */ + __u8 immediate_exit; + __u8 padding[7]; + + /* out */ + __u32 exit_reason; + + union { + struct { + __u64 phys_addr; + __u8 data[8]; + __u32 len; + __u8 is_write; + } mmio; + + struct { + enum gh_vm_status status; + struct gh_vm_exit_info exit_info; + } status; + }; +}; + +#define GH_VCPU_RUN _IO(GH_IOCTL_TYPE, 0x5) +#define GH_VCPU_MMAP_SIZE _IO(GH_IOCTL_TYPE, 0x6) + +/** + * ANDROID: android14-6.1 unfortunately contains UAPI that won't be carried + * in kernel.org. Expose orthogonal ioctls that will never conflict with + * kernel.org for these UAPIs. See b/268234781. + */ +#define GH_ANDROID_IOCTL_TYPE 'A' + +#define GH_VM_ANDROID_LEND_USER_MEM _IOW(GH_ANDROID_IOCTL_TYPE, 0x11, \ + struct gh_userspace_memory_region) + +struct gh_vm_firmware_config { + __u64 guest_phys_addr; + __u64 size; +}; + +#define GH_VM_ANDROID_SET_FW_CONFIG _IOW(GH_ANDROID_IOCTL_TYPE, 0x12, \ + struct gh_vm_firmware_config) + +#endif --=20 2.25.1 From nobody Thu Sep 19 15:48:41 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=quicinc.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1715870126326434.78137218905135; Thu, 16 May 2024 07:35:26 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1s7cBw-0004Uz-Jr; Thu, 16 May 2024 10:34:44 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s7cBv-0004Ri-6i; Thu, 16 May 2024 10:34:43 -0400 Received: from mx0a-0031df01.pphosted.com ([205.220.168.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s7cBs-0008MK-LV; Thu, 16 May 2024 10:34:42 -0400 Received: from pps.filterd (m0279864.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 44GA2aa4024806; Thu, 16 May 2024 14:34:36 GMT Received: from nalasppmta05.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3y49gdwcr3-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 16 May 2024 14:34:36 +0000 (GMT) Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA05.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 44GEYHu9008003 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 16 May 2024 14:34:17 GMT Received: from blr-ubuntu-31.qualcomm.com (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Thu, 16 May 2024 07:34:13 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s= qcppdkim1; bh=kVnNmDeHGHBeNJsfxVy3AtaBExv17T9JYsx5Ioj/k08=; b=gR /OTnf3PaKbQ3zUk5m/8gASGV8I36JHi0ocUxErtSFmclKrVNLingfew/IIAmZ4tF Oz0WgsEj3vILCOJk6JKhy2bpoGGSKE3E76qCJDrzPIfwRWo4YpWSHgv59HPECOKJ M2R6JRlicbq4KyouXLwbsXGy1kgzPhp9uRdpIig6LmSDIEXJb+6uWC+plPl6bbqi mdHdkC04CoCkMNn5GYZuNzXp0bVK2ouzA2Tm3MDX10w9b+y0WETDhM72MvXvSnaq CtS4mok77Pbu11lFbT2eQYybffdzYd43WsW+GspS/4X2mTjc1t6bbK+WixC466br pA4Ya+FFh/VYTboOgecw== From: Srivatsa Vaddagiri To: , , , , CC: , , , , , , Subject: [RFC/PATCH v2 02/12] accel: Introduce check_capability() callback Date: Thu, 16 May 2024 14:33:46 +0000 Message-ID: <20240516143356.1739402-3-quic_svaddagi@quicinc.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240516143356.1739402-1-quic_svaddagi@quicinc.com> References: <20240516143356.1739402-1-quic_svaddagi@quicinc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: 6KpMbP1NS-hAfX0oO8Zimhsvkhk6O0g- X-Proofpoint-ORIG-GUID: 6KpMbP1NS-hAfX0oO8Zimhsvkhk6O0g- X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.650,FMLib:17.11.176.26 definitions=2024-05-16_07,2024-05-15_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=999 impostorscore=0 clxscore=1015 priorityscore=1501 phishscore=0 spamscore=0 mlxscore=0 lowpriorityscore=0 suspectscore=0 bulkscore=0 adultscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2405010000 definitions=main-2405160103 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=205.220.168.131; envelope-from=quic_svaddagi@quicinc.com; helo=mx0a-0031df01.pphosted.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1715870128078100001 Content-Type: text/plain; charset="utf-8" check_capability() offers a mechanism to discover accelerator capabilities. Two capabilities are introduced at this time to discover if confidential guest support exists and whether a confidential guest can share its private memory with host (using appropriate hypervisor APIs). Signed-off-by: Srivatsa Vaddagiri --- include/sysemu/accel-ops.h | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/include/sysemu/accel-ops.h b/include/sysemu/accel-ops.h index ef91fc28bb..f76d5bb8ed 100644 --- a/include/sysemu/accel-ops.h +++ b/include/sysemu/accel-ops.h @@ -20,6 +20,12 @@ typedef struct AccelOpsClass AccelOpsClass; DECLARE_CLASS_CHECKERS(AccelOpsClass, ACCEL_OPS, TYPE_ACCEL_OPS) =20 +typedef enum { + CONFIDENTIAL_GUEST_SUPPORTED, + /* A confidential guest can share its private memory with host at runt= ime */ + CONFIDENTIAL_GUEST_CAN_SHARE_MEM_WITH_HOST, +} AccelCap; + /* cpus.c operations interface */ struct AccelOpsClass { /*< private >*/ @@ -47,6 +53,8 @@ struct AccelOpsClass { int64_t (*get_virtual_clock)(void); int64_t (*get_elapsed_ticks)(void); =20 + bool (*check_capability)(AccelCap capability); + /* gdbstub hooks */ bool (*supports_guest_debug)(void); int (*update_guest_debug)(CPUState *cpu); --=20 2.25.1 From nobody Thu Sep 19 15:48:41 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=quicinc.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1715870187242870.9714491932151; Thu, 16 May 2024 07:36:27 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1s7cBi-00046q-Jv; Thu, 16 May 2024 10:34:30 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s7cBf-00046G-C6; Thu, 16 May 2024 10:34:27 -0400 Received: from mx0b-0031df01.pphosted.com ([205.220.180.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s7cBd-0008Kq-Cc; Thu, 16 May 2024 10:34:27 -0400 Received: from pps.filterd (m0279870.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 44G84bEm007625; Thu, 16 May 2024 14:34:23 GMT Received: from nalasppmta05.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3y47f45u9g-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 16 May 2024 14:34:22 +0000 (GMT) Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA05.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 44GEYLtt008043 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 16 May 2024 14:34:21 GMT Received: from blr-ubuntu-31.qualcomm.com (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Thu, 16 May 2024 07:34:17 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s= qcppdkim1; bh=xb+o7aiox7Eqi6vPUz31+ukR7Od9u/hMYAcNGZohteg=; b=Ok 7EHQOj8j5FqhBJbEgvWrsnidtaKipD/M6Ya3Ovhs8oO3mgU2yLsMtOBBbUgiF3/J Qw1kiX7ZA1MppX/O6g9P0yNXoqsL85NpKJN+DA4n/qkbbrsXi+4/Z8E2DC6h9VOX macKFxcXcf4pDW7IYBMkoluzRmDhQPPiov4elBbbVEg4xtG7/tDhereyeZBXdXA0 hdoFxTkLMZAUW5f+ZGCMoLxvlhx5tV9EXwCHwxK/rhDrgMrqqXQiX2KkzjNqIMXw a6BVXMsxMNle/pgcTmbhY/OKbpims+lHmE6Gg3pdwRbU7qog6p+lmjRuojCoeVQp IT1vj465x0J5VPf36FhA== From: Srivatsa Vaddagiri To: , , , , CC: , , , , , , Subject: [RFC/PATCH v2 03/12] hw/arm/virt: confidential guest support Date: Thu, 16 May 2024 14:33:47 +0000 Message-ID: <20240516143356.1739402-4-quic_svaddagi@quicinc.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240516143356.1739402-1-quic_svaddagi@quicinc.com> References: <20240516143356.1739402-1-quic_svaddagi@quicinc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: cJnmS3qYMEZihHKBwliraVmQE7G3-p65 X-Proofpoint-ORIG-GUID: cJnmS3qYMEZihHKBwliraVmQE7G3-p65 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.650,FMLib:17.11.176.26 definitions=2024-05-16_07,2024-05-15_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 phishscore=0 bulkscore=0 clxscore=1015 malwarescore=0 adultscore=0 lowpriorityscore=0 impostorscore=0 suspectscore=0 mlxlogscore=999 mlxscore=0 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2405010000 definitions=main-2405160102 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=205.220.180.131; envelope-from=quic_svaddagi@quicinc.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1715870188453100001 Content-Type: text/plain; charset="utf-8" This adds support to launch hypervisor-assisted confidential guests, where guest's memory is protected from a potentially untrusted host. Hypervisor can setup host's page-tables so that it loses access to guest memory. Since some guest drivers may need to communicate data with their host counterparts via shared memory, optionally allow setting aside some part of the confidential guest's memory as "shared". The size of this shared memory is specified via the optional "swiotlb-size" parameter. -machine virt,confidential-guest-support=3Dprot0 \ -object arm-confidential-guest,id=3Dprot0,swiotlb-size=3D16777216 The size of this shared memory is indicated to the guest in size/reg property of device-tree node "/reserved-memory/restricted_dma_reserved". A memory-region property is added to device-tree node representing virtio-pcie hub, so that all DMA allocations requested by guest's virtio-pc= ie device drivers are satisfied from the shared swiotlb region. Signed-off-by: Srivatsa Vaddagiri --- qapi/qom.json | 14 +++++ include/hw/arm/virt.h | 1 + hw/arm/virt.c | 141 +++++++++++++++++++++++++++++++++++++++++- 3 files changed, 155 insertions(+), 1 deletion(-) diff --git a/qapi/qom.json b/qapi/qom.json index 38dde6d785..9b3cd7ce22 100644 --- a/qapi/qom.json +++ b/qapi/qom.json @@ -874,6 +874,18 @@ 'base': 'RngProperties', 'data': { '*filename': 'str' } } =20 +## +# @ArmConfidentialGuestProperties: +# +# Properties for arm-confidential-guest objects. +# +# @swiotlb-size: swiotlb size +# +# Since: 2.12 +## +{ 'struct': 'ArmConfidentialGuestProperties', + 'data': { 'swiotlb-size' : 'uint64' } } + ## # @SevGuestProperties: # @@ -997,6 +1009,7 @@ { 'name': 'secret_keyring', 'if': 'CONFIG_SECRET_KEYRING' }, 'sev-guest', + 'arm-confidential-guest', 'thread-context', 's390-pv-guest', 'throttle-group', @@ -1067,6 +1080,7 @@ 'secret_keyring': { 'type': 'SecretKeyringProperties', 'if': 'CONFIG_SECRET_KEYRING' }, 'sev-guest': 'SevGuestProperties', + 'arm-confidential-guest': 'ArmConfidentialGuestProperties', 'thread-context': 'ThreadContextProperties', 'throttle-group': 'ThrottleGroupProperties', 'tls-creds-anon': 'TlsCredsAnonProperties', diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h index bb486d36b1..1e23f20972 100644 --- a/include/hw/arm/virt.h +++ b/include/hw/arm/virt.h @@ -165,6 +165,7 @@ struct VirtMachineState { uint32_t clock_phandle; uint32_t gic_phandle; uint32_t msi_phandle; + uint32_t restricted_dma_phandle; uint32_t iommu_phandle; int psci_conduit; hwaddr highest_gpa; diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 3c93c0c0a6..2a3eb4075d 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -84,6 +84,9 @@ #include "hw/virtio/virtio-iommu.h" #include "hw/char/pl011.h" #include "qemu/guest-random.h" +#include "sysemu/cpus.h" +#include "exec/confidential-guest-support.h" +#include "qom/object_interfaces.h" =20 static GlobalProperty arm_virt_compat[] =3D { { TYPE_VIRTIO_IOMMU_PCI, "aw-bits", "48" }, @@ -1545,6 +1548,11 @@ static void create_pcie(VirtMachineState *vms) nr_pcie_buses - 1); qemu_fdt_setprop(ms->fdt, nodename, "dma-coherent", NULL, 0); =20 + if (vms->restricted_dma_phandle) { + qemu_fdt_setprop_cell(ms->fdt, nodename, "memory-region", + vms->restricted_dma_phandle); + } + if (vms->msi_phandle) { qemu_fdt_setprop_cells(ms->fdt, nodename, "msi-map", 0, vms->msi_phandle, 0, 0x10000); @@ -2065,6 +2073,129 @@ static void virt_cpu_post_init(VirtMachineState *vm= s, MemoryRegion *sysmem) } } =20 +#define TYPE_ARM_CONFIDENTIAL_GUEST "arm-confidential-guest" +OBJECT_DECLARE_SIMPLE_TYPE(ArmConfidentialGuestState, ARM_CONFIDENTIAL_GUE= ST) + +struct ArmConfidentialGuestState { + ConfidentialGuestSupport parent_obj; + + hwaddr swiotlb_size; +}; + +static ArmConfidentialGuestState *acg; + +static void +arm_confidential_guest_instance_init(Object *obj) +{ + ArmConfidentialGuestState *acg =3D ARM_CONFIDENTIAL_GUEST(obj); + + object_property_add_uint64_ptr(obj, "swiotlb-size", &acg->swiotlb_size, + OBJ_PROP_FLAG_READWRITE); +} + +static const TypeInfo confidential_guest_info =3D { + .parent =3D TYPE_CONFIDENTIAL_GUEST_SUPPORT, + .name =3D TYPE_ARM_CONFIDENTIAL_GUEST, + .instance_size =3D sizeof(ArmConfidentialGuestState), + .instance_init =3D arm_confidential_guest_instance_init, + .interfaces =3D (InterfaceInfo[]) { + { TYPE_USER_CREATABLE }, + { } + } +}; + +static void +confidential_guest_register_types(void) +{ + type_register_static(&confidential_guest_info); +} +type_init(confidential_guest_register_types); + +static int confidential_guest_init(MachineState *ms) +{ + ConfidentialGuestSupport *cgs =3D ms->cgs; + ArmConfidentialGuestState *obj =3D (ArmConfidentialGuestState *) + object_dynamic_cast(OBJECT(cgs), TYPE_ARM_CONFIDENTIAL_GUEST); + const AccelOpsClass *ops =3D cpus_get_accel(); + + if (!obj) { + return 0; + } + + if (!ops->check_capability || + !ops->check_capability(CONFIDENTIAL_GUEST_SUPPORTED)) { + error_report("confidential guests are not supported"); + return -1; + } + + if (obj->swiotlb_size > ms->ram_size) { + error_report("swiotlb_size exceeds RAM size"); + return -1; + } + + acg =3D obj; + cgs->ready =3D true; + + return 0; +} + +static void fdt_add_reserved_memory(VirtMachineState *vms) +{ + MachineState *ms =3D MACHINE(vms); + hwaddr membase =3D vms->memmap[VIRT_MEM].base; + hwaddr memsize =3D ms->ram_size; + hwaddr resv_start; + const char compat[] =3D "restricted-dma-pool"; + const AccelOpsClass *ops =3D cpus_get_accel(); + char *nodename; + + if (!acg || !acg->swiotlb_size) { + return; + } + + nodename =3D g_strdup_printf("/reserved-memory"); + + qemu_fdt_add_subnode(ms->fdt, nodename); + qemu_fdt_setprop_cell(ms->fdt, nodename, "#address-cells", 2); + qemu_fdt_setprop_cell(ms->fdt, nodename, "#size-cells", 2); + qemu_fdt_setprop(ms->fdt, nodename, "ranges", NULL, 0); + g_free(nodename); + + resv_start =3D membase + memsize - acg->swiotlb_size; + if (ops->check_capability && + ops->check_capability(CONFIDENTIAL_GUEST_CAN_SHARE_MEM_WITH_HO= ST)) { + /* + * Indicate only the size of swiotlb buffer needed. Guest will + * determine where in its private memory the buffer will be placed= and + * will use appropriate (hypervisor) APIs to share that with host. + */ + nodename =3D g_strdup_printf("/reserved-memory/restricted_dma_rese= rved"); + qemu_fdt_add_subnode(ms->fdt, nodename); + qemu_fdt_setprop_cell(ms->fdt, nodename, "size", acg->swiotlb_size= ); + qemu_fdt_setprop_cell(ms->fdt, nodename, "alignment", 4096); + } else { + /* + * On hypervisors that don't support APIs for guest to share + * its (private) memory with host, indicate to the guest where in = its + * address space shared memory can be found. Host should make arra= ngents + * with hypervisor to assign some memory to guest at the indicated= range + * and mark it as shared. + */ + nodename =3D g_strdup_printf("/reserved-memory/restricted_dma_rese= rved@%" + PRIx64, resv_start); + qemu_fdt_add_subnode(ms->fdt, nodename); + qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg", + 2, resv_start, + 2, acg->swiotlb_size); + } + + vms->restricted_dma_phandle =3D qemu_fdt_alloc_phandle(ms->fdt); + qemu_fdt_setprop_cell(ms->fdt, nodename, "phandle", + vms->restricted_dma_phandle); + qemu_fdt_setprop(ms->fdt, nodename, "compatible", compat, sizeof(compa= t)); + g_free(nodename); +} + static void machvirt_init(MachineState *machine) { VirtMachineState *vms =3D VIRT_MACHINE(machine); @@ -2075,7 +2206,7 @@ static void machvirt_init(MachineState *machine) MemoryRegion *secure_sysmem =3D NULL; MemoryRegion *tag_sysmem =3D NULL; MemoryRegion *secure_tag_sysmem =3D NULL; - int n, virt_max_cpus; + int n, virt_max_cpus, ret; bool firmware_loaded; bool aarch64 =3D true; bool has_ged =3D !vmc->no_ged; @@ -2084,6 +2215,12 @@ static void machvirt_init(MachineState *machine) =20 possible_cpus =3D mc->possible_cpu_arch_ids(machine); =20 + ret =3D confidential_guest_init(machine); + if (ret !=3D 0) { + error_report("Failed to initialize confidential guest"); + exit(1); + } + /* * In accelerated mode, the memory map is computed earlier in kvm_type= () * to create a VM with the right number of IPA bits. @@ -2195,6 +2332,8 @@ static void machvirt_init(MachineState *machine) =20 create_fdt(vms); =20 + fdt_add_reserved_memory(vms); + assert(possible_cpus->len =3D=3D max_cpus); for (n =3D 0; n < possible_cpus->len; n++) { Object *cpuobj; --=20 2.25.1 From nobody Thu Sep 19 15:48:41 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=quicinc.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1715870224753887.222355176743; Thu, 16 May 2024 07:37:04 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1s7cBl-000483-IS; Thu, 16 May 2024 10:34:33 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s7cBk-00047b-2G; Thu, 16 May 2024 10:34:32 -0400 Received: from mx0b-0031df01.pphosted.com ([205.220.180.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s7cBh-0008LC-HB; Thu, 16 May 2024 10:34:31 -0400 Received: from pps.filterd (m0279872.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 44G8vQL8004205; Thu, 16 May 2024 14:34:27 GMT Received: from nalasppmta04.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3y2125m093-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 16 May 2024 14:34:27 +0000 (GMT) Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA04.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 44GEYQaN009353 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 16 May 2024 14:34:26 GMT Received: from blr-ubuntu-31.qualcomm.com (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Thu, 16 May 2024 07:34:21 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s= qcppdkim1; bh=3yqLx61ZnkmBsG3RyfUDJ14/YMf3ppRWmVy96fNexlI=; b=RA 5nuiV2XfsUpyBGQa1tDL0GeDn/8UGak6hDNJunksNLTCEz646tak7yeezAGWy9w/ c1F9FXf2f0BrzEg02aHBbW+l5A1EUMzc5GKmOI5GvagFfbGSrqGKZviaZ5SFIh/I n9shZOAnjVM4RiSn2wWG4yPDaOr+nxnRIHz5KTNcDncQyeLY1exrckjJOyAzlnJ0 3Nt8yR+kF6RJ6VftnsYmoDR9+UPruRrgvDk1tCOvYVvMCChjS9cZMG3S83CXjNwz OZdGxpOkpWnQbw7s8hX5ILTZxiw8NE7ZpEPKzio+QO0Pknvc6Gyj9bIqxuV4qO8U LBjUJ5Rta+jrpK7DtSSA== From: Srivatsa Vaddagiri To: , , , , CC: , , , , , , Subject: [RFC/PATCH v2 04/12] gunyah: Basic support Date: Thu, 16 May 2024 14:33:48 +0000 Message-ID: <20240516143356.1739402-5-quic_svaddagi@quicinc.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240516143356.1739402-1-quic_svaddagi@quicinc.com> References: <20240516143356.1739402-1-quic_svaddagi@quicinc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: aUMM39dkCCty9NeKcKoYxaD6J3vCXgKZ X-Proofpoint-ORIG-GUID: aUMM39dkCCty9NeKcKoYxaD6J3vCXgKZ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.650,FMLib:17.11.176.26 definitions=2024-05-16_07,2024-05-15_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 spamscore=0 lowpriorityscore=0 mlxlogscore=959 clxscore=1015 bulkscore=0 priorityscore=1501 impostorscore=0 phishscore=0 adultscore=0 suspectscore=0 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2405010000 definitions=main-2405160102 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=205.220.180.131; envelope-from=quic_svaddagi@quicinc.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1715870226821100003 Content-Type: text/plain; charset="utf-8" Add a new accelerator, gunyah, with basic functionality of creating a VM. Subsequent patches will add support for other functions required to run a VM. Signed-off-by: Srivatsa Vaddagiri --- MAINTAINERS | 7 ++ docs/about/build-platforms.rst | 2 +- meson.build | 12 +++- include/sysemu/gunyah.h | 30 ++++++++ include/sysemu/gunyah_int.h | 27 +++++++ accel/gunyah/gunyah-accel-ops.c | 121 ++++++++++++++++++++++++++++++++ accel/gunyah/gunyah-all.c | 70 ++++++++++++++++++ accel/stubs/gunyah-stub.c | 13 ++++ hw/arm/virt.c | 3 + target/arm/cpu.c | 3 +- target/arm/cpu64.c | 5 +- accel/Kconfig | 3 + accel/gunyah/meson.build | 7 ++ accel/meson.build | 1 + accel/stubs/meson.build | 1 + meson_options.txt | 2 + scripts/meson-buildoptions.sh | 3 + 17 files changed, 305 insertions(+), 5 deletions(-) create mode 100644 include/sysemu/gunyah.h create mode 100644 include/sysemu/gunyah_int.h create mode 100644 accel/gunyah/gunyah-accel-ops.c create mode 100644 accel/gunyah/gunyah-all.c create mode 100644 accel/stubs/gunyah-stub.c create mode 100644 accel/gunyah/meson.build diff --git a/MAINTAINERS b/MAINTAINERS index 84391777db..d8d63b1c3a 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -523,6 +523,13 @@ F: accel/hvf/ F: include/sysemu/hvf.h F: include/sysemu/hvf_int.h =20 +GUNYAH +M: Srivatsa Vaddagiri +S: Maintained +F: accel/gunyah +F: include/sysemu/gunyah.h +F: include/sysemu/gunyah_int.h + WHPX CPUs M: Sunil Muthuswamy S: Supported diff --git a/docs/about/build-platforms.rst b/docs/about/build-platforms.rst index 8fd7da140a..47e314d562 100644 --- a/docs/about/build-platforms.rst +++ b/docs/about/build-platforms.rst @@ -40,7 +40,7 @@ Those hosts are officially supported, with various accele= rators: * - CPU Architecture - Accelerators * - Arm - - kvm (64 bit only), tcg, xen + - kvm (64 bit only), tcg, xen, gunyah (64 bit only) * - MIPS (little endian only) - kvm, tcg * - PPC diff --git a/meson.build b/meson.build index 43da492372..25ce20b1e0 100644 --- a/meson.build +++ b/meson.build @@ -248,7 +248,8 @@ accelerator_targets +=3D { 'CONFIG_XEN': xen_targets } =20 if cpu in ['aarch64'] accelerator_targets +=3D { - 'CONFIG_HVF': ['aarch64-softmmu'] + 'CONFIG_HVF': ['aarch64-softmmu'], + 'CONFIG_GUNYAH': ['aarch64-softmmu'] } endif =20 @@ -736,6 +737,11 @@ if get_option('hvf').allowed() endif endif =20 +gunyah =3D not_found +if get_option('gunyah').allowed() and host_os =3D=3D 'linux' + accelerators +=3D 'CONFIG_GUNYAH' +endif + nvmm =3D not_found if host_os =3D=3D 'netbsd' nvmm =3D cc.find_library('nvmm', required: get_option('nvmm')) @@ -882,6 +888,9 @@ elif get_option('plugins') else gmodule =3D not_found endif +if 'CONFIG_GUNYAH' not in accelerators and get_option('gunyah').enabled() + error('Gunyah not available on this platform') +endif =20 # This workaround is required due to a bug in pkg-config file for glib as = it # doesn't define GLIB_STATIC_COMPILATION for pkg-config --static @@ -4270,6 +4279,7 @@ if have_system summary_info +=3D {'xen ctrl version': xen.version()} endif summary_info +=3D {'Xen emulation': config_all_devices.has_key('CONF= IG_XEN_EMU')} + summary_info +=3D {'Gunyah support': config_all_accel.has_key('CONFIG= _GUNYAH')} endif summary_info +=3D {'TCG support': config_all_accel.has_key('CONFIG_T= CG')} if config_all_accel.has_key('CONFIG_TCG') diff --git a/include/sysemu/gunyah.h b/include/sysemu/gunyah.h new file mode 100644 index 0000000000..4f26938521 --- /dev/null +++ b/include/sysemu/gunyah.h @@ -0,0 +1,30 @@ +/* + * QEMU Gunyah hypervisor support + * + * Copyright(c) 2023 Qualcomm Innovation Center, Inc. All Rights Reserved. + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +/* header to be included in non-Gunyah-specific code */ + +#ifndef QEMU_GUNYAH_H +#define QEMU_GUNYAH_H + +#include "qemu/accel.h" +#include "qom/object.h" + +#ifdef NEED_CPU_H +#include "cpu.h" +#endif + +extern bool gunyah_allowed; + +#define gunyah_enabled() (gunyah_allowed) + +#define TYPE_GUNYAH_ACCEL ACCEL_CLASS_NAME("gunyah") +typedef struct GUNYAHState GUNYAHState; +DECLARE_INSTANCE_CHECKER(GUNYAHState, GUNYAH_STATE, + TYPE_GUNYAH_ACCEL) + +#endif /* QEMU_GUNYAH_H */ diff --git a/include/sysemu/gunyah_int.h b/include/sysemu/gunyah_int.h new file mode 100644 index 0000000000..37de628b37 --- /dev/null +++ b/include/sysemu/gunyah_int.h @@ -0,0 +1,27 @@ +/* + * QEMU Gunyah hypervisor support + * + * Copyright(c) 2023 Qualcomm Innovation Center, Inc. All Rights Reserved. + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +/* header to be included in Gunyah-specific code */ + +#ifndef GUNYAH_INT_H +#define GUNYAH_INT_H + +#include "qemu/accel.h" +#include "qemu/typedefs.h" + +struct GUNYAHState { + AccelState parent_obj; + + int fd; + int vmfd; +}; + +int gunyah_create_vm(void); +void *gunyah_cpu_thread_fn(void *arg); + +#endif /* GUNYAH_INT_H */ diff --git a/accel/gunyah/gunyah-accel-ops.c b/accel/gunyah/gunyah-accel-op= s.c new file mode 100644 index 0000000000..af8a4ad606 --- /dev/null +++ b/accel/gunyah/gunyah-accel-ops.c @@ -0,0 +1,121 @@ +/* + * QEMU Gunyah hypervisor support + * + * (based on KVM accelerator code structure) + * + * Copyright 2008 IBM Corporation + * 2008 Red Hat, Inc. + * + * Copyright(c) 2023 Qualcomm Innovation Center, Inc. All Rights Reserved. + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include "qemu/osdep.h" +#include "qemu/thread.h" +#include "hw/boards.h" +#include "hw/core/cpu.h" +#include "sysemu/accel-ops.h" +#include "sysemu/cpus.h" +#include "sysemu/gunyah.h" +#include "sysemu/gunyah_int.h" +#include "qapi/visitor.h" +#include "qapi/error.h" + +bool gunyah_allowed; + +static int gunyah_init(MachineState *ms) +{ + return gunyah_create_vm(); +} + +static void gunyah_accel_instance_init(Object *obj) +{ + GUNYAHState *s =3D GUNYAH_STATE(obj); + + s->fd =3D -1; + s->vmfd =3D -1; +} + +static void gunyah_accel_class_init(ObjectClass *oc, void *data) +{ + AccelClass *ac =3D ACCEL_CLASS(oc); + + ac->name =3D "GUNYAH"; + ac->init_machine =3D gunyah_init; + ac->allowed =3D &gunyah_allowed; +} + +static const TypeInfo gunyah_accel_type =3D { + .name =3D TYPE_GUNYAH_ACCEL, + .parent =3D TYPE_ACCEL, + .instance_init =3D gunyah_accel_instance_init, + .class_init =3D gunyah_accel_class_init, + .instance_size =3D sizeof(GUNYAHState), +}; + +static void gunyah_type_init(void) +{ + type_register_static(&gunyah_accel_type); +} +type_init(gunyah_type_init); + +static void gunyah_start_vcpu_thread(CPUState *cpu) +{ + char thread_name[VCPU_THREAD_NAME_SIZE]; + + cpu->thread =3D g_malloc0(sizeof(QemuThread)); + cpu->halt_cond =3D g_malloc0(sizeof(QemuCond)); + qemu_cond_init(cpu->halt_cond); + + snprintf(thread_name, VCPU_THREAD_NAME_SIZE, "CPU %d/Gunyah", + cpu->cpu_index); + qemu_thread_create(cpu->thread, thread_name, gunyah_cpu_thread_fn, + cpu, QEMU_THREAD_JOINABLE); +} + +static void gunyah_kick_vcpu_thread(CPUState *cpu) +{ + cpus_kick_thread(cpu); +} + +static bool gunyah_vcpu_thread_is_idle(CPUState *cpu) +{ + return false; +} + +static bool gunyah_check_capability(AccelCap cap) +{ + switch (cap) { + case CONFIDENTIAL_GUEST_SUPPORTED: + return true; + case CONFIDENTIAL_GUEST_CAN_SHARE_MEM_WITH_HOST: + /* fall-through */ + default: + return false; + } +} + +static void gunyah_accel_ops_class_init(ObjectClass *oc, void *data) +{ + AccelOpsClass *ops =3D ACCEL_OPS_CLASS(oc); + + ops->create_vcpu_thread =3D gunyah_start_vcpu_thread; + ops->kick_vcpu_thread =3D gunyah_kick_vcpu_thread; + ops->cpu_thread_is_idle =3D gunyah_vcpu_thread_is_idle; + ops->check_capability =3D gunyah_check_capability; +}; + +static const TypeInfo gunyah_accel_ops_type =3D { + .name =3D ACCEL_OPS_NAME("gunyah"), + .parent =3D TYPE_ACCEL_OPS, + .class_init =3D gunyah_accel_ops_class_init, + .abstract =3D true, +}; + +static void gunyah_accel_ops_register_types(void) +{ + type_register_static(&gunyah_accel_ops_type); +} + +type_init(gunyah_accel_ops_register_types); diff --git a/accel/gunyah/gunyah-all.c b/accel/gunyah/gunyah-all.c new file mode 100644 index 0000000000..370add75f9 --- /dev/null +++ b/accel/gunyah/gunyah-all.c @@ -0,0 +1,70 @@ +/* + * QEMU Gunyah hypervisor support + * + * (based on KVM accelerator code structure) + * + * Copyright 2008 IBM Corporation + * 2008 Red Hat, Inc. + * + * Copyright(c) 2023 Qualcomm Innovation Center, Inc. All Rights Reserved. + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include +#include "qemu/osdep.h" +#include "qemu/typedefs.h" +#include "hw/core/cpu.h" +#include "sysemu/cpus.h" +#include "sysemu/gunyah.h" +#include "sysemu/gunyah_int.h" +#include "linux-headers/linux/gunyah.h" +#include "qemu/error-report.h" + +static int gunyah_ioctl(int type, ...) +{ + void *arg; + va_list ap; + GUNYAHState *s =3D GUNYAH_STATE(current_accel()); + + assert(s->fd); + + va_start(ap, type); + arg =3D va_arg(ap, void *); + va_end(ap); + + return ioctl(s->fd, type, arg); +} + +int gunyah_create_vm(void) +{ + GUNYAHState *s; + + s =3D GUNYAH_STATE(current_accel()); + + s->fd =3D qemu_open_old("/dev/gunyah", O_RDWR); + if (s->fd =3D=3D -1) { + error_report("Could not access Gunyah kernel module at /dev/gunyah= : %s", + strerror(errno)); + exit(1); + } + + s->vmfd =3D gunyah_ioctl(GH_CREATE_VM, 0); + if (s->vmfd < 0) { + error_report("Could not create VM: %s", strerror(errno)); + exit(1); + } + + return 0; +} + +void *gunyah_cpu_thread_fn(void *arg) +{ + CPUState *cpu =3D arg; + + do { + /* Do nothing */ + } while (!cpu->unplug || cpu_can_run(cpu)); + + return NULL; +} diff --git a/accel/stubs/gunyah-stub.c b/accel/stubs/gunyah-stub.c new file mode 100644 index 0000000000..1edbe1433e --- /dev/null +++ b/accel/stubs/gunyah-stub.c @@ -0,0 +1,13 @@ +/* + * QEMU Gunyah stub + * + * Copyright(c) 2023 Qualcomm Innovation Center, Inc. All Rights Reserved. + * + * SPDX-License-Identifier: GPL-2.0-or-later + * + */ + +#include "qemu/osdep.h" +#include "sysemu/gunyah.h" + +bool gunyah_allowed; diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 2a3eb4075d..fee1e5dab5 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -87,6 +87,7 @@ #include "sysemu/cpus.h" #include "exec/confidential-guest-support.h" #include "qom/object_interfaces.h" +#include "sysemu/gunyah.h" =20 static GlobalProperty arm_virt_compat[] =3D { { TYPE_VIRTIO_IOMMU_PCI, "aw-bits", "48" }, @@ -1682,6 +1683,8 @@ static void virt_build_smbios(VirtMachineState *vms) =20 if (kvm_enabled()) { product =3D "KVM Virtual Machine"; + } else if (gunyah_enabled()) { + product =3D "Gunyah Virtual Machine"; } =20 smbios_set_defaults("QEMU", product, diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 77f8c9c748..ea22b7d25f 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -44,6 +44,7 @@ #include "sysemu/tcg.h" #include "sysemu/qtest.h" #include "sysemu/hw_accel.h" +#include "sysemu/gunyah.h" #include "kvm_arm.h" #include "disas/capstone.h" #include "fpu/softfloat.h" @@ -1500,7 +1501,7 @@ static void arm_cpu_initfn(Object *obj) cpu->psci_version =3D QEMU_PSCI_VERSION_0_1; /* By default assume PSCI= v0.1 */ cpu->kvm_target =3D QEMU_KVM_ARM_TARGET_NONE; =20 - if (tcg_enabled() || hvf_enabled()) { + if (tcg_enabled() || hvf_enabled() || gunyah_enabled()) { /* TCG and HVF implement PSCI 1.1 */ cpu->psci_version =3D QEMU_PSCI_VERSION_1_1; } diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index c15d086049..e6ac00d12e 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -34,6 +34,7 @@ #include "internals.h" #include "cpu-features.h" #include "cpregs.h" +#include "sysemu/gunyah.h" =20 void arm_cpu_sve_finalize(ARMCPU *cpu, Error **errp) { @@ -727,7 +728,7 @@ static void aarch64_host_initfn(Object *obj) =20 static void aarch64_max_initfn(Object *obj) { - if (kvm_enabled() || hvf_enabled()) { + if (kvm_enabled() || hvf_enabled() || gunyah_enabled()) { /* With KVM or HVF, '-cpu max' is identical to '-cpu host' */ aarch64_host_initfn(obj); return; @@ -747,7 +748,7 @@ static const ARMCPUInfo aarch64_cpus[] =3D { { .name =3D "cortex-a57", .initfn =3D aarch64_a57_initfn }, { .name =3D "cortex-a53", .initfn =3D aarch64_a53_initfn }, { .name =3D "max", .initfn =3D aarch64_max_initfn }, -#if defined(CONFIG_KVM) || defined(CONFIG_HVF) +#if defined(CONFIG_KVM) || defined(CONFIG_HVF) || defined(CONFIG_GUNYAH) { .name =3D "host", .initfn =3D aarch64_host_initfn }, #endif }; diff --git a/accel/Kconfig b/accel/Kconfig index 794e0d18d2..020dda9737 100644 --- a/accel/Kconfig +++ b/accel/Kconfig @@ -17,3 +17,6 @@ config XEN bool select FSDEV_9P if VIRTFS select XEN_BUS + +config GUNYAH + bool diff --git a/accel/gunyah/meson.build b/accel/gunyah/meson.build new file mode 100644 index 0000000000..226eea0f2c --- /dev/null +++ b/accel/gunyah/meson.build @@ -0,0 +1,7 @@ +gunyah_ss =3D ss.source_set() +gunyah_ss.add(files( + 'gunyah-all.c', + 'gunyah-accel-ops.c', +)) + +specific_ss.add_all(when: 'CONFIG_GUNYAH', if_true: gunyah_ss) diff --git a/accel/meson.build b/accel/meson.build index 5eaeb68338..970bad6c5a 100644 --- a/accel/meson.build +++ b/accel/meson.build @@ -9,6 +9,7 @@ if have_system subdir('kvm') subdir('xen') subdir('stubs') + subdir('gunyah') endif =20 # qtest diff --git a/accel/stubs/meson.build b/accel/stubs/meson.build index 91a2d21925..459a8acd5c 100644 --- a/accel/stubs/meson.build +++ b/accel/stubs/meson.build @@ -2,5 +2,6 @@ system_stubs_ss =3D ss.source_set() system_stubs_ss.add(when: 'CONFIG_XEN', if_false: files('xen-stub.c')) system_stubs_ss.add(when: 'CONFIG_KVM', if_false: files('kvm-stub.c')) system_stubs_ss.add(when: 'CONFIG_TCG', if_false: files('tcg-stub.c')) +system_stubs_ss.add(when: 'CONFIG_GUNYAH', if_false: files('gunyah-stub.c'= )) =20 specific_ss.add_all(when: ['CONFIG_SYSTEM_ONLY'], if_true: system_stubs_ss) diff --git a/meson_options.txt b/meson_options.txt index adc77bae0c..61c49bb7d4 100644 --- a/meson_options.txt +++ b/meson_options.txt @@ -111,6 +111,8 @@ option('dbus_display', type: 'feature', value: 'auto', description: '-display dbus support') option('tpm', type : 'feature', value : 'auto', description: 'TPM support') +option('gunyah', type: 'feature', value: 'auto', + description: 'Gunyah acceleration support') =20 # Do not enable it by default even for Mingw32, because it doesn't # work on Wine. diff --git a/scripts/meson-buildoptions.sh b/scripts/meson-buildoptions.sh index 0a29d35fdb..d3a75f05c7 100644 --- a/scripts/meson-buildoptions.sh +++ b/scripts/meson-buildoptions.sh @@ -126,6 +126,7 @@ meson_options_help() { printf "%s\n" ' guest-agent-msi Build MSI package for the QEMU Guest Ag= ent' printf "%s\n" ' hv-balloon hv-balloon driver (requires Glib 2.68+ = GTree API)' printf "%s\n" ' hvf HVF acceleration support' + printf "%s\n" ' gunyah Gunyah acceleration support' printf "%s\n" ' iconv Font glyph conversion support' printf "%s\n" ' jack JACK sound support' printf "%s\n" ' keyring Linux keyring support' @@ -335,6 +336,8 @@ _meson_option_parse() { --disable-guest-agent) printf "%s" -Dguest_agent=3Ddisabled ;; --enable-guest-agent-msi) printf "%s" -Dguest_agent_msi=3Denabled ;; --disable-guest-agent-msi) printf "%s" -Dguest_agent_msi=3Ddisabled ;; + --enable-gunyah) printf "%s" -Dgunyah=3Denabled ;; + --disable-gunyah) printf "%s" -Dgunyah=3Ddisabled ;; --enable-hexagon-idef-parser) printf "%s" -Dhexagon_idef_parser=3Dtrue= ;; --disable-hexagon-idef-parser) printf "%s" -Dhexagon_idef_parser=3Dfal= se ;; --enable-hv-balloon) printf "%s" -Dhv_balloon=3Denabled ;; --=20 2.25.1 From nobody Thu Sep 19 15:48:41 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=quicinc.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1715870109590265.8329366108146; Thu, 16 May 2024 07:35:09 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1s7cBq-0004LR-7A; Thu, 16 May 2024 10:34:38 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s7cBo-0004Hm-H9; Thu, 16 May 2024 10:34:36 -0400 Received: from mx0b-0031df01.pphosted.com ([205.220.180.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s7cBm-0008Lg-6V; Thu, 16 May 2024 10:34:36 -0400 Received: from pps.filterd (m0279869.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 44G90TmO021394; Thu, 16 May 2024 14:34:32 GMT Received: from nalasppmta04.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3y45vbe0m7-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 16 May 2024 14:34:31 +0000 (GMT) Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA04.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 44GEYUOu009410 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 16 May 2024 14:34:30 GMT Received: from blr-ubuntu-31.qualcomm.com (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Thu, 16 May 2024 07:34:26 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s= qcppdkim1; bh=uviPvqv+rWB/nK74mpoQ0WrfHmUlUXN1Ahud51wS5LM=; b=hg erd8PUY4HaIiydQXb0lxiS1fOGzr39CSRGNYdiQNUEd4/8a8L9u94CMjZIKBF1LA z7HLcp2MXT6EXWDu8PuViNeAAJF/v3DxWqEIuenGj5XszwDQfk8Fn/VQd3o6os2c RcEjlTBLPRLK7R40ytkHIKIBPqY93J3glscRVREIuVgZL6ACIC47JJKc1IywnHlD fiINS8wa1dHkA1IhJikk6jgl5F8Dt+BXRhnJlrRGqMLnPl0N7o2OKebrdxQj3IdW 8q39zjb6B4ZYLeYFhzSt9YOewqg9npIPutoXogiEXmRCP2nUxpl0IPRBJDuCDmaL 7dvg9h1G5pr4Q0T0QHrw== From: Srivatsa Vaddagiri To: , , , , CC: , , , , , , Subject: [RFC/PATCH v2 05/12] gunyah: Support memory assignment Date: Thu, 16 May 2024 14:33:49 +0000 Message-ID: <20240516143356.1739402-6-quic_svaddagi@quicinc.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240516143356.1739402-1-quic_svaddagi@quicinc.com> References: <20240516143356.1739402-1-quic_svaddagi@quicinc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: ajEhrCXIBNJsATtWQxdTRaBftMk6MxaV X-Proofpoint-ORIG-GUID: ajEhrCXIBNJsATtWQxdTRaBftMk6MxaV X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.650,FMLib:17.11.176.26 definitions=2024-05-16_07,2024-05-15_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 clxscore=1015 mlxscore=0 suspectscore=0 spamscore=0 malwarescore=0 adultscore=0 mlxlogscore=999 phishscore=0 priorityscore=1501 bulkscore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2405010000 definitions=main-2405160101 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=205.220.180.131; envelope-from=quic_svaddagi@quicinc.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1715870110321100001 Content-Type: text/plain; charset="utf-8" Gunyah hypervisor supports several APIs for a host VM to assign some of its memory to the VM being created. Lend - assigned memory is made private to VM (host loses access) Share - assigned memory is shared between host and guest VM No APIs exist however, at this time, for a confidential VM to share some of its (private) memory with host at runtime. Since, in practice, even a confidential VM may need some shared memory to exchange information with its host, we split VM's memory into two portions - one that is kept private (via Lend API) and other that is shared with host (via Share API). Note: Gunyah kernel driver from Android common kernel repository exposes two separate ioctls for lend and share operations [1]. A subsequent version of kernel driver that will be merged in Linux kernel repository will combine the two ioctls into one, when this patch will be updated. 1. Refer GH_VM_ANDROID_LEND_USER_MEM and GH_VM_SET_USER_MEM_REGION in https://android.googlesource.com/kernel/common/+/refs/heads/android14-6.1/d= rivers/virt/gunyah/vm_mgr.c Signed-off-by: Srivatsa Vaddagiri --- include/sysemu/gunyah.h | 2 + include/sysemu/gunyah_int.h | 26 ++++ accel/gunyah/gunyah-all.c | 261 ++++++++++++++++++++++++++++++++++++ accel/stubs/gunyah-stub.c | 5 + hw/arm/virt.c | 4 + 5 files changed, 298 insertions(+) diff --git a/include/sysemu/gunyah.h b/include/sysemu/gunyah.h index 4f26938521..78cb80f01e 100644 --- a/include/sysemu/gunyah.h +++ b/include/sysemu/gunyah.h @@ -20,6 +20,8 @@ =20 extern bool gunyah_allowed; =20 +void gunyah_set_swiotlb_size(uint64_t size); + #define gunyah_enabled() (gunyah_allowed) =20 #define TYPE_GUNYAH_ACCEL ACCEL_CLASS_NAME("gunyah") diff --git a/include/sysemu/gunyah_int.h b/include/sysemu/gunyah_int.h index 37de628b37..0967b2d7d7 100644 --- a/include/sysemu/gunyah_int.h +++ b/include/sysemu/gunyah_int.h @@ -13,15 +13,41 @@ =20 #include "qemu/accel.h" #include "qemu/typedefs.h" +#include "qemu/thread.h" + +typedef struct gunyah_slot { + uint64_t start; + uint64_t size; + uint8_t *mem; + uint32_t id; + uint32_t flags; + + /* + * @lend indicates if memory was lent. + * + * This flag is temporarily used until the upstream Gunyah kernel driv= er + * patches are updated to support indication of lend vs share via flags + * field of GH_SET_USER_MEM_API interface. + */ + bool lend; +} gunyah_slot; + +#define GUNYAH_MAX_MEM_SLOTS 32 =20 struct GUNYAHState { AccelState parent_obj; =20 + QemuMutex slots_lock; + gunyah_slot slots[GUNYAH_MAX_MEM_SLOTS]; + uint32_t nr_slots; int fd; int vmfd; + uint64_t swiotlb_size; + bool preshmem_reserved; }; =20 int gunyah_create_vm(void); +int gunyah_vm_ioctl(int type, ...); void *gunyah_cpu_thread_fn(void *arg); =20 #endif /* GUNYAH_INT_H */ diff --git a/accel/gunyah/gunyah-all.c b/accel/gunyah/gunyah-all.c index 370add75f9..19f96225a0 100644 --- a/accel/gunyah/gunyah-all.c +++ b/accel/gunyah/gunyah-all.c @@ -14,12 +14,21 @@ #include #include "qemu/osdep.h" #include "qemu/typedefs.h" +#include "qemu/units.h" #include "hw/core/cpu.h" #include "sysemu/cpus.h" #include "sysemu/gunyah.h" #include "sysemu/gunyah_int.h" #include "linux-headers/linux/gunyah.h" +#include "exec/memory.h" #include "qemu/error-report.h" +#include "exec/address-spaces.h" +#include "hw/boards.h" + +static void gunyah_region_add(MemoryListener *listener, + MemoryRegionSection *section); +static void gunyah_region_del(MemoryListener *listener, + MemoryRegionSection *section); =20 static int gunyah_ioctl(int type, ...) { @@ -36,9 +45,32 @@ static int gunyah_ioctl(int type, ...) return ioctl(s->fd, type, arg); } =20 +int gunyah_vm_ioctl(int type, ...) +{ + void *arg; + va_list ap; + GUNYAHState *s =3D GUNYAH_STATE(current_accel()); + + assert(s->vmfd); + + va_start(ap, type); + arg =3D va_arg(ap, void *); + va_end(ap); + + return ioctl(s->vmfd, type, arg); +} + +static MemoryListener gunyah_memory_listener =3D { + .name =3D "gunyah", + .priority =3D MEMORY_LISTENER_PRIORITY_ACCEL, + .region_add =3D gunyah_region_add, + .region_del =3D gunyah_region_del, +}; + int gunyah_create_vm(void) { GUNYAHState *s; + int i; =20 s =3D GUNYAH_STATE(current_accel()); =20 @@ -55,9 +87,238 @@ int gunyah_create_vm(void) exit(1); } =20 + qemu_mutex_init(&s->slots_lock); + s->nr_slots =3D GUNYAH_MAX_MEM_SLOTS; + for (i =3D 0; i < s->nr_slots; ++i) { + s->slots[i].start =3D 0; + s->slots[i].size =3D 0; + s->slots[i].id =3D i; + } + + memory_listener_register(&gunyah_memory_listener, &address_space_memor= y); return 0; } =20 +#define gunyah_slots_lock(s) qemu_mutex_lock(&s->slots_lock) +#define gunyah_slots_unlock(s) qemu_mutex_unlock(&s->slots_lock) + +static gunyah_slot *gunyah_find_overlap_slot(GUNYAHState *s, + uint64_t start, uint64_t size) +{ + gunyah_slot *slot; + int i; + + for (i =3D 0; i < s->nr_slots; ++i) { + slot =3D &s->slots[i]; + if (slot->size && start < (slot->start + slot->size) && + (start + size) > slot->start) { + return slot; + } + } + + return NULL; +} + +/* Called with s->slots_lock held */ +static gunyah_slot *gunyah_get_free_slot(GUNYAHState *s) +{ + int i; + + for (i =3D 0; i < s->nr_slots; i++) { + if (s->slots[i].size =3D=3D 0) { + return &s->slots[i]; + } + } + + return NULL; +} + +static void gunyah_add_mem(GUNYAHState *s, MemoryRegionSection *section, + bool lend, enum gh_mem_flags flags) +{ + gunyah_slot *slot; + MemoryRegion *area =3D section->mr; + struct gh_userspace_memory_region gumr; + int ret; + + slot =3D gunyah_get_free_slot(s); + if (!slot) { + error_report("No free slots to add memory!"); + exit(1); + } + + slot->size =3D int128_get64(section->size); + slot->mem =3D memory_region_get_ram_ptr(area) + section->offset_within= _region; + slot->start =3D section->offset_within_address_space; + slot->lend =3D lend; + + gumr.label =3D slot->id; + gumr.flags =3D flags; + gumr.guest_phys_addr =3D slot->start; + gumr.memory_size =3D slot->size; + gumr.userspace_addr =3D (__u64) slot->mem; + + /* + * GH_VM_ANDROID_LEND_USER_MEM is temporary, until + * GH_VM_SET_USER_MEM_REGION is enhanced to support lend option also. + */ + if (lend) { + ret =3D gunyah_vm_ioctl(GH_VM_ANDROID_LEND_USER_MEM, &gumr); + } else { + ret =3D gunyah_vm_ioctl(GH_VM_SET_USER_MEM_REGION, &gumr); + } + + if (ret) { + error_report("failed to add mem (%s)", strerror(errno)); + exit(1); + } +} + +static bool is_confidential_guest(void) +{ + return current_machine->cgs !=3D NULL; +} + +/* + * Check if memory of a confidential VM needs to be split into two portion= s - + * one private to it and other shared with host. + */ +static bool split_mem(GUNYAHState *s, + MemoryRegion *area, MemoryRegionSection *section) +{ + bool writeable =3D !area->readonly && !area->rom_device; + + if (!is_confidential_guest()) { + return false; + } + + if (!s->swiotlb_size || section->size <=3D s->swiotlb_size) { + return false; + } + + /* Split only memory that can be written to by guest */ + if (!memory_region_is_ram(area) || !writeable) { + return false; + } + + /* Have we reserved already? */ + if (qatomic_read(&s->preshmem_reserved)) { + return false; + } + + /* Do we have enough available memory? */ + if (section->size <=3D s->swiotlb_size) { + return false; + } + + return true; +} + +static void gunyah_set_phys_mem(GUNYAHState *s, + MemoryRegionSection *section, bool add) +{ + MemoryRegion *area =3D section->mr; + bool writable =3D !area->readonly && !area->rom_device; + enum gh_mem_flags flags =3D 0; + uint64_t page_size =3D qemu_real_host_page_size(); + MemoryRegionSection mrs =3D *section; + bool lend =3D is_confidential_guest(), split =3D false; + struct gunyah_slot *slot; + + /* + * Gunyah hypervisor, at this time, does not support mapping memory + * at low address (< 1GiB). Below code will be updated once + * that limitation is addressed. + */ + if (section->offset_within_address_space < GiB) { + return; + } + + if (!memory_region_is_ram(area)) { + if (writable) { + return; + } else if (!memory_region_is_romd(area)) { + /* + * If the memory device is not in romd_mode, then we actually = want + * to remove the gunyah memory slot so all accesses will trap. + */ + add =3D false; + } + } + + if (!QEMU_IS_ALIGNED(int128_get64(section->size), page_size) || + !QEMU_IS_ALIGNED(section->offset_within_address_space, page_size))= { + error_report("Not page aligned"); + add =3D false; + } + + gunyah_slots_lock(s); + + slot =3D gunyah_find_overlap_slot(s, + section->offset_within_address_space, + int128_get64(section->size)); + + if (!add) { + if (slot) { + error_report("Memory slot removal not yet supported!"); + exit(1); + } + /* Nothing to be done as address range was not previously register= ed */ + goto done; + } else { + if (slot) { + error_report("Overlapping slot registration not supported!"); + exit(1); + } + } + + if (area->readonly || + (!memory_region_is_ram(area) && memory_region_is_romd(area))) { + flags =3D GH_MEM_ALLOW_READ | GH_MEM_ALLOW_EXEC; + } else { + flags =3D GH_MEM_ALLOW_READ | GH_MEM_ALLOW_WRITE | GH_MEM_ALLOW_EX= EC; + } + + split =3D split_mem(s, area, &mrs); + if (split) { + mrs.size -=3D s->swiotlb_size; + gunyah_add_mem(s, &mrs, true, flags); + lend =3D false; + mrs.offset_within_region +=3D mrs.size; + mrs.offset_within_address_space +=3D mrs.size; + mrs.size =3D s->swiotlb_size; + qatomic_set(&s->preshmem_reserved, true); + } + + gunyah_add_mem(s, &mrs, lend, flags); + +done: + gunyah_slots_unlock(s); +} + +static void gunyah_region_add(MemoryListener *listener, + MemoryRegionSection *section) +{ + GUNYAHState *s =3D GUNYAH_STATE(current_accel()); + + gunyah_set_phys_mem(s, section, true); +} + +static void gunyah_region_del(MemoryListener *listener, + MemoryRegionSection *section) +{ + GUNYAHState *s =3D GUNYAH_STATE(current_accel()); + + gunyah_set_phys_mem(s, section, false); +} + +void gunyah_set_swiotlb_size(uint64_t size) +{ + GUNYAHState *s =3D GUNYAH_STATE(current_accel()); + + s->swiotlb_size =3D size; +} + void *gunyah_cpu_thread_fn(void *arg) { CPUState *cpu =3D arg; diff --git a/accel/stubs/gunyah-stub.c b/accel/stubs/gunyah-stub.c index 1edbe1433e..2028fa04c7 100644 --- a/accel/stubs/gunyah-stub.c +++ b/accel/stubs/gunyah-stub.c @@ -11,3 +11,8 @@ #include "sysemu/gunyah.h" =20 bool gunyah_allowed; + +void gunyah_set_swiotlb_size(uint64_t size) +{ + return; +} diff --git a/hw/arm/virt.c b/hw/arm/virt.c index fee1e5dab5..3b0fcf812f 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -2136,6 +2136,10 @@ static int confidential_guest_init(MachineState *ms) return -1; } =20 + if (gunyah_enabled()) { + gunyah_set_swiotlb_size(obj->swiotlb_size); + } + acg =3D obj; cgs->ready =3D true; =20 --=20 2.25.1 From nobody Thu Sep 19 15:48:41 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=quicinc.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1715870242117480.9910486883441; Thu, 16 May 2024 07:37:22 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1s7cBv-0004Rm-Dd; Thu, 16 May 2024 10:34:43 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s7cBt-0004Ps-Ed; Thu, 16 May 2024 10:34:41 -0400 Received: from mx0b-0031df01.pphosted.com ([205.220.180.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s7cBr-0008MD-N2; Thu, 16 May 2024 10:34:41 -0400 Received: from pps.filterd (m0279873.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 44G8Fqd0026431; Thu, 16 May 2024 14:34:36 GMT Received: from nalasppmta01.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3y47egdujp-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 16 May 2024 14:34:36 +0000 (GMT) Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 44GEYZnq026569 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 16 May 2024 14:34:35 GMT Received: from blr-ubuntu-31.qualcomm.com (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Thu, 16 May 2024 07:34:30 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s= qcppdkim1; bh=PMVuOr04+dYDbP1VfZJzxP7tsWrGMntkYUPSIF7wQrU=; b=c5 UmojGpSdqC+5TA79TEtZ14DMkGM+90um0tBpQu+07dnRcyy3EYL0r+qs/5YnULAy i6ZI4jMa1+2KEO6B/C22Fz/ZlEJ6T+wz170Vc9DlkyBSZ3M+klzyVoXewCyrj6Ic GrW7pFhIpo262gnqLAlU+9ciBqoDZAwlCA06Hm1ttxLjaTfhz2zLmhMGRxu5jwb0 2f0WKnwfMcdahB5dojxTSzIMADVIS24qsvcAUViyHPUC0Xi5kQCeqTYUkNF+8ohO t0K7WauZMYU9CVPJYHWp9/KhomluuXRkxT1/zSrfW5ROW1kXg/NAiuZK+6Q+fuZM BnLF3Lppb/cE4gdAXaaA== From: Srivatsa Vaddagiri To: , , , , CC: , , , , , , Subject: [RFC/PATCH v2 06/12] gunyah: Add IRQFD and IOEVENTFD functions Date: Thu, 16 May 2024 14:33:50 +0000 Message-ID: <20240516143356.1739402-7-quic_svaddagi@quicinc.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240516143356.1739402-1-quic_svaddagi@quicinc.com> References: <20240516143356.1739402-1-quic_svaddagi@quicinc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: zZbDnPbSs5Tg4bm_hAhW_kE7qEPVyG4w X-Proofpoint-ORIG-GUID: zZbDnPbSs5Tg4bm_hAhW_kE7qEPVyG4w X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.650,FMLib:17.11.176.26 definitions=2024-05-16_07,2024-05-15_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 adultscore=0 malwarescore=0 phishscore=0 spamscore=0 mlxlogscore=999 lowpriorityscore=0 clxscore=1015 impostorscore=0 suspectscore=0 priorityscore=1501 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2405010000 definitions=main-2405160102 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=205.220.180.131; envelope-from=quic_svaddagi@quicinc.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1715870242788100013 Content-Type: text/plain; charset="utf-8" IRQFD function allows registering of an @eventfd and @irq. @irq will be injected inside guest when @eventfd is written into. IOEVENTFD function allows registering an @eventfd and a guest physical address, @addr, along with optional data. A poll() on @eventfd will be woken up when guest attempts to access @addr. Signed-off-by: Srivatsa Vaddagiri --- include/sysemu/gunyah_int.h | 1 + accel/gunyah/gunyah-all.c | 94 +++++++++++++++++++++++++++++++++++++ 2 files changed, 95 insertions(+) diff --git a/include/sysemu/gunyah_int.h b/include/sysemu/gunyah_int.h index 0967b2d7d7..8c0b479f62 100644 --- a/include/sysemu/gunyah_int.h +++ b/include/sysemu/gunyah_int.h @@ -49,5 +49,6 @@ struct GUNYAHState { int gunyah_create_vm(void); int gunyah_vm_ioctl(int type, ...); void *gunyah_cpu_thread_fn(void *arg); +int gunyah_add_irqfd(int irqfd, int label, Error **errp); =20 #endif /* GUNYAH_INT_H */ diff --git a/accel/gunyah/gunyah-all.c b/accel/gunyah/gunyah-all.c index 19f96225a0..948ccfbeee 100644 --- a/accel/gunyah/gunyah-all.c +++ b/accel/gunyah/gunyah-all.c @@ -24,11 +24,21 @@ #include "qemu/error-report.h" #include "exec/address-spaces.h" #include "hw/boards.h" +#include "qapi/error.h" +#include "qemu/event_notifier.h" =20 static void gunyah_region_add(MemoryListener *listener, MemoryRegionSection *section); static void gunyah_region_del(MemoryListener *listener, MemoryRegionSection *section); +static void gunyah_mem_ioeventfd_add(MemoryListener *listener, + MemoryRegionSection *section, + bool match_data, uint64_t data, + EventNotifier *e); +static void gunyah_mem_ioeventfd_del(MemoryListener *listener, + MemoryRegionSection *section, + bool match_data, uint64_t data, + EventNotifier *e); =20 static int gunyah_ioctl(int type, ...) { @@ -65,6 +75,8 @@ static MemoryListener gunyah_memory_listener =3D { .priority =3D MEMORY_LISTENER_PRIORITY_ACCEL, .region_add =3D gunyah_region_add, .region_del =3D gunyah_region_del, + .eventfd_add =3D gunyah_mem_ioeventfd_add, + .eventfd_del =3D gunyah_mem_ioeventfd_del, }; =20 int gunyah_create_vm(void) @@ -319,6 +331,88 @@ void gunyah_set_swiotlb_size(uint64_t size) s->swiotlb_size =3D size; } =20 +int gunyah_add_irqfd(int irqfd, int label, Error **errp) +{ + int ret; + struct gh_fn_desc fdesc; + struct gh_fn_irqfd_arg ghirqfd; + + fdesc.type =3D GH_FN_IRQFD; + fdesc.arg_size =3D sizeof(struct gh_fn_irqfd_arg); + fdesc.arg =3D (__u64)(&ghirqfd); + + ghirqfd.fd =3D irqfd; + ghirqfd.label =3D label; + ghirqfd.flags =3D GH_IRQFD_FLAGS_LEVEL; + + ret =3D gunyah_vm_ioctl(GH_VM_ADD_FUNCTION, &fdesc); + if (ret) { + error_setg_errno(errp, errno, "GH_FN_IRQFD failed"); + } + + return ret; +} + +static int gunyah_set_ioeventfd_mmio(int fd, hwaddr addr, + uint32_t size, uint32_t data, bool datamatch, bool assign) +{ + int ret; + struct gh_fn_ioeventfd_arg io; + struct gh_fn_desc fdesc; + + io.fd =3D fd; + io.datamatch =3D datamatch ? data : 0; + io.len =3D size; + io.addr =3D addr; + io.flags =3D datamatch ? GH_IOEVENTFD_FLAGS_DATAMATCH : 0; + + fdesc.type =3D GH_FN_IOEVENTFD; + fdesc.arg_size =3D sizeof(struct gh_fn_ioeventfd_arg); + fdesc.arg =3D (__u64)(&io); + + if (assign) { + ret =3D gunyah_vm_ioctl(GH_VM_ADD_FUNCTION, &fdesc); + } else { + ret =3D gunyah_vm_ioctl(GH_VM_REMOVE_FUNCTION, &fdesc); + } + + return ret; +} + +static void gunyah_mem_ioeventfd_add(MemoryListener *listener, + MemoryRegionSection *section, + bool match_data, uint64_t data, + EventNotifier *e) +{ + int fd =3D event_notifier_get_fd(e); + int r; + + r =3D gunyah_set_ioeventfd_mmio(fd, section->offset_within_address_spa= ce, + int128_get64(section->size), data, match_da= ta, + true); + if (r < 0) { + error_report("error adding ioeventfd: %s", strerror(errno)); + exit(1); + } +} + +static void gunyah_mem_ioeventfd_del(MemoryListener *listener, + MemoryRegionSection *section, + bool match_data, uint64_t data, + EventNotifier *e) +{ + int fd =3D event_notifier_get_fd(e); + int r; + + r =3D gunyah_set_ioeventfd_mmio(fd, section->offset_within_address_spa= ce, + int128_get64(section->size), data, match_da= ta, + false); + if (r < 0) { + error_report("error deleting ioeventfd: %s", strerror(errno)); + exit(1); + } +} + void *gunyah_cpu_thread_fn(void *arg) { CPUState *cpu =3D arg; --=20 2.25.1 From nobody Thu Sep 19 15:48:41 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=quicinc.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1715870180894444.1193070244809; Thu, 16 May 2024 07:36:20 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1s7cBz-0004Xg-G2; Thu, 16 May 2024 10:34:47 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s7cBy-0004XJ-JG; Thu, 16 May 2024 10:34:46 -0400 Received: from mx0b-0031df01.pphosted.com ([205.220.180.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s7cBv-0008Mk-Fj; Thu, 16 May 2024 10:34:46 -0400 Received: from pps.filterd (m0279870.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 44G8nDhJ007619; Thu, 16 May 2024 14:34:40 GMT Received: from nalasppmta02.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3y47f45uad-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 16 May 2024 14:34:40 +0000 (GMT) Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 44GEYcb7007332 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 16 May 2024 14:34:38 GMT Received: from blr-ubuntu-31.qualcomm.com (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Thu, 16 May 2024 07:34:34 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s= qcppdkim1; bh=diQuupx2W0jCOTed6YvSYWkH5/u7Zh3h3915f87NRrQ=; b=fN NOHznO5eH+SB4BvqSetNXuIaB6LLWRbeLdxQsc+iE0sJJAsF2tGN6yCXiSio1q1L uDpP0oYpxxKrh0Sxu/RgVUEQPT12sMxsPsNB4Qw52Dhgob35eeLpqSLt/PUsYG3k f58Qq+eLQ0P8iOetwuPlj0sOXJa1LWERe0m/9M3yf3hrYH1gG31Aljb4RhA7WZSd ze7hwoLs0DRkfQrwJxZDFNMzXW1aGfN6M+fHTRp5iydd2gJPwOkP2i991A+EwUdr DOQb7+lzFJNHYoLebBiZZURpz/pGvi2oU/2i9BU3rZXBhFwrUkFK3JGQPx13VcK/ 1KVaMACOu6uh/R3wvlNw== From: Srivatsa Vaddagiri To: , , , , CC: , , , , , , Subject: [RFC/PATCH v2 07/12] gunyah: Add gicv3 interrupt controller Date: Thu, 16 May 2024 14:33:51 +0000 Message-ID: <20240516143356.1739402-8-quic_svaddagi@quicinc.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240516143356.1739402-1-quic_svaddagi@quicinc.com> References: <20240516143356.1739402-1-quic_svaddagi@quicinc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: o982Ok0GBCzhUX00EOCF1kr-sWFcYy6J X-Proofpoint-ORIG-GUID: o982Ok0GBCzhUX00EOCF1kr-sWFcYy6J X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.650,FMLib:17.11.176.26 definitions=2024-05-16_07,2024-05-15_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 phishscore=0 bulkscore=0 clxscore=1015 malwarescore=0 adultscore=0 lowpriorityscore=0 impostorscore=0 suspectscore=0 mlxlogscore=999 mlxscore=0 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2405010000 definitions=main-2405160102 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=205.220.180.131; envelope-from=quic_svaddagi@quicinc.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1715870182532100001 Content-Type: text/plain; charset="utf-8" Gunyah hypervisor supports emulation of a GICv3 compatible interrupt controller. Emulation is handled by hypervisor itself, with Qemu being allowed to specify some of the properties such as IO address at which GICv3 should be mapped in guest address space. These properties are conveyed to hypervisor via the device-tree, which is parsed by hypervisor (or more specifically Resource Manager VM, which is the trusted agent of hypervisor), before VM begins execution. Injection of interrupts inside guest is supported by doorbell API of Gunyah hypervisor. Each doorbell is associated with a specific interrupt. An eventfd is created and associated with each doorbell/irq. Injection of a specific irq is accomplished by writing to the eventfd associated with that irq. Signed-off-by: Srivatsa Vaddagiri --- MAINTAINERS | 2 + include/sysemu/gunyah_int.h | 3 + accel/gunyah/gunyah-all.c | 5 ++ hw/arm/virt.c | 5 ++ hw/intc/arm_gicv3_common.c | 3 + hw/intc/arm_gicv3_gunyah.c | 106 +++++++++++++++++++++++++++++++++ hw/intc/arm_gicv3_its_common.c | 3 + hw/intc/meson.build | 1 + 8 files changed, 128 insertions(+) create mode 100644 hw/intc/arm_gicv3_gunyah.c diff --git a/MAINTAINERS b/MAINTAINERS index d8d63b1c3a..d0289ded2f 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -529,6 +529,8 @@ S: Maintained F: accel/gunyah F: include/sysemu/gunyah.h F: include/sysemu/gunyah_int.h +F: target/arm/arm_gicv3_gunyah.c +F: hw/intc/arm_gicv3_gunyah.c =20 WHPX CPUs M: Sunil Muthuswamy diff --git a/include/sysemu/gunyah_int.h b/include/sysemu/gunyah_int.h index 8c0b479f62..e19872dae2 100644 --- a/include/sysemu/gunyah_int.h +++ b/include/sysemu/gunyah_int.h @@ -44,11 +44,14 @@ struct GUNYAHState { int vmfd; uint64_t swiotlb_size; bool preshmem_reserved; + uint32_t preshmem_size; + uint32_t nr_irqs; }; =20 int gunyah_create_vm(void); int gunyah_vm_ioctl(int type, ...); void *gunyah_cpu_thread_fn(void *arg); int gunyah_add_irqfd(int irqfd, int label, Error **errp); +GUNYAHState *get_gunyah_state(void); =20 #endif /* GUNYAH_INT_H */ diff --git a/accel/gunyah/gunyah-all.c b/accel/gunyah/gunyah-all.c index 948ccfbeee..d8c3758c59 100644 --- a/accel/gunyah/gunyah-all.c +++ b/accel/gunyah/gunyah-all.c @@ -413,6 +413,11 @@ static void gunyah_mem_ioeventfd_del(MemoryListener *l= istener, } } =20 +GUNYAHState *get_gunyah_state(void) +{ + return GUNYAH_STATE(current_accel()); +} + void *gunyah_cpu_thread_fn(void *arg) { CPUState *cpu =3D arg; diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 3b0fcf812f..bfb7f3d92e 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -694,6 +694,9 @@ static void create_its(VirtMachineState *vms) if (!vms->tcg_its) { itsclass =3D NULL; } + } else if (!strcmp(itsclass, "arm-its-gunyah")) { + /* ITS is not yet supported */ + itsclass =3D NULL; } =20 if (!itsclass) { @@ -1996,6 +1999,8 @@ static void finalize_gic_version(VirtMachineState *vm= s) gics_supported |=3D VIRT_GIC_VERSION_4_MASK; } } + } else if (gunyah_enabled()) { + gics_supported |=3D VIRT_GIC_VERSION_3_MASK; } else { error_report("Unsupported accelerator, can not determine GIC suppo= rt"); exit(1); diff --git a/hw/intc/arm_gicv3_common.c b/hw/intc/arm_gicv3_common.c index bd50a1b079..ec05d31e1b 100644 --- a/hw/intc/arm_gicv3_common.c +++ b/hw/intc/arm_gicv3_common.c @@ -32,6 +32,7 @@ #include "gicv3_internal.h" #include "hw/arm/linux-boot-if.h" #include "sysemu/kvm.h" +#include "sysemu/gunyah.h" =20 =20 static void gicv3_gicd_no_migration_shift_bug_post_load(GICv3State *cs) @@ -662,6 +663,8 @@ const char *gicv3_class_name(void) { if (kvm_irqchip_in_kernel()) { return "kvm-arm-gicv3"; + } else if (gunyah_enabled()) { + return "gunyah-arm-gicv3"; } else { if (kvm_enabled()) { error_report("Userspace GICv3 is not supported with KVM"); diff --git a/hw/intc/arm_gicv3_gunyah.c b/hw/intc/arm_gicv3_gunyah.c new file mode 100644 index 0000000000..f52e82bf9a --- /dev/null +++ b/hw/intc/arm_gicv3_gunyah.c @@ -0,0 +1,106 @@ +/* + * QEMU Gunyah hypervisor support + * + * Copyright(c) 2023 Qualcomm Innovation Center, Inc. All Rights Reserved. + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include "qemu/osdep.h" +#include "qapi/error.h" +#include "cpu.h" +#include "hw/intc/arm_gicv3_common.h" +#include "qemu/error-report.h" +#include "qemu/module.h" +#include "sysemu/gunyah.h" +#include "sysemu/gunyah_int.h" +#include "sysemu/runstate.h" +#include "gicv3_internal.h" +#include "vgic_common.h" +#include "migration/blocker.h" +#include "qom/object.h" +#include "target/arm/cpregs.h" +#include "qemu/event_notifier.h" + +struct GUNYAHARMGICv3Class { + ARMGICv3CommonClass parent_class; + DeviceRealize parent_realize; + ResettablePhases parent_phases; +}; + +#define TYPE_GUNYAH_ARM_GICV3 "gunyah-arm-gicv3" +typedef struct GUNYAHARMGICv3Class GUNYAHARMGICv3Class; + +/* This is reusing the GICv3State typedef from ARM_GICV3_ITS_COMMON */ +DECLARE_OBJ_CHECKERS(GICv3State, GUNYAHARMGICv3Class, + GUNYAH_ARM_GICV3, TYPE_GUNYAH_ARM_GICV3) + +static EventNotifier *irq_notify; + +static void gunyah_arm_gicv3_set_irq(void *opaque, int irq, int level) +{ + GICv3State *s =3D (GICv3State *)opaque; + + if (irq < s->num_irq - GIC_INTERNAL) { + event_notifier_set(&irq_notify[irq]); + } +} + +static void gunyah_arm_gicv3_realize(DeviceState *dev, Error **errp) +{ + GICv3State *s =3D GUNYAH_ARM_GICV3(dev); + GUNYAHARMGICv3Class *ggc =3D GUNYAH_ARM_GICV3_GET_CLASS(s); + Error *local_err =3D NULL; + int i; + GUNYAHState *state =3D get_gunyah_state(); + + ggc->parent_realize(dev, &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } + + if (s->revision !=3D 3) { + error_setg(errp, "unsupported GIC revision %d for in-kernel GIC", + s->revision); + return; + } + + gicv3_init_irqs_and_mmio(s, gunyah_arm_gicv3_set_irq, NULL); + + irq_notify =3D g_malloc_n(s->num_irq - GIC_INTERNAL, sizeof(EventNotif= ier)); + + for (i =3D 0; i < s->num_irq - GIC_INTERNAL; ++i) { + event_notifier_init(&irq_notify[i], 0); + gunyah_add_irqfd(irq_notify[i].wfd, i, errp); + } + + state->nr_irqs =3D s->num_irq - GIC_INTERNAL; +} + +static void gunyah_arm_gicv3_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc =3D DEVICE_CLASS(klass); + ResettableClass *rc =3D RESETTABLE_CLASS(klass); + GUNYAHARMGICv3Class *ggc =3D GUNYAH_ARM_GICV3_CLASS(klass); + + device_class_set_parent_realize(dc, gunyah_arm_gicv3_realize, + &ggc->parent_realize); + resettable_class_set_parent_phases(rc, NULL, NULL, NULL, + &ggc->parent_phases); +} + +static const TypeInfo gunyah_arm_gicv3_info =3D { + .name =3D TYPE_GUNYAH_ARM_GICV3, + .parent =3D TYPE_ARM_GICV3_COMMON, + .instance_size =3D sizeof(GICv3State), + .class_init =3D gunyah_arm_gicv3_class_init, + .class_size =3D sizeof(GUNYAHARMGICv3Class), +}; + +static void gunyah_arm_gicv3_register_types(void) +{ + type_register_static(&gunyah_arm_gicv3_info); +} + +type_init(gunyah_arm_gicv3_register_types) diff --git a/hw/intc/arm_gicv3_its_common.c b/hw/intc/arm_gicv3_its_common.c index 0b97362cd2..5c424c345b 100644 --- a/hw/intc/arm_gicv3_its_common.c +++ b/hw/intc/arm_gicv3_its_common.c @@ -25,6 +25,7 @@ #include "qemu/log.h" #include "qemu/module.h" #include "sysemu/kvm.h" +#include "sysemu/gunyah.h" =20 static int gicv3_its_pre_save(void *opaque) { @@ -164,6 +165,8 @@ const char *its_class_name(void) { if (kvm_irqchip_in_kernel()) { return "arm-its-kvm"; + } else if (gunyah_enabled()) { + return "arm-its-gunyah"; } else { /* Software emulation based model */ return "arm-gicv3-its"; diff --git a/hw/intc/meson.build b/hw/intc/meson.build index 58140da5f2..39a05af178 100644 --- a/hw/intc/meson.build +++ b/hw/intc/meson.build @@ -72,3 +72,4 @@ specific_ss.add(when: 'CONFIG_LOONGARCH_IPI', if_true: fi= les('loongarch_ipi.c')) specific_ss.add(when: 'CONFIG_LOONGARCH_PCH_PIC', if_true: files('loongarc= h_pch_pic.c')) specific_ss.add(when: 'CONFIG_LOONGARCH_PCH_MSI', if_true: files('loongarc= h_pch_msi.c')) specific_ss.add(when: 'CONFIG_LOONGARCH_EXTIOI', if_true: files('loongarch= _extioi.c')) +specific_ss.add(when: ['CONFIG_ARM_GIC', 'CONFIG_GUNYAH', 'TARGET_AARCH64'= ], if_true: files('arm_gicv3_gunyah.c')) --=20 2.25.1 From nobody Thu Sep 19 15:48:41 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=quicinc.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1715870240122528.5715089320546; Thu, 16 May 2024 07:37:20 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1s7cC2-0004ZS-5Z; Thu, 16 May 2024 10:34:50 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s7cC0-0004YM-Pg; Thu, 16 May 2024 10:34:48 -0400 Received: from mx0b-0031df01.pphosted.com ([205.220.180.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s7cBy-0008NA-Qz; Thu, 16 May 2024 10:34:48 -0400 Received: from pps.filterd (m0279869.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 44G8g6j7021620; Thu, 16 May 2024 14:34:45 GMT Received: from nalasppmta01.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3y45vbe0n3-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 16 May 2024 14:34:44 +0000 (GMT) Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 44GEYh1P027055 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 16 May 2024 14:34:43 GMT Received: from blr-ubuntu-31.qualcomm.com (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Thu, 16 May 2024 07:34:39 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s= qcppdkim1; bh=7LcNbMtPfpExWDJYWPvv/A+FLK4Cxq//b0A4RlQj7IE=; b=FW Y4tSzdJVqwzKC65GAlJPfAogkgkiheQIaYG9NHDiFDmZo1vpNYHWdSReqkfmh2f9 2OXgMI05aL1hNOFhHBT5HhAo+G33LNexBKtW8X/r+W59ZCBA1/ODPKDq4/4npz9F BuGF/B8mYwANN0sZ26eSwSPit1Jo6orUMmlxvA8Wj+nAqVEmyImItA0uHxzzZKg/ 4MpvDu33RF8cm6qOvFXpK4jRLB9uY2ski0/+m+2IwKdaiJxcF6n97uYX/DtE7F7K i6BJ2EJ+yOU2WPCikPsHfUw6EoIa4BQQLzr0Rz3ywxtEww/sEcUn5ZRjjPzsgPor upjdhfnsRo3qDI2mJYAA== From: Srivatsa Vaddagiri To: , , , , CC: , , , , , , Subject: [RFC/PATCH v2 08/12] gunyah: Specific device-tree location Date: Thu, 16 May 2024 14:33:52 +0000 Message-ID: <20240516143356.1739402-9-quic_svaddagi@quicinc.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240516143356.1739402-1-quic_svaddagi@quicinc.com> References: <20240516143356.1739402-1-quic_svaddagi@quicinc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: pyxsaJ7HTs-ci0Qd-BT5y85e-WaTs44d X-Proofpoint-ORIG-GUID: pyxsaJ7HTs-ci0Qd-BT5y85e-WaTs44d X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.650,FMLib:17.11.176.26 definitions=2024-05-16_07,2024-05-15_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 clxscore=1015 mlxscore=0 suspectscore=0 spamscore=0 malwarescore=0 adultscore=0 mlxlogscore=878 phishscore=0 priorityscore=1501 bulkscore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2405010000 definitions=main-2405160101 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=205.220.180.131; envelope-from=quic_svaddagi@quicinc.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1715870240779100010 Content-Type: text/plain; charset="utf-8" Specify the location of device-tree and its size, as Gunyah requires the device-tree to be parsed before VM can begin its execution. Signed-off-by: Srivatsa Vaddagiri --- MAINTAINERS | 1 + include/sysemu/gunyah.h | 2 ++ accel/stubs/gunyah-stub.c | 5 +++++ hw/arm/virt.c | 6 ++++++ target/arm/gunyah.c | 45 +++++++++++++++++++++++++++++++++++++++ target/arm/meson.build | 3 +++ 6 files changed, 62 insertions(+) create mode 100644 target/arm/gunyah.c diff --git a/MAINTAINERS b/MAINTAINERS index d0289ded2f..c42fdc2afd 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -527,6 +527,7 @@ GUNYAH M: Srivatsa Vaddagiri S: Maintained F: accel/gunyah +F: target/arm/gunyah.c F: include/sysemu/gunyah.h F: include/sysemu/gunyah_int.h F: target/arm/arm_gicv3_gunyah.c diff --git a/include/sysemu/gunyah.h b/include/sysemu/gunyah.h index 78cb80f01e..ba4862a1a6 100644 --- a/include/sysemu/gunyah.h +++ b/include/sysemu/gunyah.h @@ -29,4 +29,6 @@ typedef struct GUNYAHState GUNYAHState; DECLARE_INSTANCE_CHECKER(GUNYAHState, GUNYAH_STATE, TYPE_GUNYAH_ACCEL) =20 +int gunyah_arm_set_dtb(uint64_t dtb_start, uint64_t dtb_size); + #endif /* QEMU_GUNYAH_H */ diff --git a/accel/stubs/gunyah-stub.c b/accel/stubs/gunyah-stub.c index 2028fa04c7..8f6e952938 100644 --- a/accel/stubs/gunyah-stub.c +++ b/accel/stubs/gunyah-stub.c @@ -16,3 +16,8 @@ void gunyah_set_swiotlb_size(uint64_t size) { return; } + +int gunyah_arm_set_dtb(__u64 dtb_start, __u64 dtb_size) +{ + return -1; +} diff --git a/hw/arm/virt.c b/hw/arm/virt.c index bfb7f3d92e..a485388d3c 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -1738,6 +1738,12 @@ void virt_machine_done(Notifier *notifier, void *dat= a) exit(1); } =20 + if (gunyah_enabled()) { + if (gunyah_arm_set_dtb(info->dtb_start, vms->fdt_size)) { + exit(1); + } + } + fw_cfg_add_extra_pci_roots(vms->bus, vms->fw_cfg); =20 virt_acpi_setup(vms); diff --git a/target/arm/gunyah.c b/target/arm/gunyah.c new file mode 100644 index 0000000000..d655cd9a79 --- /dev/null +++ b/target/arm/gunyah.c @@ -0,0 +1,45 @@ +/* + * QEMU Gunyah hypervisor support + * + * Copyright(c) 2023 Qualcomm Innovation Center, Inc. All Rights Reserved. + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include "qemu/osdep.h" +#include "qemu/error-report.h" +#include "sysemu/gunyah.h" +#include "sysemu/gunyah_int.h" +#include "linux-headers/linux/gunyah.h" + +/* + * Specify location of device-tree in guest address space. + * + * @dtb_start - Guest physical address where VM's device-tree is found + * @dtb_size - Size of device-tree (and any free space after it). + * + * RM or Resource Manager VM is a trusted and privileged VM that works in + * collaboration with Gunyah hypevisor to setup resources for a VM before = it can + * begin execution. One of its functions includes inspection/modification = of a + * VM's device-tree before VM begins its execution. Modification can + * include specification of runtime resources allocated by hypervisor, + * details of which needs to be visible to VM. VM's device-tree is modifi= ed + * "inline" making use of "free" space that could exist at the end of devi= ce + * tree. + */ +int gunyah_arm_set_dtb(uint64_t dtb_start, uint64_t dtb_size) +{ + int ret; + struct gh_vm_dtb_config dtb; + + dtb.guest_phys_addr =3D dtb_start; + dtb.size =3D dtb_size; + + ret =3D gunyah_vm_ioctl(GH_VM_SET_DTB_CONFIG, &dtb); + if (ret !=3D 0) { + error_report("GH_VM_SET_DTB_CONFIG failed: %s", strerror(errno)); + exit(1); + } + + return 0; +} diff --git a/target/arm/meson.build b/target/arm/meson.build index 2e10464dbb..951226b0a2 100644 --- a/target/arm/meson.build +++ b/target/arm/meson.build @@ -25,6 +25,9 @@ arm_system_ss.add(files( 'machine.c', 'ptw.c', )) +arm_system_ss.add(when: 'CONFIG_GUNYAH', if_true: files( + 'gunyah.c', +)) =20 arm_user_ss =3D ss.source_set() =20 --=20 2.25.1 From nobody Thu Sep 19 15:48:41 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=quicinc.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 171587012602366.28408710662029; Thu, 16 May 2024 07:35:26 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1s7cCP-0005K9-BH; Thu, 16 May 2024 10:35:15 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s7cCD-0004tU-Ne; Thu, 16 May 2024 10:35:03 -0400 Received: from mx0a-0031df01.pphosted.com ([205.220.168.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s7cC6-0008OU-A6; Thu, 16 May 2024 10:35:01 -0400 Received: from pps.filterd (m0279865.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 44GATgUM029906; Thu, 16 May 2024 14:34:49 GMT Received: from nalasppmta03.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3y51tuj643-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 16 May 2024 14:34:48 +0000 (GMT) Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 44GEYmuk012831 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 16 May 2024 14:34:48 GMT Received: from blr-ubuntu-31.qualcomm.com (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Thu, 16 May 2024 07:34:43 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s= qcppdkim1; bh=no241RHkcyhLATyllSF8NpXhL8pA4FWWRbWtBq5VNzY=; b=JN h+wzdhAHtlQhCkj1InHqAbZ/qowWysFBqDEWOIS1OBd+NyNsiYStuDMWPKtGer67 Aqfrvx1kblIgJpm+IAewyVvkE+yusYn+jk0HSboAIwzsCwovCexlrxzCTpR/J0Uv 1uyrQkz6h0wFeLcQd2mn9pvE1tUT1tlH/E6+fxzjVJQQH+DaWzouWc0RhpRitxjV Ml1eafcti486YG7DzNSILd+zWoTvlMe+WePFResukCfN+P6C9bx7ikJ/JeDMpp0S a+Z5eDVfolEZx0Um10Wjnt55MO9nCgOKe+HcSv5YWjxIjsxoX/BTVy8if9GrO+6e QBntH6CBDB1PV5IEnoNQ== From: Srivatsa Vaddagiri To: , , , , CC: , , , , , , Subject: [RFC/PATCH v2 09/12] gunyah: Customize device-tree Date: Thu, 16 May 2024 14:33:53 +0000 Message-ID: <20240516143356.1739402-10-quic_svaddagi@quicinc.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240516143356.1739402-1-quic_svaddagi@quicinc.com> References: <20240516143356.1739402-1-quic_svaddagi@quicinc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: 1KmdDbX_pdjBT2qReCIgibWRVt3lCDZj X-Proofpoint-GUID: 1KmdDbX_pdjBT2qReCIgibWRVt3lCDZj X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.650,FMLib:17.11.176.26 definitions=2024-05-16_07,2024-05-15_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 phishscore=0 spamscore=0 impostorscore=0 bulkscore=0 suspectscore=0 clxscore=1015 mlxscore=0 lowpriorityscore=0 mlxlogscore=999 malwarescore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2405010000 definitions=main-2405160103 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=205.220.168.131; envelope-from=quic_svaddagi@quicinc.com; helo=mx0a-0031df01.pphosted.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1715870128268100004 Content-Type: text/plain; charset="utf-8" Customize device-tree with Gunyah specific properties. Some of these properties include specification of doorbells that need to be created and associated with various interrupts. Signed-off-by: Srivatsa Vaddagiri --- include/sysemu/gunyah.h | 2 + accel/stubs/gunyah-stub.c | 5 +++ hw/arm/virt.c | 11 ++++++ target/arm/gunyah.c | 79 +++++++++++++++++++++++++++++++++++++++ 4 files changed, 97 insertions(+) diff --git a/include/sysemu/gunyah.h b/include/sysemu/gunyah.h index ba4862a1a6..58d0379b72 100644 --- a/include/sysemu/gunyah.h +++ b/include/sysemu/gunyah.h @@ -30,5 +30,7 @@ DECLARE_INSTANCE_CHECKER(GUNYAHState, GUNYAH_STATE, TYPE_GUNYAH_ACCEL) =20 int gunyah_arm_set_dtb(uint64_t dtb_start, uint64_t dtb_size); +void gunyah_arm_fdt_customize(void *fdt, uint64_t mem_base, + uint32_t gic_phandle); =20 #endif /* QEMU_GUNYAH_H */ diff --git a/accel/stubs/gunyah-stub.c b/accel/stubs/gunyah-stub.c index 8f6e952938..19649ea40b 100644 --- a/accel/stubs/gunyah-stub.c +++ b/accel/stubs/gunyah-stub.c @@ -21,3 +21,8 @@ int gunyah_arm_set_dtb(__u64 dtb_start, __u64 dtb_size) { return -1; } + +void gunyah_arm_fdt_customize(void *fdt, uint64_t mem_base, + uint32_t gic_phandle) { + return; +} diff --git a/hw/arm/virt.c b/hw/arm/virt.c index a485388d3c..b0132beddd 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -2214,6 +2214,14 @@ static void fdt_add_reserved_memory(VirtMachineState= *vms) g_free(nodename); } =20 +static void virt_modify_dtb(const struct arm_boot_info *binfo, void *fdt) +{ + const VirtMachineState *vms =3D container_of(binfo, VirtMachineState, + bootinfo); + + gunyah_arm_fdt_customize(fdt, vms->memmap[VIRT_MEM].base, vms->gic_pha= ndle); +} + static void machvirt_init(MachineState *machine) { VirtMachineState *vms =3D VIRT_MACHINE(machine); @@ -2533,6 +2541,9 @@ static void machvirt_init(MachineState *machine) vms->bootinfo.skip_dtb_autoload =3D true; vms->bootinfo.firmware_loaded =3D firmware_loaded; vms->bootinfo.psci_conduit =3D vms->psci_conduit; + if (gunyah_enabled()) { + vms->bootinfo.modify_dtb =3D virt_modify_dtb; + } arm_load_kernel(ARM_CPU(first_cpu), machine, &vms->bootinfo); =20 vms->machine_done.notify =3D virt_machine_done; diff --git a/target/arm/gunyah.c b/target/arm/gunyah.c index d655cd9a79..c33a0c0615 100644 --- a/target/arm/gunyah.c +++ b/target/arm/gunyah.c @@ -11,6 +11,9 @@ #include "sysemu/gunyah.h" #include "sysemu/gunyah_int.h" #include "linux-headers/linux/gunyah.h" +#include "exec/memory.h" +#include "sysemu/device_tree.h" +#include "hw/arm/fdt.h" =20 /* * Specify location of device-tree in guest address space. @@ -43,3 +46,79 @@ int gunyah_arm_set_dtb(uint64_t dtb_start, uint64_t dtb_= size) =20 return 0; } + +void gunyah_arm_fdt_customize(void *fdt, uint64_t mem_base, + uint32_t gic_phandle) +{ + char *nodename; + int i; + GUNYAHState *state =3D get_gunyah_state(); + + qemu_fdt_add_subnode(fdt, "/gunyah-vm-config"); + qemu_fdt_setprop_string(fdt, "/gunyah-vm-config", + "image-name", "qemu-vm"); + qemu_fdt_setprop_string(fdt, "/gunyah-vm-config", "os-type", "linux"); + + nodename =3D g_strdup_printf("/gunyah-vm-config/memory"); + qemu_fdt_add_subnode(fdt, nodename); + qemu_fdt_setprop_cell(fdt, nodename, "#address-cells", 2); + qemu_fdt_setprop_cell(fdt, nodename, "#size-cells", 2); + qemu_fdt_setprop_u64(fdt, nodename, "base-address", mem_base); + + g_free(nodename); + + nodename =3D g_strdup_printf("/gunyah-vm-config/interrupts"); + qemu_fdt_add_subnode(fdt, nodename); + qemu_fdt_setprop_cell(fdt, nodename, "config", gic_phandle); + g_free(nodename); + + nodename =3D g_strdup_printf("/gunyah-vm-config/vcpus"); + qemu_fdt_add_subnode(fdt, nodename); + qemu_fdt_setprop_string(fdt, nodename, "affinity", "proxy"); + g_free(nodename); + + nodename =3D g_strdup_printf("/gunyah-vm-config/vdevices"); + qemu_fdt_add_subnode(fdt, nodename); + qemu_fdt_setprop_string(fdt, nodename, "generate", "/hypervisor"); + g_free(nodename); + + for (i =3D 0; i < state->nr_slots; ++i) { + if (!state->slots[i].start || state->slots[i].lend || + state->slots[i].start =3D=3D mem_base) { + continue; + } + + nodename =3D g_strdup_printf("/gunyah-vm-config/vdevices/shm-%x", = i); + qemu_fdt_add_subnode(fdt, nodename); + qemu_fdt_setprop_string(fdt, nodename, "vdevice-type", "shm"); + qemu_fdt_setprop_string(fdt, nodename, "push-compatible", "dma"); + qemu_fdt_setprop(fdt, nodename, "peer-default", NULL, 0); + qemu_fdt_setprop_u64(fdt, nodename, "dma_base", 0); + g_free(nodename); + + nodename =3D g_strdup_printf("/gunyah-vm-config/vdevices/shm-%x/me= mory", + i); + qemu_fdt_add_subnode(fdt, nodename); + qemu_fdt_setprop_cell(fdt, nodename, "label", i); + qemu_fdt_setprop_cell(fdt, nodename, "#address-cells", 2); + qemu_fdt_setprop_u64(fdt, nodename, "base", state->slots[i].start); + g_free(nodename); + } + + for (i =3D 0; i < state->nr_irqs; ++i) { + nodename =3D g_strdup_printf("/gunyah-vm-config/vdevices/bell-%x",= i); + qemu_fdt_add_subnode(fdt, nodename); + qemu_fdt_setprop_string(fdt, nodename, "vdevice-type", "doorbell"); + char *p =3D g_strdup_printf("/hypervisor/bell-%x", i); + qemu_fdt_setprop_string(fdt, nodename, "generate", p); + g_free(p); + qemu_fdt_setprop_cell(fdt, nodename, "label", i); + qemu_fdt_setprop(fdt, nodename, "peer-default", NULL, 0); + qemu_fdt_setprop(fdt, nodename, "source-can-clear", NULL, 0); + + qemu_fdt_setprop_cells(fdt, nodename, "interrupts", + GIC_FDT_IRQ_TYPE_SPI, i, GIC_FDT_IRQ_FLAGS_LEVEL_HI); + + g_free(nodename); + } +} --=20 2.25.1 From nobody Thu Sep 19 15:48:41 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=quicinc.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 171587023527145.63098722837128; Thu, 16 May 2024 07:37:15 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1s7cCL-00050d-Gk; Thu, 16 May 2024 10:35:09 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s7cCA-0004rQ-Vx; Thu, 16 May 2024 10:35:00 -0400 Received: from mx0a-0031df01.pphosted.com ([205.220.168.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s7cC8-0008Oi-OZ; Thu, 16 May 2024 10:34:58 -0400 Received: from pps.filterd (m0279867.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 44G9i7Uj011111; Thu, 16 May 2024 14:34:53 GMT Received: from nalasppmta02.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3y3x51pwy3-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 16 May 2024 14:34:52 +0000 (GMT) Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 44GEYpSY007418 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 16 May 2024 14:34:51 GMT Received: from blr-ubuntu-31.qualcomm.com (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Thu, 16 May 2024 07:34:48 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s= qcppdkim1; bh=qzVYWafzbxg88sfXP7TQ/3kp6aOIADZfGAq7TNs4do8=; b=jF hwbkPVYBMzWU8FW2DGkO2WVM6c5hckjm3wrmDW5uSMj5RUremkbkEDfRDZcdxmqH DDIos4kuHFpg5VpAyyX0xW9Aj9EJeNPHgKiYb3jCKWHhw7DHBadMFPtpBfRmegHL f8Wr5GHi1aELoa7l3sf7BHF8iDD/wryGoYF8Ti7E8dJYa/oB2aGc1mTP9izfW24A jzQncCN9RVFT1a/qJ9wdpzctFRC7mR6W4+1FdFhyDCal+8iQjp3Mcwv6TsN1/wU1 wx94FmOYvfSvsN7kE4rMibHCQOQVARy3vzuCunMrL5kSRtnSeuwbVXcZVHmAR9rn A9dxrUiLumW8K/sD7eZg== From: Srivatsa Vaddagiri To: , , , , CC: , , , , , , Subject: [RFC/PATCH v2 10/12] gunyah: CPU execution loop Date: Thu, 16 May 2024 14:33:54 +0000 Message-ID: <20240516143356.1739402-11-quic_svaddagi@quicinc.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240516143356.1739402-1-quic_svaddagi@quicinc.com> References: <20240516143356.1739402-1-quic_svaddagi@quicinc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: 9TdXzo6mC7cWB7m7rXizmxH1XXMxEfpZ X-Proofpoint-ORIG-GUID: 9TdXzo6mC7cWB7m7rXizmxH1XXMxEfpZ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.650,FMLib:17.11.176.26 definitions=2024-05-16_07,2024-05-15_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 suspectscore=0 bulkscore=0 spamscore=0 lowpriorityscore=0 phishscore=0 mlxscore=0 impostorscore=0 adultscore=0 clxscore=1015 mlxlogscore=762 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2405010000 definitions=main-2405160103 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=205.220.168.131; envelope-from=quic_svaddagi@quicinc.com; helo=mx0a-0031df01.pphosted.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1715870236844100001 Content-Type: text/plain; charset="utf-8" Complete the cpu execution loop. At this time, we recognize exits associated with only MMIO access. Future patches will add support for recognizing other exit reasons, such as PSCI calls made by guest. Signed-off-by: Srivatsa Vaddagiri --- include/sysemu/gunyah_int.h | 9 ++ accel/gunyah/gunyah-accel-ops.c | 7 + accel/gunyah/gunyah-all.c | 252 +++++++++++++++++++++++++++++++- target/arm/gunyah.c | 18 +++ 4 files changed, 285 insertions(+), 1 deletion(-) diff --git a/include/sysemu/gunyah_int.h b/include/sysemu/gunyah_int.h index e19872dae2..ef82c6edd8 100644 --- a/include/sysemu/gunyah_int.h +++ b/include/sysemu/gunyah_int.h @@ -46,12 +46,21 @@ struct GUNYAHState { bool preshmem_reserved; uint32_t preshmem_size; uint32_t nr_irqs; + uint32_t vm_started; +}; + +struct AccelCPUState { + int fd; + struct gh_vcpu_run *run; }; =20 int gunyah_create_vm(void); +void gunyah_start_vm(void); int gunyah_vm_ioctl(int type, ...); void *gunyah_cpu_thread_fn(void *arg); int gunyah_add_irqfd(int irqfd, int label, Error **errp); GUNYAHState *get_gunyah_state(void); +int gunyah_arch_put_registers(CPUState *cs, int level); +void gunyah_cpu_synchronize_post_reset(CPUState *cpu); =20 #endif /* GUNYAH_INT_H */ diff --git a/accel/gunyah/gunyah-accel-ops.c b/accel/gunyah/gunyah-accel-op= s.c index af8a4ad606..f6a0d8d782 100644 --- a/accel/gunyah/gunyah-accel-ops.c +++ b/accel/gunyah/gunyah-accel-ops.c @@ -37,6 +37,11 @@ static void gunyah_accel_instance_init(Object *obj) s->vmfd =3D -1; } =20 +static void gunyah_setup_post(MachineState *ms, AccelState *accel) +{ + gunyah_start_vm(); +} + static void gunyah_accel_class_init(ObjectClass *oc, void *data) { AccelClass *ac =3D ACCEL_CLASS(oc); @@ -44,6 +49,7 @@ static void gunyah_accel_class_init(ObjectClass *oc, void= *data) ac->name =3D "GUNYAH"; ac->init_machine =3D gunyah_init; ac->allowed =3D &gunyah_allowed; + ac->setup_post =3D gunyah_setup_post; } =20 static const TypeInfo gunyah_accel_type =3D { @@ -104,6 +110,7 @@ static void gunyah_accel_ops_class_init(ObjectClass *oc= , void *data) ops->kick_vcpu_thread =3D gunyah_kick_vcpu_thread; ops->cpu_thread_is_idle =3D gunyah_vcpu_thread_is_idle; ops->check_capability =3D gunyah_check_capability; + ops->synchronize_post_reset =3D gunyah_cpu_synchronize_post_reset; }; =20 static const TypeInfo gunyah_accel_ops_type =3D { diff --git a/accel/gunyah/gunyah-all.c b/accel/gunyah/gunyah-all.c index d8c3758c59..4c56dd8c73 100644 --- a/accel/gunyah/gunyah-all.c +++ b/accel/gunyah/gunyah-all.c @@ -26,6 +26,9 @@ #include "hw/boards.h" #include "qapi/error.h" #include "qemu/event_notifier.h" +#include "qemu/main-loop.h" +#include "sysemu/runstate.h" +#include "qemu/guest-random.h" =20 static void gunyah_region_add(MemoryListener *listener, MemoryRegionSection *section); @@ -40,6 +43,18 @@ static void gunyah_mem_ioeventfd_del(MemoryListener *lis= tener, bool match_data, uint64_t data, EventNotifier *e); =20 +/* Keep this here until Linux kernel UAPI header file (gunyah.h) is update= d */ +enum gh_vm_exit_type { + GH_RM_EXIT_TYPE_VM_EXIT =3D 0, + GH_RM_EXIT_TYPE_PSCI_POWER_OFF =3D 1, + GH_RM_EXIT_TYPE_PSCI_SYSTEM_RESET =3D 2, + GH_RM_EXIT_TYPE_PSCI_SYSTEM_RESET2 =3D 3, + GH_RM_EXIT_TYPE_WDT_BITE =3D 4, + GH_RM_EXIT_TYPE_HYP_ERROR =3D 5, + GH_RM_EXIT_TYPE_ASYNC_EXT_ABORT =3D 6, + GH_RM_EXIT_TYPE_VM_FORCE_STOPPED =3D 7, +}; + static int gunyah_ioctl(int type, ...) { void *arg; @@ -70,6 +85,18 @@ int gunyah_vm_ioctl(int type, ...) return ioctl(s->vmfd, type, arg); } =20 +static int gunyah_vcpu_ioctl(CPUState *cpu, int type, ...) +{ + void *arg; + va_list ap; + + va_start(ap, type); + arg =3D va_arg(ap, void *); + va_end(ap); + + return ioctl(cpu->accel->fd, type, arg); +} + static MemoryListener gunyah_memory_listener =3D { .name =3D "gunyah", .priority =3D MEMORY_LISTENER_PRIORITY_ACCEL, @@ -282,6 +309,11 @@ static void gunyah_set_phys_mem(GUNYAHState *s, error_report("Overlapping slot registration not supported!"); exit(1); } + + if (qatomic_read(&s->vm_started)) { + error_report("Memory map changes after VM start not supported!= "); + exit(1); + } } =20 if (area->readonly || @@ -418,13 +450,231 @@ GUNYAHState *get_gunyah_state(void) return GUNYAH_STATE(current_accel()); } =20 +static void gunyah_ipi_signal(int sig) +{ + if (current_cpu) { + qatomic_set(¤t_cpu->accel->run->immediate_exit, 1); + } +} + +static void gunyah_cpu_kick_self(void) +{ + qatomic_set(¤t_cpu->accel->run->immediate_exit, 1); +} + +static int gunyah_init_vcpu(CPUState *cpu, Error **errp) +{ + int ret; + struct gh_fn_desc fdesc; + struct gh_fn_vcpu_arg vcpu; + struct sigaction sigact; + sigset_t set; + + cpu->accel =3D g_new0(AccelCPUState, 1); + + /* init cpu signals */ + memset(&sigact, 0, sizeof(sigact)); + sigact.sa_handler =3D gunyah_ipi_signal; + sigaction(SIG_IPI, &sigact, NULL); + + pthread_sigmask(SIG_BLOCK, NULL, &set); + sigdelset(&set, SIG_IPI); + + ret =3D pthread_sigmask(SIG_SETMASK, &set, NULL); + if (ret) { + error_report("pthread_sigmask: %s", strerror(ret)); + exit(1); + } + + vcpu.id =3D cpu->cpu_index; + fdesc.type =3D GH_FN_VCPU; + fdesc.arg_size =3D sizeof(struct gh_fn_vcpu_arg); + fdesc.arg =3D (__u64)(&vcpu); + + ret =3D gunyah_vm_ioctl(GH_VM_ADD_FUNCTION, &fdesc); + if (ret < 0) { + error_report("could not create VCPU %d: %s", vcpu.id, strerror(err= no)); + exit(1); + } + + cpu->accel->fd =3D ret; + cpu->accel->run =3D mmap(0, 4096, PROT_READ | PROT_WRITE, MAP_SHARED, = ret, 0); + if (cpu->accel->run =3D=3D MAP_FAILED) { + error_report("mmap of vcpu run structure failed : %s", strerror(er= rno)); + exit(1); + } + + return 0; +} + +static void gunyah_vcpu_destroy(CPUState *cpu) +{ + int ret; + + ret =3D munmap(cpu->accel->run, 4096); + if (ret < 0) { + error_report("munmap of vcpu run structure failed: %s", + strerror(errno)); + exit(1); + } + + close(cpu->accel->fd); + g_free(cpu->accel); +} + +void gunyah_start_vm(void) +{ + int ret; + GUNYAHState *s =3D GUNYAH_STATE(current_accel()); + + ret =3D gunyah_vm_ioctl(GH_VM_START); + if (ret !=3D 0) { + error_report("Failed to start VM: %s", strerror(errno)); + exit(1); + } + qatomic_set(&s->vm_started, 1); +} + +static int gunyah_vcpu_exec(CPUState *cpu) +{ + int ret; + enum gh_vm_status exit_status; + enum gh_vm_exit_type exit_type; + + bql_unlock(); + cpu_exec_start(cpu); + + do { + struct gh_vcpu_run *run =3D cpu->accel->run; + int exit_reason; + + if (qatomic_read(&cpu->exit_request)) { + gunyah_cpu_kick_self(); + } + + /* Todo: Check need for smp_rmb() here */ + + ret =3D gunyah_vcpu_ioctl(cpu, GH_VCPU_RUN); + if (ret < 0) { + if (errno =3D=3D EINTR || errno =3D=3D EAGAIN) { + qatomic_set(&run->immediate_exit, 0); + /* Todo: Check need for smp_wmb() here */ + ret =3D EXCP_INTERRUPT; + break; + } + + error_report("GH_VCPU_RUN: %s", strerror(errno)); + ret =3D -1; + break; + } + + exit_reason =3D run->exit_reason; + switch (exit_reason) { + case GH_VCPU_EXIT_MMIO: + address_space_rw(&address_space_memory, + run->mmio.phys_addr, MEMTXATTRS_UNSPECIFIED, + run->mmio.data, + run->mmio.len, + run->mmio.is_write); + break; + + case GH_VCPU_EXIT_STATUS: + exit_status =3D run->status.status; + exit_type =3D run->status.exit_info.type; + + switch (exit_status) { + case GH_VM_STATUS_CRASHED: + bql_lock(); + qemu_system_guest_panicked(NULL); + bql_unlock(); + ret =3D EXCP_INTERRUPT; + break; + case GH_VM_STATUS_EXITED: + /* Fall-through */ + default: + switch (exit_type) { + case GH_RM_EXIT_TYPE_WDT_BITE: + bql_lock(); + qemu_system_guest_panicked(NULL); + bql_unlock(); + ret =3D EXCP_INTERRUPT; + break; + + case GH_RM_EXIT_TYPE_PSCI_SYSTEM_RESET: + case GH_RM_EXIT_TYPE_PSCI_SYSTEM_RESET2: + qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET); + ret =3D EXCP_INTERRUPT; + break; + case GH_RM_EXIT_TYPE_VM_EXIT: + case GH_RM_EXIT_TYPE_PSCI_POWER_OFF: + /* Fall-through */ + default: + qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUT= DOWN); + ret =3D EXCP_INTERRUPT; + } + } + break; + + default: + error_report("unhandled exit %d", exit_reason); + exit(1); + } + } while (ret =3D=3D 0); + + cpu_exec_end(cpu); + bql_lock(); + + if (ret < 0) { + cpu_dump_state(cpu, stderr, CPU_DUMP_CODE); + vm_stop(RUN_STATE_INTERNAL_ERROR); + } + + qatomic_set(&cpu->exit_request, 0); + + return ret; +} + void *gunyah_cpu_thread_fn(void *arg) { CPUState *cpu =3D arg; =20 + rcu_register_thread(); + + bql_lock(); + qemu_thread_get_self(cpu->thread); + + cpu->thread_id =3D qemu_get_thread_id(); + cpu->neg.can_do_io =3D true; + current_cpu =3D cpu; + + gunyah_init_vcpu(cpu, &error_fatal); + + /* signal CPU creation */ + cpu_thread_signal_created(cpu); + qemu_guest_random_seed_thread_part2(cpu->random_seed); + do { - /* Do nothing */ + if (cpu_can_run(cpu)) { + gunyah_vcpu_exec(cpu); + } + qemu_wait_io_event(cpu); } while (!cpu->unplug || cpu_can_run(cpu)); =20 + gunyah_vcpu_destroy(cpu); + cpu_thread_signal_destroyed(cpu); + bql_unlock(); + rcu_unregister_thread(); return NULL; } + +static void do_gunyah_cpu_synchronize_post_reset(CPUState *cpu, + run_on_cpu_data arg) +{ + gunyah_arch_put_registers(cpu, 0); + cpu->vcpu_dirty =3D false; +} + +void gunyah_cpu_synchronize_post_reset(CPUState *cpu) +{ + run_on_cpu(cpu, do_gunyah_cpu_synchronize_post_reset, RUN_ON_CPU_NULL); +} diff --git a/target/arm/gunyah.c b/target/arm/gunyah.c index c33a0c0615..bbad2171a8 100644 --- a/target/arm/gunyah.c +++ b/target/arm/gunyah.c @@ -122,3 +122,21 @@ void gunyah_arm_fdt_customize(void *fdt, uint64_t mem_= base, g_free(nodename); } } + +int gunyah_arch_put_registers(CPUState *cs, int level) +{ + /* + * No support (yet) to set/get vCPU registers. + * + * We specify device-tree location via GH_VM_SET_DTB_CONFIG, which is + * passed on to RM. RM will inspect the device-tree before VM begins + * execution and makes arrangement (with hypervisor) for VM to receive= a + * pointer to device-tree via X0 register at boot time. + * + * Image entry point is assumed to be the beginning of slot containing + * device-tree, which seems to be true currently. In future, Gunyah co= uld + * add API to set boot CPU's register context. + */ + + return 0; +} --=20 2.25.1 From nobody Thu Sep 19 15:48:41 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=quicinc.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1715870248203209.79200103881942; Thu, 16 May 2024 07:37:28 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1s7cCN-0005Ep-7t; Thu, 16 May 2024 10:35:11 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s7cCD-0004tR-Hy; Thu, 16 May 2024 10:35:03 -0400 Received: from mx0b-0031df01.pphosted.com ([205.220.180.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s7cCB-0008PD-Q0; Thu, 16 May 2024 10:35:01 -0400 Received: from pps.filterd (m0279872.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 44G8LObO004082; Thu, 16 May 2024 14:34:58 GMT Received: from nalasppmta01.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3y2125m0au-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 16 May 2024 14:34:57 +0000 (GMT) Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 44GEYuJS027163 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 16 May 2024 14:34:56 GMT Received: from blr-ubuntu-31.qualcomm.com (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Thu, 16 May 2024 07:34:52 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s= qcppdkim1; bh=gn+BG1wXXQbLuvm78504UqR1HklffQD2CPYQ6ADrJJo=; b=N+ wC7hVQgzXl5ZHWYMNmTHKctu2UD0iclqj3Ost5+Lf9cXl29MrnZiMDPQBai88Z/d BST653CqUzgBO0sA1Hnd1U4/Huv/GdS6qtiXRxA5c7amrparrwlgnA3ZuDPxkoaa Sfvrsm7tCd5B3rrNvoVD60P/Ml1p9DbDK4B8azlN39IG6Xxy515Q/N2HTfVc79QB h4HR77jm0n4+i7Zw5D8qrpgL+fWE1QTUSNqD2TsXdK6+pK+u0+GUxAMZWU+PKwKd iM0lwQrgNgZHte0AA4q6oSk8duxznfiHveLV7kRqqFM8R1GN3/pAEXs0aS3nnly3 9UD8vvUcczqqbOvwK8/g== From: Srivatsa Vaddagiri To: , , , , CC: , , , , , , Subject: [RFC/PATCH v2 11/12] gunyah: Workarounds (NOT FOR MERGE) Date: Thu, 16 May 2024 14:33:55 +0000 Message-ID: <20240516143356.1739402-12-quic_svaddagi@quicinc.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240516143356.1739402-1-quic_svaddagi@quicinc.com> References: <20240516143356.1739402-1-quic_svaddagi@quicinc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: u1hrZTLcLXAbo-Nw50J5JD_gEa4EHEQW X-Proofpoint-ORIG-GUID: u1hrZTLcLXAbo-Nw50J5JD_gEa4EHEQW X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.650,FMLib:17.11.176.26 definitions=2024-05-16_07,2024-05-15_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 spamscore=0 lowpriorityscore=0 mlxlogscore=999 clxscore=1015 bulkscore=0 priorityscore=1501 impostorscore=0 phishscore=0 adultscore=0 suspectscore=0 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2405010000 definitions=main-2405160102 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=205.220.180.131; envelope-from=quic_svaddagi@quicinc.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1715870248815100002 Content-Type: text/plain; charset="utf-8" These are some work-arounds required temporarily until some limitations with Gunyah hypervisor are addressed. Signed-off-by: Srivatsa Vaddagiri --- include/sysemu/gunyah_int.h | 1 + accel/gunyah/gunyah-all.c | 18 ++++++++++++++++++ hw/arm/boot.c | 17 ++++++++++++++++- hw/arm/virt.c | 3 ++- 4 files changed, 37 insertions(+), 2 deletions(-) diff --git a/include/sysemu/gunyah_int.h b/include/sysemu/gunyah_int.h index ef82c6edd8..bdda430dbd 100644 --- a/include/sysemu/gunyah_int.h +++ b/include/sysemu/gunyah_int.h @@ -62,5 +62,6 @@ int gunyah_add_irqfd(int irqfd, int label, Error **errp); GUNYAHState *get_gunyah_state(void); int gunyah_arch_put_registers(CPUState *cs, int level); void gunyah_cpu_synchronize_post_reset(CPUState *cpu); +gunyah_slot *gunyah_find_slot_by_addr(uint64_t addr); =20 #endif /* GUNYAH_INT_H */ diff --git a/accel/gunyah/gunyah-all.c b/accel/gunyah/gunyah-all.c index 4c56dd8c73..bc106fbad6 100644 --- a/accel/gunyah/gunyah-all.c +++ b/accel/gunyah/gunyah-all.c @@ -158,6 +158,24 @@ static gunyah_slot *gunyah_find_overlap_slot(GUNYAHSta= te *s, return NULL; } =20 +gunyah_slot *gunyah_find_slot_by_addr(uint64_t addr) +{ + GUNYAHState *s =3D GUNYAH_STATE(current_accel()); + int i; + gunyah_slot *slot =3D NULL; + + gunyah_slots_lock(s); + for (i =3D 0; i < s->nr_slots; ++i) { + slot =3D &s->slots[i]; + if (slot->size && + (addr >=3D slot->start && addr <=3D slot->start + slot->size)) + break; + } + gunyah_slots_unlock(s); + + return slot; +} + /* Called with s->slots_lock held */ static gunyah_slot *gunyah_get_free_slot(GUNYAHState *s) { diff --git a/hw/arm/boot.c b/hw/arm/boot.c index 84ea6a807a..a29b2cb0f9 100644 --- a/hw/arm/boot.c +++ b/hw/arm/boot.c @@ -413,7 +413,8 @@ static int fdt_add_memory_node(void *fdt, uint32_t acel= ls, hwaddr mem_base, char *nodename; int ret; =20 - nodename =3D g_strdup_printf("/memory@%" PRIx64, mem_base); + /* Workaround until RM can parse memory nodes of type memory@XYZ. */ + nodename =3D g_strdup_printf("/memory"); qemu_fdt_add_subnode(fdt, nodename); qemu_fdt_setprop_string(fdt, nodename, "device_type", "memory"); ret =3D qemu_fdt_setprop_sized_cells(fdt, nodename, "reg", acells, mem= _base, @@ -661,6 +662,20 @@ int arm_load_dtb(hwaddr addr, const struct arm_boot_in= fo *binfo, binfo->modify_dtb(binfo, fdt); } =20 + /* + * Gunyah RM inspects and modifies device-tree (to provide additional + * information that VM may need). It depends on knowing total size res= erved + * for device-tree (i.e FDT_MAX_SIZE) and current size (via @totalsize= ). At + * this point however, @totalsize =3D FDT_MAX_SIZE, making RM think th= at there + * is no room for modification and fail to start VM. + * + * RM should ideally pack device-tree so that @totalsize reflects the = actual + * size before it attempts modification. Until RM is fixed, pack + * device-tree so that @toalsize reflects the actual size. + */ + + fdt_pack(fdt); + qemu_fdt_dumpdtb(fdt, size); =20 /* Put the DTB into the memory map as a ROM image: this will ensure diff --git a/hw/arm/virt.c b/hw/arm/virt.c index b0132beddd..5f3075e748 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -188,7 +188,8 @@ static const MemMapEntry base_memmap[] =3D { [VIRT_PCIE_PIO] =3D { 0x3eff0000, 0x00010000 }, [VIRT_PCIE_ECAM] =3D { 0x3f000000, 0x01000000 }, /* Actual RAM size depends on initial RAM and device memory settings */ - [VIRT_MEM] =3D { GiB, LEGACY_RAMLIMIT_BYTES }, + /* Workaround until Gunyah can accept mapping that starts from GiB */ + [VIRT_MEM] =3D { 2 * GiB, LEGACY_RAMLIMIT_BYTES }, }; =20 /* --=20 2.25.1 From nobody Thu Sep 19 15:48:41 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=quicinc.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1715870237964528.1371181094829; Thu, 16 May 2024 07:37:17 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1s7cDA-0006Zk-NW; Thu, 16 May 2024 10:36:02 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s7cCN-0005I1-KN; Thu, 16 May 2024 10:35:11 -0400 Received: from mx0b-0031df01.pphosted.com ([205.220.180.131]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s7cCK-0008Qs-FC; Thu, 16 May 2024 10:35:11 -0400 Received: from pps.filterd (m0279870.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 44G84bEw007625; Thu, 16 May 2024 14:35:02 GMT Received: from nalasppmta05.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3y47f45ubm-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 16 May 2024 14:35:02 +0000 (GMT) Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA05.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 44GEZ0uu009021 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 16 May 2024 14:35:01 GMT Received: from blr-ubuntu-31.qualcomm.com (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Thu, 16 May 2024 07:34:56 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s= qcppdkim1; bh=3Aas5Srfo2SnprTQJac8rs6PzK/6A1BIOIIX2CJw7t0=; b=X7 zFEPuaLLN6EAaVkv2Qdxzuv/ZoKE3MhC4ZZWLhXMdB1VFlfbZNjpnfSLxMmM5XfJ YO1ZWYqHAOz0KVcgQNcY7LSk0HaVWOR/6U37kdeChwWYi3DchKHuOlzIZOTYsnaO m0bEBMlmTgX6XgRR1xulkq3xOXaMaiNWnNbx8gBojuIt6r3AdZwqXoOd4mQCEVXv BldyKBXJ/P/B+DLma+Wwu09wAp8uh/n7j0QX+xgpUfgfclfS5DrxTVr1SMGpmfgL nibrY8Doid9Qt0c+Bo+9IOm8xN/e9psjWICPHLH152LPXZh7a4s2K24GMXS6oOk5 xqXJYOXOMxeZw8rA5SjQ== From: Srivatsa Vaddagiri To: , , , , CC: , , , , , , Subject: [RFC/PATCH v2 12/12] gunyah: Documentation Date: Thu, 16 May 2024 14:33:56 +0000 Message-ID: <20240516143356.1739402-13-quic_svaddagi@quicinc.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240516143356.1739402-1-quic_svaddagi@quicinc.com> References: <20240516143356.1739402-1-quic_svaddagi@quicinc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: amMviz2bTaM6VHRI06uY_cNDmn7mZIOd X-Proofpoint-ORIG-GUID: amMviz2bTaM6VHRI06uY_cNDmn7mZIOd X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.650,FMLib:17.11.176.26 definitions=2024-05-16_07,2024-05-15_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 phishscore=0 bulkscore=0 clxscore=1015 malwarescore=0 adultscore=0 lowpriorityscore=0 impostorscore=0 suspectscore=0 mlxlogscore=999 mlxscore=0 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2405010000 definitions=main-2405160102 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=205.220.180.131; envelope-from=quic_svaddagi@quicinc.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1715870238841100005 Content-Type: text/plain; charset="utf-8" Add gunyah.rst that provide some informaiton on how to build and test 'gunyah' accelerator with open-source Gunyah hypervisor. Signed-off-by: Srivatsa Vaddagiri --- MAINTAINERS | 1 + docs/system/arm/gunyah.rst | 326 +++++++++++++++++++++++++++++++++++++ 2 files changed, 327 insertions(+) create mode 100644 docs/system/arm/gunyah.rst diff --git a/MAINTAINERS b/MAINTAINERS index c42fdc2afd..2f69114814 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -532,6 +532,7 @@ F: include/sysemu/gunyah.h F: include/sysemu/gunyah_int.h F: target/arm/arm_gicv3_gunyah.c F: hw/intc/arm_gicv3_gunyah.c +F: docs/system/arm/gunyah.rst =20 WHPX CPUs M: Sunil Muthuswamy diff --git a/docs/system/arm/gunyah.rst b/docs/system/arm/gunyah.rst new file mode 100644 index 0000000000..971bfd30c1 --- /dev/null +++ b/docs/system/arm/gunyah.rst @@ -0,0 +1,326 @@ +'gunyah' accelerator (``gunyah``) +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D + +Gunyah is a high performance, scalable and flexible hypervisor built for +demanding battery powered, real-time, safety and security use cases. + +The Gunyah Hypervisor open source project provides a reference Type-1 hype= rvisor +configuration suitable for general purpose hosting of multiple trusted and +dependent VMs. Further information on open-source version of Gunyah Hyperv= isor +can be obtained from: + +https://github.com/quic/gunyah-hypervisor + +To get started with open-source version of Gunyah Hypervisor, refer to the +instructions available at: + +https://github.com/quic/gunyah-support-scripts + +Build and testing +----------------- + +Configure and build Qemu +```````````````````````` + +Apply the proposed patches for 'gunyah' accelerator support in Qemu and bu= ild +it. + +.. code-block:: bash + + $ ./configure --target-list=3Daarch64-softmmu --enable-debug --ena= ble-gunyah --static + $ make -j4 + $ mv build/qemu-system-aarch64 build/qemu-gunyah + +Clone gunyah-support scripts +```````````````````````````` + +.. code-block:: bash + + $ git clone https://github.com/quic/gunyah-support-scripts + +Instructions in this document to build and test Gunyah hypervisor was vali= dated +with the latest commit in gunyah-support-scripts being: + +6a959c8 tools: Fix permission and version related + +Patch gunyah-support scripts +```````````````````````````` +Apply below patch to gunyah-support scripts. This is required **temporaril= y** until +the scripts can be updated to support Qemu as VMM (in addition to CrosVM) = and +also to fix some issues. + +.. code-block:: bash + + diff --git a/scripts/build-docker-img.sh b/scripts/build-docker-img.sh + index 98e7881..a6aa774 100755 + --- a/scripts/build-docker-img.sh + +++ b/scripts/build-docker-img.sh + @@ -38,7 +38,7 @@ DOCKER_OPTIONS=3D" build . " + #DOCKER_OPTIONS+=3D" --progress=3Dplain " + + # no-cache alleviates some install errors for not finding some packa= ges + -#DOCKER_OPTIONS+=3D" --no-cache " + +DOCKER_OPTIONS+=3D" --no-cache " + + # user environment related so the permissions will same as the host m= achine + DOCKER_OPTIONS+=3D" --build-arg UID=3D$(id -u) " + diff --git a/scripts/core-utils/clone-linux.sh b/scripts/core-utils/cl= one-linux.sh + index 714162e..2b79bc7 100755 + --- a/scripts/core-utils/clone-linux.sh + +++ b/scripts/core-utils/clone-linux.sh + @@ -26,8 +26,7 @@ cd ${LINUX_DIR}/src + LINUX_VER=3D"v6.5" + echo -e "\nCloning Linux ${LINUX_VER}:" + git clone \ + - --depth=3D1 --progress -c advice.detachedHead=3Dfalse \ + - -b ${LINUX_VER} \ + + --progress -c advice.detachedHead=3Dfalse \ + https://github.com/torvalds/linux.git || { + echo "Unable to clone Linux" + return + @@ -58,7 +57,11 @@ echo "Installed b4 to ${LINUX_DIR}/tools/b4" + + cd ${LINUX_DIR}/src/linux + + -${LINUX_DIR}/tools/b4/b4.sh shazam https://lore.kernel.org/all/202306= 13172054.3959700-1-quic_eberman@quicinc.com/ + + + +${LINUX_DIR}/tools/b4/b4.sh am https://lore.kernel.org/all/2023061317= 2054.3959700-1-quic_eberman@quicinc.com/ + +git checkout -b v14_20230613_quic_eberman_quicinc_com 858fd168a95c5b9= 669aac8db6c14a9aeab446375 + +git am ./v14_20230613_quic_eberman_drivers_for_gunyah_hypervisor.mbx + + + echo "Applied gunyah drivers patch successfully" + + echo "Generate gunyah.config" + diff --git a/scripts/install-wsp-imgs.sh b/scripts/install-wsp-imgs.sh + index 12150f3..32107e0 100755 + --- a/scripts/install-wsp-imgs.sh + +++ b/scripts/install-wsp-imgs.sh + @@ -100,15 +100,23 @@ if [[ ! -f ${WORKSPACE}/run-qemu.sh ]]; then + cp ${BASE_DIR}/utils/run-qemu.sh ${WORKSPACE}/run-qemu.sh + fi + + -if [[ ! -f ${WORKSPACE}/crosvm/crosvm ]]; then + - mkdir -p ${WORKSPACE}/crosvm + - cd ${WORKSPACE}/crosvm + - . clone-crosvm.sh + - . build-crosvm.sh + - + - echo -e 'export CROSVM_FILE_PATH=3D${WORKSPACE}/crosvm/crosvm' >>= ${WORKSPACE}/.wsp-env + - . ${WORKSPACE}/.wsp-env + -fi + +cp ${BASE_DIR}/utils/qemu-gunyah ${WORKSPACE}/ + +cp ${BASE_DIR}/utils/efi-virtio.rom ${WORKSPACE}/ + +cp ${BASE_DIR}/utils/en-us ${WORKSPACE}/ + +cp ${BASE_DIR}/utils/svm_disk.img ${WORKSPACE}/ + + + +#if [[ ! -f ${WORKSPACE}/crosvm/crosvm ]]; then + +# mkdir -p ${WORKSPACE}/crosvm + +# cd ${WORKSPACE}/crosvm + +# . clone-crosvm.sh + +# . build-crosvm.sh + + + +# echo -e 'export CROSVM_FILE_PATH=3D${WORKSPACE}/crosvm/crosvm' >= > ${WORKSPACE}/.wsp-env + +# . ${WORKSPACE}/.wsp-env + +#fi + + + +echo -e 'export CROSVM_FILE_PATH=3D${WORKSPACE}/qemu-gunyah' >> ${WOR= KSPACE}/.wsp-env + +. ${WORKSPACE}/.wsp-env + + if [[ ! -f ${WORKSPACE}/rootfs/rootfs-extfs-disk.img ]]; then + echo -e "\nrootfs image not found, creating new one" + diff --git a/scripts/migrate-tools-to-vol.sh b/scripts/migrate-tools-t= o-vol.sh + index e5240c6..330f807 100755 + --- a/scripts/migrate-tools-to-vol.sh + +++ b/scripts/migrate-tools-to-vol.sh + @@ -76,14 +76,14 @@ if [[ ! -d ${WORKSPACE}/linux ]]; then + echo "Done copying linux files" + fi + + -if [[ -d ~/share/docker-share/crosvm ]]; then + - mv ~/share/docker-share/crosvm ${WORKSPACE}/ + - echo "Found crosvm, moved into workspace folder" + - mv ${WORKSPACE}/crosvm/crosvm ${WORKSPACE}/crosvm/crosvm-src + - cp ${WORKSPACE}/crosvm/crosvm-src/crosvm ${WORKSPACE}/crosvm/cro= svm + - rm -rf ${WORKSPACE}/crosvm/crosvm-src + - echo -e 'export CROSVM_FILE_PATH=3D${WORKSPACE}/crosvm/crosvm' >>= ${WORKSPACE}/.wsp-env + -fi + +#if [[ -d ~/share/docker-share/crosvm ]]; then + +# mv ~/share/docker-share/crosvm ${WORKSPACE}/ + +# echo "Found crosvm, moved into workspace folder" + +# mv ${WORKSPACE}/crosvm/crosvm ${WORKSPACE}/crosvm/crosvm-src + +# cp ${WORKSPACE}/crosvm/crosvm-src/crosvm ${WORKSPACE}/crosvm/cr= osvm + +# rm -rf ${WORKSPACE}/crosvm/crosvm-src + +# echo -e 'export CROSVM_FILE_PATH=3D${WORKSPACE}/crosvm/crosvm' >= > ${WORKSPACE}/.wsp-env + +#fi + + if [[ -d ~/share/docker-share/rootfs ]]; then + mv ~/share/docker-share/rootfs ${WORKSPACE}/ + diff --git a/scripts/utils/build-rootfs-img.sh b/scripts/utils/build-r= ootfs-img.sh + index d110965..9ffe530 100755 + --- a/scripts/utils/build-rootfs-img.sh + +++ b/scripts/utils/build-rootfs-img.sh + @@ -177,6 +177,9 @@ if [[ ! -f ${SVM_DESTINATION}/svm.sh ]]; then + echo -e '--params "rw root=3D/dev/ram rdinit=3D/sbin/init earlypri= ntk=3Dserial panic=3D0" \\' >> ./svm.sh + echo -e ' /usr/gunyah/Image $@\n' >> ./svm.sh + + + sudo cp ${WORKSPACE}/svm_disk.img ${SVM_DESTINATION} + + sudo cp ${WORKSPACE}/efi-virtio.rom ${SVM_DESTINATION} + + sudo cp ${WORKSPACE}/en-us ${SVM_DESTINATION} + sudo cp ./svm.sh ${SVM_DESTINATION} + rm -f ./svm.sh + sudo chmod 0775 ${SVM_DESTINATION}/svm.sh + @@ -216,13 +219,15 @@ if [[ ! -f ${ROOTFS_REFERENCE_DIR}/lib/libgcc_s.= so.1 ]]; then + export MACHINE=3Dqemuarm64 + export DISTRO=3Drpb + + - mkdir ${ROOTFS_BASE}/oe-rpb + + mkdir -p ${ROOTFS_BASE}/oe-rpb + cd ${ROOTFS_BASE}/oe-rpb + + # fetch + ~/bin/repo init -u https://github.com/96boards/oe-rpb-manifest.git= -b qcom/master + ~/bin/repo sync + + + rm layers/meta-qcom/recipes-kernel/linux/linux-yocto_6.6.bbappend + + + # add config for libgcc and other virtualization options + echo -e "\n" > ./extra_local.conf + echo "INHERIT +=3D 'buildstats buildstats-summary'" >> ./extra_loc= al.conf + @@ -269,5 +274,5 @@ if [[ -f ${WORKSPACE}/rootfs/rootfs-extfs-disk.img= ]]; then + else + echo "Creating rootfs image file from reference : `pwd`" + cd ${WORKSPACE}/rootfs + - . ~/utils/bldextfs.sh -f ${WORKSPACE}/rootfs/reference -o ${WORKSP= ACE}/rootfs/rootfs-extfs-disk.img -s 800M + + . ~/utils/bldextfs.sh -f ${WORKSPACE}/rootfs/reference -o ${WORKSP= ACE}/rootfs/rootfs-extfs-disk.img -s 2G + fi + +Copy Qemu files +``````````````` + +Copy Qemu and related files to `utils` directory of gunyah-support scripts. + +.. code-block:: bash + + # qemu-gunyah is nothing but qemu-system-aarch64 binary that suppo= rts gunyah accelerator + cp qemu-gunyah scripts/utils + + # efi-virtio.rom is found under `pc-bios` directory of Qemu + cp efi-virtio.rom scripts/utils + + # en-us is found under `pc-bios/keymaps` directory of Qemu + cp en-us scripts/utils + + # svm_disk.img will serve as the root disk for VM. It will have in= it and + # other programs that are required to boot VM. It can be prepared = from + # any aarch64-based distro such as Ubuntu. + cp svm_disk.img scripts/utils + +Build docker image +`````````````````` + +.. code-block:: bash + + cd scripts + ./build-docker-img.sh + +Rest of steps below need to be run inside docker. Launch the docker as: + +.. code-block:: bash + + # SOME_FOLDER is any directory on host. This will be accessible fr= om + # inside docker and is useful to share files between host and dock= er + # environments. + export HOST_TO_DOCKER_SHARED_DIR=3DSOME_FOLDER + cd scripts + ./run-docker.sh + +Clone and build a Gunyah Hypervisor image +````````````````````````````````````````` + +.. code-block:: bash + + cd ~/share/gunyah + clone-gunyah.sh + +Cloned sources includes that for Resource Manager (RM) under `resource-man= ager` +directory. RM is a privileged VM that acts as an extension of Gunyah +hypervisor and assists the hypervisor in various tasks related to creation= and +management of VMs. More information on RM is provided at: + +https://github.com/quic/gunyah-resource-manager + +Gunyah hypervisor source is available under `hyp` directory. + +Patch Gunyah hypervisor and Resource Manager +```````````````````````````````````````````` + +Apply below changes to hypervisor and RM on which 'gunyah' Qemu accelerator +currently depends. These changes are being discussed with maintainers and = if +accepted this document will be modified appropriately. + +RM patch (in 'resource-manager' directory): + +.. code-block:: bash + + diff --git a/src/vm_creation/vm_creation.c b/src/vm_creation/vm_creati= on.c + index df8edfb..b73b37e 100644 + --- a/src/vm_creation/vm_creation.c + +++ b/src/vm_creation/vm_creation.c + @@ -510,7 +510,10 @@ process_dtb(vm_t *vm) + // Estimate a final dtb size after applying the overlay. + size_t original_dtb_size =3D + util_balign_up(fdt_totalsize(temp_addr), sizeof(uint32= _t)); + - size_t final_dtb_size =3D original_dtb_size + dtbo_ret.size; + + size_t final_dtb_size =3D util_balign_up(original_dtb_size + d= tbo_ret.size, 8); + +Hypervisor patch (in 'hyp' directory): + +.. code-block:: bash + + diff --git a/config/platform/qemu.conf b/config/platform/qemu.conf + index bc612f2..9a292a4 100644 + --- a/config/platform/qemu.conf + +++ b/config/platform/qemu.conf + @@ -35,7 +35,7 @@ configs HLOS_RAM_FS_BASE=3D0x40800000 + configs PLATFORM_HEAP_PRIVATE_SIZE=3D0x200000 + configs PLATFORM_RW_DATA_SIZE=3D0x200000 + configs PLATFORM_ROOTVM_LMA_BASE=3D0x80480000U + -configs PLATFORM_ROOTVM_LMA_SIZE=3D0xa0000U + +configs PLATFORM_ROOTVM_LMA_SIZE=3D0x100000U + configs PLATFORM_PHYS_ADDRESS_BITS=3D36 + configs PLATFORM_VM_ADDRESS_SPACE_BITS=3D36 + configs PLATFORM_PGTABLE_4K_GRANULE=3D1 + +Build Gunyah hypervisor +``````````````````````` + +.. code-block:: bash + + cd ~/share + build-gunyah.sh qemu + +Launch host-VM under Gunyah hypervisor +`````````````````````````````````````` + +.. code-block:: bash + + cd ~/mnt/workspace + run-qemu.sh dtb + run-qemu.sh + +Running a secondary VM with Qemu as VMM +``````````````````````````````````````` + +.. code-block:: bash + + $ cd /usr/gunyah + $ ./qemu-gunyah -cpu cortex-a57 -nographic -hda svm_disk.img -m 25= 6M -smp cpus=3D8 --accel gunyah -machine virt,highmem=3Doff -append "rw roo= t=3D/dev/vda rdinit=3D/sbin/init earlyprintk=3Dserial panic=3D0" -kernel = ./Image + +Limitations +----------- + +* Linux Gunyah kernel driver published upstream does not yet support + confidential VM. Confidential VM related changes proposed in this patch = series + has been tested on a variant of driver that is available in Android Comm= on + kernel. Details to test confidential VM will be provided once the upstre= am + Gunyah driver supports same. --=20 2.25.1