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([149.14.240.163]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-41fccee9292sm222611855e9.37.2024.05.15.00.53.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 15 May 2024 00:53:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1715759593; x=1716364393; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=cTgwDkKTKvYMYNq8Uet4oTtWVQWuFqOkSWxaQArY+XQ=; b=Xk7gApZQVT/s981qYPLZYzXcApwprz71yHEuOKuhHh25m+NtaIipJskodOjhfLX7zZ M1KfW9dvz/vjk9D7tT/8TsMDVOKZpDkQPK8vlNQZj16il3jKFcuV6MLkRuG9xALFv4h1 YMftibV9tSa9aBfdkzf9eGr0pmlelW5RKSifzNnYP3TlPY/PrDRYuD/nDVhZwWpRGpBn wcbxAw3tBbq16Ue2NEL83oO4yP1RMaUlphGReOioIf8G3GASzRpvo6kVfAPqpigS5X0U nfGyx7YwdGHmPps6LbHZ/xm060VuGTXdlWi+bwFRBfdczf1wqQSnNt9I42OcXEW6TWaR CPfg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1715759593; x=1716364393; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=cTgwDkKTKvYMYNq8Uet4oTtWVQWuFqOkSWxaQArY+XQ=; b=KCqrff5hXEWEAtPfE4O8KGae9tqs9PqCOlVzoCeh0skEl5oQxCFi59xzsY3z9N1+Cn 266rcVmWDEI5+RDpayaqZUPOtE7XOYpgxO8JlIu23tvb4d2OB83K6St6Swn5UJMLm5OQ AIIrArd0R4xJfxlD5X52bLVXaNB0M87eweiRv7dBAAjYQzREzCbztTDC/73cDL5DKH9I CdQ2RdY1kbKMWPIUE7lefsskO6BZ00ssltf1aenDa0gtBWKu9yVc87NY+0LbQVdVND0m sAnLhr/C5cVMg7N1hooU0hleSk+JSelxFQZcnWRKFn2WUz46gbYQZudYHUAjC8/PxLcV cvAA== X-Gm-Message-State: AOJu0Yyc4zACiP7BAD/++I0Lophc24mV2DIrChLn+lATyCwxIoMKjreH xre7raiXDmr2C1c/PCCNhblR7+R1RZ1Fngrf1Gj1y+P2lyZFsp4nwcHNFeqtPJuzPhmPt/waXM/ HMgo= X-Google-Smtp-Source: AGHT+IG1IHyaS3pCmocit0fsBEC59lIXAGawYVGH3BJd6HRaXYGG0cEDZEtaxvr6PFrx6IymH4oMfw== X-Received: by 2002:a05:600c:4f83:b0:41f:b0e7:f299 with SMTP id 5b1f17b1804b1-41fea93a3cemr114580065e9.9.1715759592918; Wed, 15 May 2024 00:53:12 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: qemu-stable@nongnu.org, Song Gao Subject: [PULL 34/34] tcg/loongarch64: Fill out tcg_out_{ld, st} for vector regs Date: Wed, 15 May 2024 09:52:47 +0200 Message-Id: <20240515075247.68024-35-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240515075247.68024-1-richard.henderson@linaro.org> References: <20240515075247.68024-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::32d; envelope-from=richard.henderson@linaro.org; helo=mail-wm1-x32d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZM-MESSAGEID: 1715759659202100001 Content-Type: text/plain; charset="utf-8" TCG register spill/fill uses tcg_out_ld/st with all types, not necessarily going through INDEX_op_{ld,st}_vec. Cc: qemu-stable@nongnu.org Fixes: 16288ded944 ("tcg/loongarch64: Lower basic tcg vec ops to LSX") Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2336 Signed-off-by: Richard Henderson Reviewed-by: Song Gao Tested-by: Song Gao --- tcg/loongarch64/tcg-target.c.inc | 103 ++++++++++++++++++++++++------- 1 file changed, 80 insertions(+), 23 deletions(-) diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.= c.inc index 69c5b8ac4f..06ca1ab11c 100644 --- a/tcg/loongarch64/tcg-target.c.inc +++ b/tcg/loongarch64/tcg-target.c.inc @@ -808,18 +808,88 @@ static void tcg_out_ldst(TCGContext *s, LoongArchInsn= opc, TCGReg data, } } =20 -static void tcg_out_ld(TCGContext *s, TCGType type, TCGReg arg, - TCGReg arg1, intptr_t arg2) +static void tcg_out_ld(TCGContext *s, TCGType type, TCGReg dest, + TCGReg base, intptr_t offset) { - bool is_32bit =3D type =3D=3D TCG_TYPE_I32; - tcg_out_ldst(s, is_32bit ? OPC_LD_W : OPC_LD_D, arg, arg1, arg2); + switch (type) { + case TCG_TYPE_I32: + if (dest < TCG_REG_V0) { + tcg_out_ldst(s, OPC_LD_W, dest, base, offset); + } else { + tcg_out_dupm_vec(s, TCG_TYPE_I128, MO_32, dest, base, offset); + } + break; + case TCG_TYPE_I64: + if (dest < TCG_REG_V0) { + tcg_out_ldst(s, OPC_LD_D, dest, base, offset); + } else { + tcg_out_dupm_vec(s, TCG_TYPE_I128, MO_64, dest, base, offset); + } + break; + case TCG_TYPE_V128: + if (-0x800 <=3D offset && offset <=3D 0x7ff) { + tcg_out_opc_vld(s, dest, base, offset); + } else { + tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_TMP0, offset); + tcg_out_opc_vldx(s, dest, base, TCG_REG_TMP0); + } + break; + default: + g_assert_not_reached(); + } } =20 -static void tcg_out_st(TCGContext *s, TCGType type, TCGReg arg, - TCGReg arg1, intptr_t arg2) +static void tcg_out_st(TCGContext *s, TCGType type, TCGReg src, + TCGReg base, intptr_t offset) { - bool is_32bit =3D type =3D=3D TCG_TYPE_I32; - tcg_out_ldst(s, is_32bit ? OPC_ST_W : OPC_ST_D, arg, arg1, arg2); + switch (type) { + case TCG_TYPE_I32: + if (src < TCG_REG_V0) { + tcg_out_ldst(s, OPC_ST_W, src, base, offset); + } else { + /* TODO: Could use fst_s, fstx_s */ + if (offset < -0x100 || offset > 0xff || (offset & 3)) { + if (-0x800 <=3D offset && offset <=3D 0x7ff) { + tcg_out_opc_addi_d(s, TCG_REG_TMP0, base, offset); + } else { + tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_TMP0, offset); + tcg_out_opc_add_d(s, TCG_REG_TMP0, TCG_REG_TMP0, base); + } + base =3D TCG_REG_TMP0; + offset =3D 0; + } + tcg_out_opc_vstelm_w(s, src, base, offset, 0); + } + break; + case TCG_TYPE_I64: + if (src < TCG_REG_V0) { + tcg_out_ldst(s, OPC_ST_D, src, base, offset); + } else { + /* TODO: Could use fst_d, fstx_d */ + if (offset < -0x100 || offset > 0xff || (offset & 7)) { + if (-0x800 <=3D offset && offset <=3D 0x7ff) { + tcg_out_opc_addi_d(s, TCG_REG_TMP0, base, offset); + } else { + tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_TMP0, offset); + tcg_out_opc_add_d(s, TCG_REG_TMP0, TCG_REG_TMP0, base); + } + base =3D TCG_REG_TMP0; + offset =3D 0; + } + tcg_out_opc_vstelm_d(s, src, base, offset, 0); + } + break; + case TCG_TYPE_V128: + if (-0x800 <=3D offset && offset <=3D 0x7ff) { + tcg_out_opc_vst(s, src, base, offset); + } else { + tcg_out_movi(s, TCG_TYPE_PTR, TCG_REG_TMP0, offset); + tcg_out_opc_vstx(s, src, base, TCG_REG_TMP0); + } + break; + default: + g_assert_not_reached(); + } } =20 static bool tcg_out_sti(TCGContext *s, TCGType type, TCGArg val, @@ -1740,7 +1810,6 @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode o= pc, { TCGType type =3D vecl + TCG_TYPE_V64; TCGArg a0, a1, a2, a3; - TCGReg temp =3D TCG_REG_TMP0; TCGReg temp_vec =3D TCG_VEC_TMP0; =20 static const LoongArchInsn cmp_vec_insn[16][4] =3D { @@ -1820,22 +1889,10 @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode= opc, =20 switch (opc) { case INDEX_op_st_vec: - /* Try to fit vst imm */ - if (-0x800 <=3D a2 && a2 <=3D 0x7ff) { - tcg_out_opc_vst(s, a0, a1, a2); - } else { - tcg_out_movi(s, TCG_TYPE_I64, temp, a2); - tcg_out_opc_vstx(s, a0, a1, temp); - } + tcg_out_st(s, type, a0, a1, a2); break; case INDEX_op_ld_vec: - /* Try to fit vld imm */ - if (-0x800 <=3D a2 && a2 <=3D 0x7ff) { - tcg_out_opc_vld(s, a0, a1, a2); - } else { - tcg_out_movi(s, TCG_TYPE_I64, temp, a2); - tcg_out_opc_vldx(s, a0, a1, temp); - } + tcg_out_ld(s, type, a0, a1, a2); break; case INDEX_op_and_vec: tcg_out_opc_vand_v(s, a0, a1, a2); --=20 2.34.1