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Tsirkin" , Mahmoud Mandour Subject: [PATCH 01/11] tests/tcg: don't append QEMU_OPTS for armv6m-undef test Date: Tue, 14 May 2024 18:42:43 +0100 Message-Id: <20240514174253.694591-2-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240514174253.694591-1-alex.bennee@linaro.org> References: <20240514174253.694591-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::631; envelope-from=alex.bennee@linaro.org; helo=mail-ej1-x631.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1715708681244100003 We don't want to build on the default machine setup here but define a custom one for the microbit. Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Michael S. Tsirkin Reviewed-by: Pierrick Bouvier --- tests/tcg/arm/Makefile.softmmu-target | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tests/tcg/arm/Makefile.softmmu-target b/tests/tcg/arm/Makefile= .softmmu-target index 4c9264057f..39e01ce49d 100644 --- a/tests/tcg/arm/Makefile.softmmu-target +++ b/tests/tcg/arm/Makefile.softmmu-target @@ -16,7 +16,7 @@ test-armv6m-undef: test-armv6m-undef.S $< -o $@ -nostdlib -N -static \ -T $(ARM_SRC)/$@.ld =20 -run-test-armv6m-undef: QEMU_OPTS+=3D-semihosting -M microbit -kernel +run-test-armv6m-undef: QEMU_OPTS=3D-semihosting-config enable=3Don,target= =3Dnative,chardev=3Doutput -M microbit -kernel =20 ARM_TESTS+=3Dtest-armv6m-undef =20 --=20 2.39.2 From nobody Mon Nov 25 09:38:16 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; 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Tsirkin" , Mahmoud Mandour Subject: [PATCH 02/11] scripts/update-linux-header.sh: be more src tree friendly Date: Tue, 14 May 2024 18:42:44 +0100 Message-Id: <20240514174253.694591-3-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240514174253.694591-1-alex.bennee@linaro.org> References: <20240514174253.694591-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::62a; envelope-from=alex.bennee@linaro.org; helo=mail-ej1-x62a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1715708713523100001 Running "install_headers" in the Linux source tree is fairly unfriendly as out-of-tree builds will start complaining about the kernel source being non-pristine. As we have a temporary directory for the install we should also do the build step here. So now we have: $tmpdir/ $blddir/ $hdrdir/ Signed-off-by: Alex Benn=C3=A9e Message-Id: <20240510111802.241284-1-alex.bennee@linaro.org> Reviewed-by: Michael S. Tsirkin Reviewed-by: Pierrick Bouvier --- scripts/update-linux-headers.sh | 80 +++++++++++++++++---------------- 1 file changed, 41 insertions(+), 39 deletions(-) diff --git a/scripts/update-linux-headers.sh b/scripts/update-linux-headers= .sh index 36f3e91fe4..8963c39189 100755 --- a/scripts/update-linux-headers.sh +++ b/scripts/update-linux-headers.sh @@ -27,6 +27,8 @@ # types like "__u64". This work is done in the cp_portable function. =20 tmpdir=3D$(mktemp -d) +hdrdir=3D"$tmpdir/headers" +blddir=3D"$tmpdir/build" linux=3D"$1" output=3D"$2" =20 @@ -110,56 +112,56 @@ for arch in $ARCHLIST; do arch_var=3DARCH fi =20 - make -C "$linux" INSTALL_HDR_PATH=3D"$tmpdir" $arch_var=3D$arch header= s_install + make -C "$linux" O=3D"$blddir" INSTALL_HDR_PATH=3D"$hdrdir" $arch_var= =3D$arch headers_install =20 rm -rf "$output/linux-headers/asm-$arch" mkdir -p "$output/linux-headers/asm-$arch" for header in kvm.h unistd.h bitsperlong.h mman.h; do - cp "$tmpdir/include/asm/$header" "$output/linux-headers/asm-$arch" + cp "$hdrdir/include/asm/$header" "$output/linux-headers/asm-$arch" done =20 if [ $arch =3D mips ]; then - cp "$tmpdir/include/asm/sgidefs.h" "$output/linux-headers/asm-mips= /" - cp "$tmpdir/include/asm/unistd_o32.h" "$output/linux-headers/asm-m= ips/" - cp "$tmpdir/include/asm/unistd_n32.h" "$output/linux-headers/asm-m= ips/" - cp "$tmpdir/include/asm/unistd_n64.h" "$output/linux-headers/asm-m= ips/" + cp "$hdrdir/include/asm/sgidefs.h" "$output/linux-headers/asm-mips= /" + cp "$hdrdir/include/asm/unistd_o32.h" "$output/linux-headers/asm-m= ips/" + cp "$hdrdir/include/asm/unistd_n32.h" "$output/linux-headers/asm-m= ips/" + cp "$hdrdir/include/asm/unistd_n64.h" "$output/linux-headers/asm-m= ips/" fi if [ $arch =3D powerpc ]; then - cp "$tmpdir/include/asm/unistd_32.h" "$output/linux-headers/asm-po= werpc/" - cp "$tmpdir/include/asm/unistd_64.h" "$output/linux-headers/asm-po= werpc/" + cp "$hdrdir/include/asm/unistd_32.h" "$output/linux-headers/asm-po= werpc/" + cp "$hdrdir/include/asm/unistd_64.h" "$output/linux-headers/asm-po= werpc/" fi =20 rm -rf "$output/include/standard-headers/asm-$arch" mkdir -p "$output/include/standard-headers/asm-$arch" if [ $arch =3D s390 ]; then - cp_portable "$tmpdir/include/asm/virtio-ccw.h" "$output/include/st= andard-headers/asm-s390/" - cp "$tmpdir/include/asm/unistd_32.h" "$output/linux-headers/asm-s3= 90/" - cp "$tmpdir/include/asm/unistd_64.h" "$output/linux-headers/asm-s3= 90/" + cp_portable "$hdrdir/include/asm/virtio-ccw.h" "$output/include/st= andard-headers/asm-s390/" + cp "$hdrdir/include/asm/unistd_32.h" "$output/linux-headers/asm-s3= 90/" + cp "$hdrdir/include/asm/unistd_64.h" "$output/linux-headers/asm-s3= 90/" fi if [ $arch =3D arm ]; then - cp "$tmpdir/include/asm/unistd-eabi.h" "$output/linux-headers/asm-= arm/" - cp "$tmpdir/include/asm/unistd-oabi.h" "$output/linux-headers/asm-= arm/" - cp "$tmpdir/include/asm/unistd-common.h" "$output/linux-headers/as= m-arm/" + cp "$hdrdir/include/asm/unistd-eabi.h" "$output/linux-headers/asm-= arm/" + cp "$hdrdir/include/asm/unistd-oabi.h" "$output/linux-headers/asm-= arm/" + cp "$hdrdir/include/asm/unistd-common.h" "$output/linux-headers/as= m-arm/" fi if [ $arch =3D arm64 ]; then - cp "$tmpdir/include/asm/sve_context.h" "$output/linux-headers/asm-= arm64/" + cp "$hdrdir/include/asm/sve_context.h" "$output/linux-headers/asm-= arm64/" fi if [ $arch =3D x86 ]; then - cp "$tmpdir/include/asm/unistd_32.h" "$output/linux-headers/asm-x8= 6/" - cp "$tmpdir/include/asm/unistd_x32.h" "$output/linux-headers/asm-x= 86/" - cp "$tmpdir/include/asm/unistd_64.h" "$output/linux-headers/asm-x8= 6/" - cp_portable "$tmpdir/include/asm/kvm_para.h" "$output/include/stan= dard-headers/asm-$arch" + cp "$hdrdir/include/asm/unistd_32.h" "$output/linux-headers/asm-x8= 6/" + cp "$hdrdir/include/asm/unistd_x32.h" "$output/linux-headers/asm-x= 86/" + cp "$hdrdir/include/asm/unistd_64.h" "$output/linux-headers/asm-x8= 6/" + cp_portable "$hdrdir/include/asm/kvm_para.h" "$output/include/stan= dard-headers/asm-$arch" # Remove everything except the macros from bootparam.h avoiding the # unnecessary import of several video/ist/etc headers sed -e '/__ASSEMBLY__/,/__ASSEMBLY__/d' \ - "$tmpdir/include/asm/bootparam.h" > "$tmpdir/bootparam.h" - cp_portable "$tmpdir/bootparam.h" \ + "$hdrdir/include/asm/bootparam.h" > "$hdrdir/bootparam.h" + cp_portable "$hdrdir/bootparam.h" \ "$output/include/standard-headers/asm-$arch" - cp_portable "$tmpdir/include/asm/setup_data.h" \ + cp_portable "$hdrdir/include/asm/setup_data.h" \ "$output/standard-headers/asm-x86" fi if [ $arch =3D riscv ]; then - cp "$tmpdir/include/asm/ptrace.h" "$output/linux-headers/asm-riscv= /" + cp "$hdrdir/include/asm/ptrace.h" "$output/linux-headers/asm-riscv= /" fi done arch=3D @@ -169,13 +171,13 @@ mkdir -p "$output/linux-headers/linux" for header in const.h stddef.h kvm.h vfio.h vfio_ccw.h vfio_zdev.h vhost.h= \ psci.h psp-sev.h userfaultfd.h memfd.h mman.h nvme_ioctl.h \ vduse.h iommufd.h bits.h; do - cp "$tmpdir/include/linux/$header" "$output/linux-headers/linux" + cp "$hdrdir/include/linux/$header" "$output/linux-headers/linux" done =20 rm -rf "$output/linux-headers/asm-generic" mkdir -p "$output/linux-headers/asm-generic" for header in unistd.h bitsperlong.h mman-common.h mman.h hugetlb_encode.h= ; do - cp "$tmpdir/include/asm-generic/$header" "$output/linux-headers/asm-ge= neric" + cp "$hdrdir/include/asm-generic/$header" "$output/linux-headers/asm-ge= neric" done =20 if [ -L "$linux/source" ]; then @@ -210,23 +212,23 @@ EOF =20 rm -rf "$output/include/standard-headers/linux" mkdir -p "$output/include/standard-headers/linux" -for i in "$tmpdir"/include/linux/*virtio*.h \ - "$tmpdir/include/linux/qemu_fw_cfg.h" \ - "$tmpdir/include/linux/fuse.h" \ - "$tmpdir/include/linux/input.h" \ - "$tmpdir/include/linux/input-event-codes.h" \ - "$tmpdir/include/linux/udmabuf.h" \ - "$tmpdir/include/linux/pci_regs.h" \ - "$tmpdir/include/linux/ethtool.h" \ - "$tmpdir/include/linux/const.h" \ - "$tmpdir/include/linux/kernel.h" \ - "$tmpdir/include/linux/vhost_types.h" \ - "$tmpdir/include/linux/sysinfo.h" \ - "$tmpdir/include/misc/pvpanic.h"; do +for i in "$hdrdir"/include/linux/*virtio*.h \ + "$hdrdir/include/linux/qemu_fw_cfg.h" \ + "$hdrdir/include/linux/fuse.h" \ + "$hdrdir/include/linux/input.h" \ + "$hdrdir/include/linux/input-event-codes.h" \ + "$hdrdir/include/linux/udmabuf.h" \ + "$hdrdir/include/linux/pci_regs.h" \ + "$hdrdir/include/linux/ethtool.h" \ + "$hdrdir/include/linux/const.h" \ + "$hdrdir/include/linux/kernel.h" \ + "$hdrdir/include/linux/vhost_types.h" \ + "$hdrdir/include/linux/sysinfo.h" \ + "$hdrdir/include/misc/pvpanic.h"; do cp_portable "$i" "$output/include/standard-headers/linux" done mkdir -p "$output/include/standard-headers/drm" -cp_portable "$tmpdir/include/drm/drm_fourcc.h" \ +cp_portable "$hdrdir/include/drm/drm_fourcc.h" \ "$output/include/standard-headers/drm" =20 cat <$output/include/standard-headers/linux/types.h --=20 2.39.2 From nobody Mon Nov 25 09:38:16 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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Tsirkin" , Mahmoud Mandour Subject: [PATCH 03/11] plugins: prepare introduction of new inline ops Date: Tue, 14 May 2024 18:42:45 +0100 Message-Id: <20240514174253.694591-4-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240514174253.694591-1-alex.bennee@linaro.org> References: <20240514174253.694591-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::62b; envelope-from=alex.bennee@linaro.org; helo=mail-ej1-x62b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1715708741507100003 From: Pierrick Bouvier Until now, only add_u64 was available, and all functions assumed this or were named uniquely. Reviewed-by: Richard Henderson Signed-off-by: Pierrick Bouvier Message-Id: <20240502211522.346467-2-pierrick.bouvier@linaro.org> Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Michael S. Tsirkin Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- include/qemu/plugin.h | 2 +- accel/tcg/plugin-gen.c | 6 +++--- plugins/core.c | 14 ++++++++++++-- 3 files changed, 16 insertions(+), 6 deletions(-) diff --git a/include/qemu/plugin.h b/include/qemu/plugin.h index b535bfd5de..93da98b76c 100644 --- a/include/qemu/plugin.h +++ b/include/qemu/plugin.h @@ -69,7 +69,7 @@ union qemu_plugin_cb_sig { enum plugin_dyn_cb_type { PLUGIN_CB_REGULAR, PLUGIN_CB_MEM_REGULAR, - PLUGIN_CB_INLINE, + PLUGIN_CB_INLINE_ADD_U64, }; =20 /* diff --git a/accel/tcg/plugin-gen.c b/accel/tcg/plugin-gen.c index 49f5d1c2e4..4069d51daf 100644 --- a/accel/tcg/plugin-gen.c +++ b/accel/tcg/plugin-gen.c @@ -113,7 +113,7 @@ static void gen_udata_cb(struct qemu_plugin_dyn_cb *cb) tcg_temp_free_i32(cpu_index); } =20 -static void gen_inline_cb(struct qemu_plugin_dyn_cb *cb) +static void gen_inline_add_u64_cb(struct qemu_plugin_dyn_cb *cb) { GArray *arr =3D cb->inline_insn.entry.score->data; size_t offset =3D cb->inline_insn.entry.offset; @@ -158,8 +158,8 @@ static void inject_cb(struct qemu_plugin_dyn_cb *cb) case PLUGIN_CB_REGULAR: gen_udata_cb(cb); break; - case PLUGIN_CB_INLINE: - gen_inline_cb(cb); + case PLUGIN_CB_INLINE_ADD_U64: + gen_inline_add_u64_cb(cb); break; default: g_assert_not_reached(); diff --git a/plugins/core.c b/plugins/core.c index 1e58a57bf1..59771eda8f 100644 --- a/plugins/core.c +++ b/plugins/core.c @@ -316,6 +316,16 @@ static struct qemu_plugin_dyn_cb *plugin_get_dyn_cb(GA= rray **arr) return &g_array_index(cbs, struct qemu_plugin_dyn_cb, cbs->len - 1); } =20 +static enum plugin_dyn_cb_type op_to_cb_type(enum qemu_plugin_op op) +{ + switch (op) { + case QEMU_PLUGIN_INLINE_ADD_U64: + return PLUGIN_CB_INLINE_ADD_U64; + default: + g_assert_not_reached(); + } +} + void plugin_register_inline_op_on_entry(GArray **arr, enum qemu_plugin_mem_rw rw, enum qemu_plugin_op op, @@ -326,7 +336,7 @@ void plugin_register_inline_op_on_entry(GArray **arr, =20 dyn_cb =3D plugin_get_dyn_cb(arr); dyn_cb->userp =3D NULL; - dyn_cb->type =3D PLUGIN_CB_INLINE; + dyn_cb->type =3D op_to_cb_type(op); dyn_cb->rw =3D rw; dyn_cb->inline_insn.entry =3D entry; dyn_cb->inline_insn.op =3D op; @@ -551,7 +561,7 @@ void qemu_plugin_vcpu_mem_cb(CPUState *cpu, uint64_t va= ddr, cb->regular.f.vcpu_mem(cpu->cpu_index, make_plugin_meminfo(oi,= rw), vaddr, cb->userp); break; - case PLUGIN_CB_INLINE: + case PLUGIN_CB_INLINE_ADD_U64: exec_inline_op(cb, cpu->cpu_index); break; default: --=20 2.39.2 From nobody Mon Nov 25 09:38:16 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1715708642; cv=none; d=zohomail.com; s=zohoarc; b=nj4EqLWh8qcM4heLs6SPU6QNQshE/KYBsgFWOzWWM+OEeqD8GCUd8HlPXX4TOF2Isk0QzUmN5kz04/BF04Jk4InlGA33e+YDCN2n6ZDsfb8nO5ZG6tWsI05qoUwF+Cp82uwlAUq04z2eg304hyFXSZlE/pHjIJCDUaVu1FeXiE8= ARC-Message-Signature: i=1; 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Tue, 14 May 2024 10:42:58 -0700 (PDT) From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , Paolo Bonzini , qemu-arm@nongnu.org, Richard Henderson , Alexandre Iooss , Pierrick Bouvier , Cornelia Huck , Peter Maydell , "Michael S. Tsirkin" , Mahmoud Mandour Subject: [PATCH 04/11] plugins: extract generate ptr for qemu_plugin_u64 Date: Tue, 14 May 2024 18:42:46 +0100 Message-Id: <20240514174253.694591-5-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240514174253.694591-1-alex.bennee@linaro.org> References: <20240514174253.694591-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::529; envelope-from=alex.bennee@linaro.org; helo=mail-ed1-x529.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1715708643235100001 From: Pierrick Bouvier Plugin operations can access a scoreboard. This function factorizes code generation for accessing entry associated to a given vcpu. Reviewed-by: Richard Henderson Signed-off-by: Pierrick Bouvier Message-Id: <20240502211522.346467-3-pierrick.bouvier@linaro.org> Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Michael S. Tsirkin Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- accel/tcg/plugin-gen.c | 27 ++++++++++++++++++--------- 1 file changed, 18 insertions(+), 9 deletions(-) diff --git a/accel/tcg/plugin-gen.c b/accel/tcg/plugin-gen.c index 4069d51daf..97868781fe 100644 --- a/accel/tcg/plugin-gen.c +++ b/accel/tcg/plugin-gen.c @@ -113,24 +113,33 @@ static void gen_udata_cb(struct qemu_plugin_dyn_cb *c= b) tcg_temp_free_i32(cpu_index); } =20 -static void gen_inline_add_u64_cb(struct qemu_plugin_dyn_cb *cb) +static TCGv_ptr gen_plugin_u64_ptr(qemu_plugin_u64 entry) { - GArray *arr =3D cb->inline_insn.entry.score->data; - size_t offset =3D cb->inline_insn.entry.offset; - TCGv_i32 cpu_index =3D tcg_temp_ebb_new_i32(); - TCGv_i64 val =3D tcg_temp_ebb_new_i64(); TCGv_ptr ptr =3D tcg_temp_ebb_new_ptr(); =20 + GArray *arr =3D entry.score->data; + char *base_ptr =3D arr->data + entry.offset; + size_t entry_size =3D g_array_get_element_size(arr); + + TCGv_i32 cpu_index =3D tcg_temp_ebb_new_i32(); tcg_gen_ld_i32(cpu_index, tcg_env, -offsetof(ArchCPU, env) + offsetof(CPUState, cpu_index)= ); - tcg_gen_muli_i32(cpu_index, cpu_index, g_array_get_element_size(arr)); + tcg_gen_muli_i32(cpu_index, cpu_index, entry_size); tcg_gen_ext_i32_ptr(ptr, cpu_index); tcg_temp_free_i32(cpu_index); + tcg_gen_addi_ptr(ptr, ptr, (intptr_t) base_ptr); + + return ptr; +} + +static void gen_inline_add_u64_cb(struct qemu_plugin_dyn_cb *cb) +{ + TCGv_ptr ptr =3D gen_plugin_u64_ptr(cb->inline_insn.entry); + TCGv_i64 val =3D tcg_temp_ebb_new_i64(); =20 - tcg_gen_addi_ptr(ptr, ptr, (intptr_t)arr->data); - tcg_gen_ld_i64(val, ptr, offset); + tcg_gen_ld_i64(val, ptr, 0); tcg_gen_addi_i64(val, val, cb->inline_insn.imm); - tcg_gen_st_i64(val, ptr, offset); + tcg_gen_st_i64(val, ptr, 0); =20 tcg_temp_free_i64(val); tcg_temp_free_ptr(ptr); --=20 2.39.2 From nobody Mon Nov 25 09:38:16 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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Tsirkin" , Mahmoud Mandour Subject: [PATCH 05/11] plugins: add new inline op STORE_U64 Date: Tue, 14 May 2024 18:42:47 +0100 Message-Id: <20240514174253.694591-6-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240514174253.694591-1-alex.bennee@linaro.org> References: <20240514174253.694591-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::135; envelope-from=alex.bennee@linaro.org; helo=mail-lf1-x135.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1715708717461100007 From: Pierrick Bouvier This new operation can store an immediate u64 value to a given scoreboard. Reviewed-by: Richard Henderson Signed-off-by: Pierrick Bouvier Message-Id: <20240502211522.346467-4-pierrick.bouvier@linaro.org> Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Michael S. Tsirkin Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- include/qemu/plugin.h | 1 + include/qemu/qemu-plugin.h | 4 ++-- accel/tcg/plugin-gen.c | 13 +++++++++++++ plugins/core.c | 6 ++++++ 4 files changed, 22 insertions(+), 2 deletions(-) diff --git a/include/qemu/plugin.h b/include/qemu/plugin.h index 93da98b76c..6c21a30105 100644 --- a/include/qemu/plugin.h +++ b/include/qemu/plugin.h @@ -70,6 +70,7 @@ enum plugin_dyn_cb_type { PLUGIN_CB_REGULAR, PLUGIN_CB_MEM_REGULAR, PLUGIN_CB_INLINE_ADD_U64, + PLUGIN_CB_INLINE_STORE_U64, }; =20 /* diff --git a/include/qemu/qemu-plugin.h b/include/qemu/qemu-plugin.h index 4fc6c3739b..c5cac897a0 100644 --- a/include/qemu/qemu-plugin.h +++ b/include/qemu/qemu-plugin.h @@ -305,12 +305,12 @@ void qemu_plugin_register_vcpu_tb_exec_cb(struct qemu= _plugin_tb *tb, * enum qemu_plugin_op - describes an inline op * * @QEMU_PLUGIN_INLINE_ADD_U64: add an immediate value uint64_t - * - * Note: currently only a single inline op is supported. + * @QEMU_PLUGIN_INLINE_STORE_U64: store an immediate value uint64_t */ =20 enum qemu_plugin_op { QEMU_PLUGIN_INLINE_ADD_U64, + QEMU_PLUGIN_INLINE_STORE_U64, }; =20 /** diff --git a/accel/tcg/plugin-gen.c b/accel/tcg/plugin-gen.c index 97868781fe..88976289eb 100644 --- a/accel/tcg/plugin-gen.c +++ b/accel/tcg/plugin-gen.c @@ -145,6 +145,16 @@ static void gen_inline_add_u64_cb(struct qemu_plugin_d= yn_cb *cb) tcg_temp_free_ptr(ptr); } =20 +static void gen_inline_store_u64_cb(struct qemu_plugin_dyn_cb *cb) +{ + TCGv_ptr ptr =3D gen_plugin_u64_ptr(cb->inline_insn.entry); + TCGv_i64 val =3D tcg_constant_i64(cb->inline_insn.imm); + + tcg_gen_st_i64(val, ptr, 0); + + tcg_temp_free_ptr(ptr); +} + static void gen_mem_cb(struct qemu_plugin_dyn_cb *cb, qemu_plugin_meminfo_t meminfo, TCGv_i64 addr) { @@ -170,6 +180,9 @@ static void inject_cb(struct qemu_plugin_dyn_cb *cb) case PLUGIN_CB_INLINE_ADD_U64: gen_inline_add_u64_cb(cb); break; + case PLUGIN_CB_INLINE_STORE_U64: + gen_inline_store_u64_cb(cb); + break; default: g_assert_not_reached(); } diff --git a/plugins/core.c b/plugins/core.c index 59771eda8f..848d482fc4 100644 --- a/plugins/core.c +++ b/plugins/core.c @@ -321,6 +321,8 @@ static enum plugin_dyn_cb_type op_to_cb_type(enum qemu_= plugin_op op) switch (op) { case QEMU_PLUGIN_INLINE_ADD_U64: return PLUGIN_CB_INLINE_ADD_U64; + case QEMU_PLUGIN_INLINE_STORE_U64: + return PLUGIN_CB_INLINE_STORE_U64; default: g_assert_not_reached(); } @@ -535,6 +537,9 @@ void exec_inline_op(struct qemu_plugin_dyn_cb *cb, int = cpu_index) case QEMU_PLUGIN_INLINE_ADD_U64: *val +=3D cb->inline_insn.imm; break; + case QEMU_PLUGIN_INLINE_STORE_U64: + *val =3D cb->inline_insn.imm; + break; default: g_assert_not_reached(); } @@ -562,6 +567,7 @@ void qemu_plugin_vcpu_mem_cb(CPUState *cpu, uint64_t va= ddr, vaddr, cb->userp); break; case PLUGIN_CB_INLINE_ADD_U64: + case PLUGIN_CB_INLINE_STORE_U64: exec_inline_op(cb, cpu->cpu_index); break; default: --=20 2.39.2 From nobody Mon Nov 25 09:38:16 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1715708828; cv=none; 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Tsirkin" , Mahmoud Mandour Subject: [PATCH 06/11] tests/plugin/inline: add test for STORE_U64 inline op Date: Tue, 14 May 2024 18:42:48 +0100 Message-Id: <20240514174253.694591-7-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240514174253.694591-1-alex.bennee@linaro.org> References: <20240514174253.694591-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::129; envelope-from=alex.bennee@linaro.org; helo=mail-lf1-x129.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1715708829983100003 From: Pierrick Bouvier Reviewed-by: Richard Henderson Signed-off-by: Pierrick Bouvier Message-Id: <20240502211522.346467-5-pierrick.bouvier@linaro.org> Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Michael S. Tsirkin --- tests/plugin/inline.c | 41 +++++++++++++++++++++++++++++++++++++---- 1 file changed, 37 insertions(+), 4 deletions(-) diff --git a/tests/plugin/inline.c b/tests/plugin/inline.c index 0163e9b51c..103c3a22f6 100644 --- a/tests/plugin/inline.c +++ b/tests/plugin/inline.c @@ -22,6 +22,12 @@ typedef struct { uint64_t count_mem_inline; } CPUCount; =20 +typedef struct { + uint64_t data_insn; + uint64_t data_tb; + uint64_t data_mem; +} CPUData; + static struct qemu_plugin_scoreboard *counts; static qemu_plugin_u64 count_tb; static qemu_plugin_u64 count_tb_inline; @@ -29,6 +35,10 @@ static qemu_plugin_u64 count_insn; static qemu_plugin_u64 count_insn_inline; static qemu_plugin_u64 count_mem; static qemu_plugin_u64 count_mem_inline; +static struct qemu_plugin_scoreboard *data; +static qemu_plugin_u64 data_insn; +static qemu_plugin_u64 data_tb; +static qemu_plugin_u64 data_mem; =20 static uint64_t global_count_tb; static uint64_t global_count_insn; @@ -109,11 +119,13 @@ static void plugin_exit(qemu_plugin_id_t id, void *ud= ata) stats_mem(); =20 qemu_plugin_scoreboard_free(counts); + qemu_plugin_scoreboard_free(data); } =20 static void vcpu_tb_exec(unsigned int cpu_index, void *udata) { qemu_plugin_u64_add(count_tb, cpu_index, 1); + g_assert(qemu_plugin_u64_get(data_tb, cpu_index) =3D=3D (uintptr_t) ud= ata); g_mutex_lock(&tb_lock); max_cpu_index =3D MAX(max_cpu_index, cpu_index); global_count_tb++; @@ -123,6 +135,7 @@ static void vcpu_tb_exec(unsigned int cpu_index, void *= udata) static void vcpu_insn_exec(unsigned int cpu_index, void *udata) { qemu_plugin_u64_add(count_insn, cpu_index, 1); + g_assert(qemu_plugin_u64_get(data_insn, cpu_index) =3D=3D (uintptr_t) = udata); g_mutex_lock(&insn_lock); global_count_insn++; g_mutex_unlock(&insn_lock); @@ -131,9 +144,10 @@ static void vcpu_insn_exec(unsigned int cpu_index, voi= d *udata) static void vcpu_mem_access(unsigned int cpu_index, qemu_plugin_meminfo_t info, uint64_t vaddr, - void *userdata) + void *udata) { qemu_plugin_u64_add(count_mem, cpu_index, 1); + g_assert(qemu_plugin_u64_get(data_mem, cpu_index) =3D=3D (uintptr_t) u= data); g_mutex_lock(&mem_lock); global_count_mem++; g_mutex_unlock(&mem_lock); @@ -141,20 +155,34 @@ static void vcpu_mem_access(unsigned int cpu_index, =20 static void vcpu_tb_trans(qemu_plugin_id_t id, struct qemu_plugin_tb *tb) { + void *tb_store =3D tb; + qemu_plugin_register_vcpu_tb_exec_inline_per_vcpu( + tb, QEMU_PLUGIN_INLINE_STORE_U64, data_tb, (uintptr_t) tb_store); qemu_plugin_register_vcpu_tb_exec_cb( - tb, vcpu_tb_exec, QEMU_PLUGIN_CB_NO_REGS, 0); + tb, vcpu_tb_exec, QEMU_PLUGIN_CB_NO_REGS, tb_store); qemu_plugin_register_vcpu_tb_exec_inline_per_vcpu( tb, QEMU_PLUGIN_INLINE_ADD_U64, count_tb_inline, 1); =20 for (int idx =3D 0; idx < qemu_plugin_tb_n_insns(tb); ++idx) { struct qemu_plugin_insn *insn =3D qemu_plugin_tb_get_insn(tb, idx); + void *insn_store =3D insn; + void *mem_store =3D (char *)insn_store + 0xff; + + qemu_plugin_register_vcpu_insn_exec_inline_per_vcpu( + insn, QEMU_PLUGIN_INLINE_STORE_U64, data_insn, + (uintptr_t) insn_store); qemu_plugin_register_vcpu_insn_exec_cb( - insn, vcpu_insn_exec, QEMU_PLUGIN_CB_NO_REGS, 0); + insn, vcpu_insn_exec, QEMU_PLUGIN_CB_NO_REGS, insn_store); qemu_plugin_register_vcpu_insn_exec_inline_per_vcpu( insn, QEMU_PLUGIN_INLINE_ADD_U64, count_insn_inline, 1); + + qemu_plugin_register_vcpu_mem_inline_per_vcpu( + insn, QEMU_PLUGIN_MEM_RW, + QEMU_PLUGIN_INLINE_STORE_U64, + data_mem, (uintptr_t) mem_store); qemu_plugin_register_vcpu_mem_cb(insn, &vcpu_mem_access, QEMU_PLUGIN_CB_NO_REGS, - QEMU_PLUGIN_MEM_RW, 0); + QEMU_PLUGIN_MEM_RW, mem_store); qemu_plugin_register_vcpu_mem_inline_per_vcpu( insn, QEMU_PLUGIN_MEM_RW, QEMU_PLUGIN_INLINE_ADD_U64, @@ -179,6 +207,11 @@ int qemu_plugin_install(qemu_plugin_id_t id, const qem= u_info_t *info, counts, CPUCount, count_insn_inline); count_mem_inline =3D qemu_plugin_scoreboard_u64_in_struct( counts, CPUCount, count_mem_inline); + data =3D qemu_plugin_scoreboard_new(sizeof(CPUData)); + data_insn =3D qemu_plugin_scoreboard_u64_in_struct(data, CPUData, data= _insn); + data_tb =3D qemu_plugin_scoreboard_u64_in_struct(data, CPUData, data_t= b); + data_mem =3D qemu_plugin_scoreboard_u64_in_struct(data, CPUData, data_= mem); + qemu_plugin_register_vcpu_tb_trans_cb(id, vcpu_tb_trans); qemu_plugin_register_atexit_cb(id, plugin_exit, NULL); =20 --=20 2.39.2 From nobody Mon Nov 25 09:38:16 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1715708690; cv=none; d=zohomail.com; s=zohoarc; b=HK09bj7Q9V04dlXT6qojUUAc76ljCipE73Cu2jZVJnrDdGBo06v5d4EQmy36XHxi8YAA49N1fk7LTwRBrn0+Lpad+DuObz2t94XsrkI4PiHiOem2W4HzXRXV2yNlU6gk9sUhH1lzrqqJMv7+JEf5SxSyB2W8eqeuqfx+wsDdInA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1715708690; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; 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Tue, 14 May 2024 10:43:00 -0700 (PDT) From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , Paolo Bonzini , qemu-arm@nongnu.org, Richard Henderson , Alexandre Iooss , Pierrick Bouvier , Cornelia Huck , Peter Maydell , "Michael S. Tsirkin" , Mahmoud Mandour Subject: [PATCH 07/11] plugins: conditional callbacks Date: Tue, 14 May 2024 18:42:49 +0100 Message-Id: <20240514174253.694591-8-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240514174253.694591-1-alex.bennee@linaro.org> References: <20240514174253.694591-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::12f; envelope-from=alex.bennee@linaro.org; helo=mail-lf1-x12f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1715708691542100003 From: Pierrick Bouvier Extend plugins API to support callback called with a given criteria (evaluated inline). Added functions: - qemu_plugin_register_vcpu_tb_exec_cond_cb - qemu_plugin_register_vcpu_insn_exec_cond_cb They expect as parameter a condition, a qemu_plugin_u64_t (op1) and an immediate (op2). Callback is called if op1 |cond| op2 is true. Reviewed-by: Richard Henderson Signed-off-by: Pierrick Bouvier Message-Id: <20240502211522.346467-6-pierrick.bouvier@linaro.org> Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Michael S. Tsirkin --- include/qemu/plugin.h | 8 ++++ include/qemu/qemu-plugin.h | 76 ++++++++++++++++++++++++++++++++++++ plugins/plugin.h | 8 ++++ accel/tcg/plugin-gen.c | 48 +++++++++++++++++++++++ plugins/api.c | 39 ++++++++++++++++++ plugins/core.c | 32 +++++++++++++++ plugins/qemu-plugins.symbols | 2 + 7 files changed, 213 insertions(+) diff --git a/include/qemu/plugin.h b/include/qemu/plugin.h index 6c21a30105..c7b3b1cd66 100644 --- a/include/qemu/plugin.h +++ b/include/qemu/plugin.h @@ -68,6 +68,7 @@ union qemu_plugin_cb_sig { =20 enum plugin_dyn_cb_type { PLUGIN_CB_REGULAR, + PLUGIN_CB_COND, PLUGIN_CB_MEM_REGULAR, PLUGIN_CB_INLINE_ADD_U64, PLUGIN_CB_INLINE_STORE_U64, @@ -89,6 +90,13 @@ struct qemu_plugin_dyn_cb { union qemu_plugin_cb_sig f; TCGHelperInfo *info; } regular; + struct { + union qemu_plugin_cb_sig f; + TCGHelperInfo *info; + qemu_plugin_u64 entry; + enum qemu_plugin_cond cond; + uint64_t imm; + } cond; struct { qemu_plugin_u64 entry; enum qemu_plugin_op op; diff --git a/include/qemu/qemu-plugin.h b/include/qemu/qemu-plugin.h index c5cac897a0..337de25ece 100644 --- a/include/qemu/qemu-plugin.h +++ b/include/qemu/qemu-plugin.h @@ -262,6 +262,29 @@ enum qemu_plugin_mem_rw { QEMU_PLUGIN_MEM_RW, }; =20 +/** + * enum qemu_plugin_cond - condition to enable callback + * + * @QEMU_PLUGIN_COND_NEVER: false + * @QEMU_PLUGIN_COND_ALWAYS: true + * @QEMU_PLUGIN_COND_EQ: is equal? + * @QEMU_PLUGIN_COND_NE: is not equal? + * @QEMU_PLUGIN_COND_LT: is less than? + * @QEMU_PLUGIN_COND_LE: is less than or equal? + * @QEMU_PLUGIN_COND_GT: is greater than? + * @QEMU_PLUGIN_COND_GE: is greater than or equal? + */ +enum qemu_plugin_cond { + QEMU_PLUGIN_COND_NEVER, + QEMU_PLUGIN_COND_ALWAYS, + QEMU_PLUGIN_COND_EQ, + QEMU_PLUGIN_COND_NE, + QEMU_PLUGIN_COND_LT, + QEMU_PLUGIN_COND_LE, + QEMU_PLUGIN_COND_GT, + QEMU_PLUGIN_COND_GE, +}; + /** * typedef qemu_plugin_vcpu_tb_trans_cb_t - translation callback * @id: unique plugin id @@ -301,6 +324,32 @@ void qemu_plugin_register_vcpu_tb_exec_cb(struct qemu_= plugin_tb *tb, enum qemu_plugin_cb_flags flags, void *userdata); =20 +/** + * qemu_plugin_register_vcpu_tb_exec_cond_cb() - register conditional call= back + * @tb: the opaque qemu_plugin_tb handle for the translation + * @cb: callback function + * @cond: condition to enable callback + * @entry: first operand for condition + * @imm: second operand for condition + * @flags: does the plugin read or write the CPU's registers? + * @userdata: any plugin data to pass to the @cb? + * + * The @cb function is called when a translated unit executes if + * entry @cond imm is true. + * If condition is QEMU_PLUGIN_COND_ALWAYS, condition is never interpreted= and + * this function is equivalent to qemu_plugin_register_vcpu_tb_exec_cb. + * If condition QEMU_PLUGIN_COND_NEVER, condition is never interpreted and + * callback is never installed. + */ +QEMU_PLUGIN_API +void qemu_plugin_register_vcpu_tb_exec_cond_cb(struct qemu_plugin_tb *tb, + qemu_plugin_vcpu_udata_cb_t= cb, + enum qemu_plugin_cb_flags f= lags, + enum qemu_plugin_cond cond, + qemu_plugin_u64 entry, + uint64_t imm, + void *userdata); + /** * enum qemu_plugin_op - describes an inline op * @@ -344,6 +393,33 @@ void qemu_plugin_register_vcpu_insn_exec_cb(struct qem= u_plugin_insn *insn, enum qemu_plugin_cb_flags flag= s, void *userdata); =20 +/** + * qemu_plugin_register_vcpu_insn_exec_cond_cb() - conditional insn execut= ion cb + * @insn: the opaque qemu_plugin_insn handle for an instruction + * @cb: callback function + * @flags: does the plugin read or write the CPU's registers? + * @cond: condition to enable callback + * @entry: first operand for condition + * @imm: second operand for condition + * @userdata: any plugin data to pass to the @cb? + * + * The @cb function is called when an instruction executes if + * entry @cond imm is true. + * If condition is QEMU_PLUGIN_COND_ALWAYS, condition is never interpreted= and + * this function is equivalent to qemu_plugin_register_vcpu_insn_exec_cb. + * If condition QEMU_PLUGIN_COND_NEVER, condition is never interpreted and + * callback is never installed. + */ +QEMU_PLUGIN_API +void qemu_plugin_register_vcpu_insn_exec_cond_cb( + struct qemu_plugin_insn *insn, + qemu_plugin_vcpu_udata_cb_t cb, + enum qemu_plugin_cb_flags flags, + enum qemu_plugin_cond cond, + qemu_plugin_u64 entry, + uint64_t imm, + void *userdata); + /** * qemu_plugin_register_vcpu_insn_exec_inline_per_vcpu() - insn exec inlin= e op * @insn: the opaque qemu_plugin_insn handle for an instruction diff --git a/plugins/plugin.h b/plugins/plugin.h index 7c34f23cfc..7d4b4e21f7 100644 --- a/plugins/plugin.h +++ b/plugins/plugin.h @@ -93,6 +93,14 @@ plugin_register_dyn_cb__udata(GArray **arr, qemu_plugin_vcpu_udata_cb_t cb, enum qemu_plugin_cb_flags flags, void *udata= ); =20 +void +plugin_register_dyn_cond_cb__udata(GArray **arr, + qemu_plugin_vcpu_udata_cb_t cb, + enum qemu_plugin_cb_flags flags, + enum qemu_plugin_cond cond, + qemu_plugin_u64 entry, + uint64_t imm, + void *udata); =20 void plugin_register_vcpu_mem_cb(GArray **arr, void *cb, diff --git a/accel/tcg/plugin-gen.c b/accel/tcg/plugin-gen.c index 88976289eb..f2190f3511 100644 --- a/accel/tcg/plugin-gen.c +++ b/accel/tcg/plugin-gen.c @@ -132,6 +132,51 @@ static TCGv_ptr gen_plugin_u64_ptr(qemu_plugin_u64 ent= ry) return ptr; } =20 +static TCGCond plugin_cond_to_tcgcond(enum qemu_plugin_cond cond) +{ + switch (cond) { + case QEMU_PLUGIN_COND_EQ: + return TCG_COND_EQ; + case QEMU_PLUGIN_COND_NE: + return TCG_COND_NE; + case QEMU_PLUGIN_COND_LT: + return TCG_COND_LTU; + case QEMU_PLUGIN_COND_LE: + return TCG_COND_LEU; + case QEMU_PLUGIN_COND_GT: + return TCG_COND_GTU; + case QEMU_PLUGIN_COND_GE: + return TCG_COND_GEU; + default: + /* ALWAYS and NEVER conditions should never reach */ + g_assert_not_reached(); + } +} + +static void gen_udata_cond_cb(struct qemu_plugin_dyn_cb *cb) +{ + TCGv_ptr ptr =3D gen_plugin_u64_ptr(cb->cond.entry); + TCGv_i32 cpu_index =3D tcg_temp_ebb_new_i32(); + TCGv_i64 val =3D tcg_temp_ebb_new_i64(); + TCGLabel *after_cb =3D gen_new_label(); + + /* Condition should be negated, as calling the cb is the "else" path */ + TCGCond cond =3D tcg_invert_cond(plugin_cond_to_tcgcond(cb->cond.cond)= ); + + tcg_gen_ld_i64(val, ptr, 0); + tcg_gen_brcondi_i64(cond, val, cb->cond.imm, after_cb); + tcg_gen_ld_i32(cpu_index, tcg_env, + -offsetof(ArchCPU, env) + offsetof(CPUState, cpu_index)= ); + tcg_gen_call2(cb->cond.f.vcpu_udata, cb->cond.info, NULL, + tcgv_i32_temp(cpu_index), + tcgv_ptr_temp(tcg_constant_ptr(cb->userp))); + gen_set_label(after_cb); + + tcg_temp_free_i64(val); + tcg_temp_free_i32(cpu_index); + tcg_temp_free_ptr(ptr); +} + static void gen_inline_add_u64_cb(struct qemu_plugin_dyn_cb *cb) { TCGv_ptr ptr =3D gen_plugin_u64_ptr(cb->inline_insn.entry); @@ -177,6 +222,9 @@ static void inject_cb(struct qemu_plugin_dyn_cb *cb) case PLUGIN_CB_REGULAR: gen_udata_cb(cb); break; + case PLUGIN_CB_COND: + gen_udata_cond_cb(cb); + break; case PLUGIN_CB_INLINE_ADD_U64: gen_inline_add_u64_cb(cb); break; diff --git a/plugins/api.c b/plugins/api.c index 2144da1fe8..bfab72610c 100644 --- a/plugins/api.c +++ b/plugins/api.c @@ -96,6 +96,25 @@ void qemu_plugin_register_vcpu_tb_exec_cb(struct qemu_pl= ugin_tb *tb, } } =20 +void qemu_plugin_register_vcpu_tb_exec_cond_cb(struct qemu_plugin_tb *tb, + qemu_plugin_vcpu_udata_cb_t= cb, + enum qemu_plugin_cb_flags f= lags, + enum qemu_plugin_cond cond, + qemu_plugin_u64 entry, + uint64_t imm, + void *udata) +{ + if (cond =3D=3D QEMU_PLUGIN_COND_NEVER || tb->mem_only) { + return; + } + if (cond =3D=3D QEMU_PLUGIN_COND_ALWAYS) { + qemu_plugin_register_vcpu_tb_exec_cb(tb, cb, flags, udata); + return; + } + plugin_register_dyn_cond_cb__udata(&tb->cbs, cb, flags, + cond, entry, imm, udata); +} + void qemu_plugin_register_vcpu_tb_exec_inline_per_vcpu( struct qemu_plugin_tb *tb, enum qemu_plugin_op op, @@ -117,6 +136,26 @@ void qemu_plugin_register_vcpu_insn_exec_cb(struct qem= u_plugin_insn *insn, } } =20 +void qemu_plugin_register_vcpu_insn_exec_cond_cb( + struct qemu_plugin_insn *insn, + qemu_plugin_vcpu_udata_cb_t cb, + enum qemu_plugin_cb_flags flags, + enum qemu_plugin_cond cond, + qemu_plugin_u64 entry, + uint64_t imm, + void *udata) +{ + if (cond =3D=3D QEMU_PLUGIN_COND_NEVER || insn->mem_only) { + return; + } + if (cond =3D=3D QEMU_PLUGIN_COND_ALWAYS) { + qemu_plugin_register_vcpu_insn_exec_cb(insn, cb, flags, udata); + return; + } + plugin_register_dyn_cond_cb__udata(&insn->insn_cbs, cb, flags, + cond, entry, imm, udata); +} + void qemu_plugin_register_vcpu_insn_exec_inline_per_vcpu( struct qemu_plugin_insn *insn, enum qemu_plugin_op op, diff --git a/plugins/core.c b/plugins/core.c index 848d482fc4..332474a5bc 100644 --- a/plugins/core.c +++ b/plugins/core.c @@ -371,6 +371,38 @@ void plugin_register_dyn_cb__udata(GArray **arr, dyn_cb->regular.info =3D &info[flags]; } =20 +void plugin_register_dyn_cond_cb__udata(GArray **arr, + qemu_plugin_vcpu_udata_cb_t cb, + enum qemu_plugin_cb_flags flags, + enum qemu_plugin_cond cond, + qemu_plugin_u64 entry, + uint64_t imm, + void *udata) +{ + static TCGHelperInfo info[3] =3D { + [QEMU_PLUGIN_CB_NO_REGS].flags =3D TCG_CALL_NO_RWG, + [QEMU_PLUGIN_CB_R_REGS].flags =3D TCG_CALL_NO_WG, + /* + * Match qemu_plugin_vcpu_udata_cb_t: + * void (*)(uint32_t, void *) + */ + [0 ... 2].typemask =3D (dh_typemask(void, 0) | + dh_typemask(i32, 1) | + dh_typemask(ptr, 2)) + }; + + struct qemu_plugin_dyn_cb *dyn_cb =3D plugin_get_dyn_cb(arr); + dyn_cb->userp =3D udata; + dyn_cb->type =3D PLUGIN_CB_COND; + dyn_cb->cond.f.vcpu_udata =3D cb; + dyn_cb->cond.cond =3D cond; + dyn_cb->cond.entry =3D entry; + dyn_cb->cond.imm =3D imm; + + assert((unsigned)flags < ARRAY_SIZE(info)); + dyn_cb->cond.info =3D &info[flags]; +} + void plugin_register_vcpu_mem_cb(GArray **arr, void *cb, enum qemu_plugin_cb_flags flags, diff --git a/plugins/qemu-plugins.symbols b/plugins/qemu-plugins.symbols index a9fac056c7..aa0a77a319 100644 --- a/plugins/qemu-plugins.symbols +++ b/plugins/qemu-plugins.symbols @@ -27,6 +27,7 @@ qemu_plugin_register_vcpu_idle_cb; qemu_plugin_register_vcpu_init_cb; qemu_plugin_register_vcpu_insn_exec_cb; + qemu_plugin_register_vcpu_insn_exec_cond_cb; qemu_plugin_register_vcpu_insn_exec_inline_per_vcpu; qemu_plugin_register_vcpu_mem_cb; qemu_plugin_register_vcpu_mem_inline_per_vcpu; @@ -34,6 +35,7 @@ qemu_plugin_register_vcpu_syscall_cb; qemu_plugin_register_vcpu_syscall_ret_cb; qemu_plugin_register_vcpu_tb_exec_cb; + qemu_plugin_register_vcpu_tb_exec_cond_cb; qemu_plugin_register_vcpu_tb_exec_inline_per_vcpu; qemu_plugin_register_vcpu_tb_trans_cb; qemu_plugin_reset; --=20 2.39.2 From nobody Mon Nov 25 09:38:16 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1715708695; cv=none; d=zohomail.com; s=zohoarc; b=lLuK9DwzfS3QIZR4joBpXl3L5OcElgsEw09cmWRrzqJjbZU21kRCBpMvKLyvgD3uUceD1qCdKJ4MqdUW0K72Es8QDPe0RCWQBGk6kR8mPi6LG5T6sns5eS/hdNSNWr2Q6nsNWrNbry/f4D4pgtl8JzjmFhFiIB5tVX/ZfKE9H+c= ARC-Message-Signature: i=1; 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Tue, 14 May 2024 10:42:59 -0700 (PDT) From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , Paolo Bonzini , qemu-arm@nongnu.org, Richard Henderson , Alexandre Iooss , Pierrick Bouvier , Cornelia Huck , Peter Maydell , "Michael S. Tsirkin" , Mahmoud Mandour Subject: [PATCH 08/11] tests/plugin/inline: add test for conditional callback Date: Tue, 14 May 2024 18:42:50 +0100 Message-Id: <20240514174253.694591-9-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240514174253.694591-1-alex.bennee@linaro.org> References: <20240514174253.694591-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::130; envelope-from=alex.bennee@linaro.org; helo=mail-lf1-x130.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1715708695383100001 From: Pierrick Bouvier Count number of tb and insn executed using a conditional callback. We ensure the callback has been called expected number of time (per vcpu). Reviewed-by: Richard Henderson Signed-off-by: Pierrick Bouvier Message-Id: <20240502211522.346467-7-pierrick.bouvier@linaro.org> Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Michael S. Tsirkin --- tests/plugin/inline.c | 89 +++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 86 insertions(+), 3 deletions(-) diff --git a/tests/plugin/inline.c b/tests/plugin/inline.c index 103c3a22f6..cd63827b7d 100644 --- a/tests/plugin/inline.c +++ b/tests/plugin/inline.c @@ -20,8 +20,14 @@ typedef struct { uint64_t count_insn_inline; uint64_t count_mem; uint64_t count_mem_inline; + uint64_t tb_cond_num_trigger; + uint64_t tb_cond_track_count; + uint64_t insn_cond_num_trigger; + uint64_t insn_cond_track_count; } CPUCount; =20 +static const uint64_t cond_trigger_limit =3D 100; + typedef struct { uint64_t data_insn; uint64_t data_tb; @@ -35,6 +41,10 @@ static qemu_plugin_u64 count_insn; static qemu_plugin_u64 count_insn_inline; static qemu_plugin_u64 count_mem; static qemu_plugin_u64 count_mem_inline; +static qemu_plugin_u64 tb_cond_num_trigger; +static qemu_plugin_u64 tb_cond_track_count; +static qemu_plugin_u64 insn_cond_num_trigger; +static qemu_plugin_u64 insn_cond_track_count; static struct qemu_plugin_scoreboard *data; static qemu_plugin_u64 data_insn; static qemu_plugin_u64 data_tb; @@ -56,12 +66,19 @@ static void stats_insn(void) const uint64_t per_vcpu =3D qemu_plugin_u64_sum(count_insn); const uint64_t inl_per_vcpu =3D qemu_plugin_u64_sum(count_insn_inline); + const uint64_t cond_num_trigger =3D + qemu_plugin_u64_sum(insn_cond_num_trigger); + const uint64_t cond_track_left =3D qemu_plugin_u64_sum(insn_cond_track= _count); + const uint64_t conditional =3D + cond_num_trigger * cond_trigger_limit + cond_track_left; printf("insn: %" PRIu64 "\n", expected); printf("insn: %" PRIu64 " (per vcpu)\n", per_vcpu); printf("insn: %" PRIu64 " (per vcpu inline)\n", inl_per_vcpu); + printf("insn: %" PRIu64 " (cond cb)\n", conditional); g_assert(expected > 0); g_assert(per_vcpu =3D=3D expected); g_assert(inl_per_vcpu =3D=3D expected); + g_assert(conditional =3D=3D expected); } =20 static void stats_tb(void) @@ -70,12 +87,18 @@ static void stats_tb(void) const uint64_t per_vcpu =3D qemu_plugin_u64_sum(count_tb); const uint64_t inl_per_vcpu =3D qemu_plugin_u64_sum(count_tb_inline); + const uint64_t cond_num_trigger =3D qemu_plugin_u64_sum(tb_cond_num_tr= igger); + const uint64_t cond_track_left =3D qemu_plugin_u64_sum(tb_cond_track_c= ount); + const uint64_t conditional =3D + cond_num_trigger * cond_trigger_limit + cond_track_left; printf("tb: %" PRIu64 "\n", expected); printf("tb: %" PRIu64 " (per vcpu)\n", per_vcpu); printf("tb: %" PRIu64 " (per vcpu inline)\n", inl_per_vcpu); + printf("tb: %" PRIu64 " (conditional cb)\n", conditional); g_assert(expected > 0); g_assert(per_vcpu =3D=3D expected); g_assert(inl_per_vcpu =3D=3D expected); + g_assert(conditional =3D=3D expected); } =20 static void stats_mem(void) @@ -104,14 +127,35 @@ static void plugin_exit(qemu_plugin_id_t id, void *ud= ata) const uint64_t insn_inline =3D qemu_plugin_u64_get(count_insn_inli= ne, i); const uint64_t mem =3D qemu_plugin_u64_get(count_mem, i); const uint64_t mem_inline =3D qemu_plugin_u64_get(count_mem_inline= , i); - printf("cpu %d: tb (%" PRIu64 ", %" PRIu64 ") | " - "insn (%" PRIu64 ", %" PRIu64 ") | " + const uint64_t tb_cond_trigger =3D + qemu_plugin_u64_get(tb_cond_num_trigger, i); + const uint64_t tb_cond_left =3D + qemu_plugin_u64_get(tb_cond_track_count, i); + const uint64_t insn_cond_trigger =3D + qemu_plugin_u64_get(insn_cond_num_trigger, i); + const uint64_t insn_cond_left =3D + qemu_plugin_u64_get(insn_cond_track_count, i); + printf("cpu %d: tb (%" PRIu64 ", %" PRIu64 + ", %" PRIu64 " * %" PRIu64 " + %" PRIu64 + ") | " + "insn (%" PRIu64 ", %" PRIu64 + ", %" PRIu64 " * %" PRIu64 " + %" PRIu64 + ") | " "mem (%" PRIu64 ", %" PRIu64 ")" "\n", - i, tb, tb_inline, insn, insn_inline, mem, mem_inline); + i, + tb, tb_inline, + tb_cond_trigger, cond_trigger_limit, tb_cond_left, + insn, insn_inline, + insn_cond_trigger, cond_trigger_limit, insn_cond_left, + mem, mem_inline); g_assert(tb =3D=3D tb_inline); g_assert(insn =3D=3D insn_inline); g_assert(mem =3D=3D mem_inline); + g_assert(tb_cond_trigger =3D=3D tb / cond_trigger_limit); + g_assert(tb_cond_left =3D=3D tb % cond_trigger_limit); + g_assert(insn_cond_trigger =3D=3D insn / cond_trigger_limit); + g_assert(insn_cond_left =3D=3D insn % cond_trigger_limit); } =20 stats_tb(); @@ -132,6 +176,24 @@ static void vcpu_tb_exec(unsigned int cpu_index, void = *udata) g_mutex_unlock(&tb_lock); } =20 +static void vcpu_tb_cond_exec(unsigned int cpu_index, void *udata) +{ + g_assert(qemu_plugin_u64_get(tb_cond_track_count, cpu_index) =3D=3D + cond_trigger_limit); + g_assert(qemu_plugin_u64_get(data_tb, cpu_index) =3D=3D (uintptr_t) ud= ata); + qemu_plugin_u64_set(tb_cond_track_count, cpu_index, 0); + qemu_plugin_u64_add(tb_cond_num_trigger, cpu_index, 1); +} + +static void vcpu_insn_cond_exec(unsigned int cpu_index, void *udata) +{ + g_assert(qemu_plugin_u64_get(insn_cond_track_count, cpu_index) =3D=3D + cond_trigger_limit); + g_assert(qemu_plugin_u64_get(data_insn, cpu_index) =3D=3D (uintptr_t) = udata); + qemu_plugin_u64_set(insn_cond_track_count, cpu_index, 0); + qemu_plugin_u64_add(insn_cond_num_trigger, cpu_index, 1); +} + static void vcpu_insn_exec(unsigned int cpu_index, void *udata) { qemu_plugin_u64_add(count_insn, cpu_index, 1); @@ -163,6 +225,12 @@ static void vcpu_tb_trans(qemu_plugin_id_t id, struct = qemu_plugin_tb *tb) qemu_plugin_register_vcpu_tb_exec_inline_per_vcpu( tb, QEMU_PLUGIN_INLINE_ADD_U64, count_tb_inline, 1); =20 + qemu_plugin_register_vcpu_tb_exec_inline_per_vcpu( + tb, QEMU_PLUGIN_INLINE_ADD_U64, tb_cond_track_count, 1); + qemu_plugin_register_vcpu_tb_exec_cond_cb( + tb, vcpu_tb_cond_exec, QEMU_PLUGIN_CB_NO_REGS, + QEMU_PLUGIN_COND_EQ, tb_cond_track_count, cond_trigger_limit, tb_s= tore); + for (int idx =3D 0; idx < qemu_plugin_tb_n_insns(tb); ++idx) { struct qemu_plugin_insn *insn =3D qemu_plugin_tb_get_insn(tb, idx); void *insn_store =3D insn; @@ -176,6 +244,13 @@ static void vcpu_tb_trans(qemu_plugin_id_t id, struct = qemu_plugin_tb *tb) qemu_plugin_register_vcpu_insn_exec_inline_per_vcpu( insn, QEMU_PLUGIN_INLINE_ADD_U64, count_insn_inline, 1); =20 + qemu_plugin_register_vcpu_insn_exec_inline_per_vcpu( + insn, QEMU_PLUGIN_INLINE_ADD_U64, insn_cond_track_count, 1); + qemu_plugin_register_vcpu_insn_exec_cond_cb( + insn, vcpu_insn_cond_exec, QEMU_PLUGIN_CB_NO_REGS, + QEMU_PLUGIN_COND_EQ, insn_cond_track_count, cond_trigger_limit, + insn_store); + qemu_plugin_register_vcpu_mem_inline_per_vcpu( insn, QEMU_PLUGIN_MEM_RW, QEMU_PLUGIN_INLINE_STORE_U64, @@ -207,6 +282,14 @@ int qemu_plugin_install(qemu_plugin_id_t id, const qem= u_info_t *info, counts, CPUCount, count_insn_inline); count_mem_inline =3D qemu_plugin_scoreboard_u64_in_struct( counts, CPUCount, count_mem_inline); + tb_cond_num_trigger =3D qemu_plugin_scoreboard_u64_in_struct( + counts, CPUCount, tb_cond_num_trigger); + tb_cond_track_count =3D qemu_plugin_scoreboard_u64_in_struct( + counts, CPUCount, tb_cond_track_count); + insn_cond_num_trigger =3D qemu_plugin_scoreboard_u64_in_struct( + counts, CPUCount, insn_cond_num_trigger); + insn_cond_track_count =3D qemu_plugin_scoreboard_u64_in_struct( + counts, CPUCount, insn_cond_track_count); data =3D qemu_plugin_scoreboard_new(sizeof(CPUData)); data_insn =3D qemu_plugin_scoreboard_u64_in_struct(data, CPUData, data= _insn); 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Tue, 14 May 2024 10:43:02 -0700 (PDT) From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , Paolo Bonzini , qemu-arm@nongnu.org, Richard Henderson , Alexandre Iooss , Pierrick Bouvier , Cornelia Huck , Peter Maydell , "Michael S. Tsirkin" , Mahmoud Mandour Subject: [PATCH 09/11] plugins: distinct types for callbacks Date: Tue, 14 May 2024 18:42:51 +0100 Message-Id: <20240514174253.694591-10-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240514174253.694591-1-alex.bennee@linaro.org> References: <20240514174253.694591-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::62f; envelope-from=alex.bennee@linaro.org; helo=mail-ej1-x62f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1715708747644100003 From: Pierrick Bouvier To prevent errors when writing new types of callbacks or inline operations, we split callbacks data to distinct types. Reviewed-by: Richard Henderson Signed-off-by: Pierrick Bouvier Message-Id: <20240502211522.346467-8-pierrick.bouvier@linaro.org> Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Michael S. Tsirkin --- include/qemu/plugin.h | 46 ++++++++++++++----------- plugins/plugin.h | 2 +- accel/tcg/plugin-gen.c | 58 +++++++++++++++++--------------- plugins/core.c | 76 ++++++++++++++++++++++-------------------- 4 files changed, 98 insertions(+), 84 deletions(-) diff --git a/include/qemu/plugin.h b/include/qemu/plugin.h index c7b3b1cd66..98d27dded9 100644 --- a/include/qemu/plugin.h +++ b/include/qemu/plugin.h @@ -74,34 +74,40 @@ enum plugin_dyn_cb_type { PLUGIN_CB_INLINE_STORE_U64, }; =20 +struct qemu_plugin_regular_cb { + union qemu_plugin_cb_sig f; + TCGHelperInfo *info; + void *userp; + enum qemu_plugin_mem_rw rw; +}; + +struct qemu_plugin_inline_cb { + qemu_plugin_u64 entry; + enum qemu_plugin_op op; + uint64_t imm; + enum qemu_plugin_mem_rw rw; +}; + +struct qemu_plugin_conditional_cb { + union qemu_plugin_cb_sig f; + TCGHelperInfo *info; + void *userp; + qemu_plugin_u64 entry; + enum qemu_plugin_cond cond; + uint64_t imm; +}; + /* * A dynamic callback has an insertion point that is determined at run-tim= e. * Usually the insertion point is somewhere in the code cache; think for * instance of a callback to be called upon the execution of a particular = TB. */ struct qemu_plugin_dyn_cb { - void *userp; enum plugin_dyn_cb_type type; - /* @rw applies to mem callbacks only (both regular and inline) */ - enum qemu_plugin_mem_rw rw; - /* fields specific to each dyn_cb type go here */ union { - struct { - union qemu_plugin_cb_sig f; - TCGHelperInfo *info; - } regular; - struct { - union qemu_plugin_cb_sig f; - TCGHelperInfo *info; - qemu_plugin_u64 entry; - enum qemu_plugin_cond cond; - uint64_t imm; - } cond; - struct { - qemu_plugin_u64 entry; - enum qemu_plugin_op op; - uint64_t imm; - } inline_insn; + struct qemu_plugin_regular_cb regular; + struct qemu_plugin_conditional_cb cond; + struct qemu_plugin_inline_cb inline_insn; }; }; =20 diff --git a/plugins/plugin.h b/plugins/plugin.h index 7d4b4e21f7..80d5daa917 100644 --- a/plugins/plugin.h +++ b/plugins/plugin.h @@ -108,7 +108,7 @@ void plugin_register_vcpu_mem_cb(GArray **arr, enum qemu_plugin_mem_rw rw, void *udata); =20 -void exec_inline_op(struct qemu_plugin_dyn_cb *cb, int cpu_index); +void exec_inline_op(struct qemu_plugin_inline_cb *cb, int cpu_index); =20 int plugin_num_vcpus(void); =20 diff --git a/accel/tcg/plugin-gen.c b/accel/tcg/plugin-gen.c index f2190f3511..e018728573 100644 --- a/accel/tcg/plugin-gen.c +++ b/accel/tcg/plugin-gen.c @@ -101,13 +101,13 @@ static void gen_disable_mem_helper(void) offsetof(ArchCPU, env)); } =20 -static void gen_udata_cb(struct qemu_plugin_dyn_cb *cb) +static void gen_udata_cb(struct qemu_plugin_regular_cb *cb) { TCGv_i32 cpu_index =3D tcg_temp_ebb_new_i32(); =20 tcg_gen_ld_i32(cpu_index, tcg_env, -offsetof(ArchCPU, env) + offsetof(CPUState, cpu_index)= ); - tcg_gen_call2(cb->regular.f.vcpu_udata, cb->regular.info, NULL, + tcg_gen_call2(cb->f.vcpu_udata, cb->info, NULL, tcgv_i32_temp(cpu_index), tcgv_ptr_temp(tcg_constant_ptr(cb->userp))); tcg_temp_free_i32(cpu_index); @@ -153,21 +153,21 @@ static TCGCond plugin_cond_to_tcgcond(enum qemu_plugi= n_cond cond) } } =20 -static void gen_udata_cond_cb(struct qemu_plugin_dyn_cb *cb) +static void gen_udata_cond_cb(struct qemu_plugin_conditional_cb *cb) { - TCGv_ptr ptr =3D gen_plugin_u64_ptr(cb->cond.entry); + TCGv_ptr ptr =3D gen_plugin_u64_ptr(cb->entry); TCGv_i32 cpu_index =3D tcg_temp_ebb_new_i32(); TCGv_i64 val =3D tcg_temp_ebb_new_i64(); TCGLabel *after_cb =3D gen_new_label(); =20 /* Condition should be negated, as calling the cb is the "else" path */ - TCGCond cond =3D tcg_invert_cond(plugin_cond_to_tcgcond(cb->cond.cond)= ); + TCGCond cond =3D tcg_invert_cond(plugin_cond_to_tcgcond(cb->cond)); =20 tcg_gen_ld_i64(val, ptr, 0); - tcg_gen_brcondi_i64(cond, val, cb->cond.imm, after_cb); + tcg_gen_brcondi_i64(cond, val, cb->imm, after_cb); tcg_gen_ld_i32(cpu_index, tcg_env, -offsetof(ArchCPU, env) + offsetof(CPUState, cpu_index)= ); - tcg_gen_call2(cb->cond.f.vcpu_udata, cb->cond.info, NULL, + tcg_gen_call2(cb->f.vcpu_udata, cb->info, NULL, tcgv_i32_temp(cpu_index), tcgv_ptr_temp(tcg_constant_ptr(cb->userp))); gen_set_label(after_cb); @@ -177,37 +177,37 @@ static void gen_udata_cond_cb(struct qemu_plugin_dyn_= cb *cb) tcg_temp_free_ptr(ptr); } =20 -static void gen_inline_add_u64_cb(struct qemu_plugin_dyn_cb *cb) +static void gen_inline_add_u64_cb(struct qemu_plugin_inline_cb *cb) { - TCGv_ptr ptr =3D gen_plugin_u64_ptr(cb->inline_insn.entry); + TCGv_ptr ptr =3D gen_plugin_u64_ptr(cb->entry); TCGv_i64 val =3D tcg_temp_ebb_new_i64(); =20 tcg_gen_ld_i64(val, ptr, 0); - tcg_gen_addi_i64(val, val, cb->inline_insn.imm); + tcg_gen_addi_i64(val, val, cb->imm); tcg_gen_st_i64(val, ptr, 0); =20 tcg_temp_free_i64(val); tcg_temp_free_ptr(ptr); } =20 -static void gen_inline_store_u64_cb(struct qemu_plugin_dyn_cb *cb) +static void gen_inline_store_u64_cb(struct qemu_plugin_inline_cb *cb) { - TCGv_ptr ptr =3D gen_plugin_u64_ptr(cb->inline_insn.entry); - TCGv_i64 val =3D tcg_constant_i64(cb->inline_insn.imm); + TCGv_ptr ptr =3D gen_plugin_u64_ptr(cb->entry); + TCGv_i64 val =3D tcg_constant_i64(cb->imm); =20 tcg_gen_st_i64(val, ptr, 0); =20 tcg_temp_free_ptr(ptr); } =20 -static void gen_mem_cb(struct qemu_plugin_dyn_cb *cb, +static void gen_mem_cb(struct qemu_plugin_regular_cb *cb, qemu_plugin_meminfo_t meminfo, TCGv_i64 addr) { TCGv_i32 cpu_index =3D tcg_temp_ebb_new_i32(); =20 tcg_gen_ld_i32(cpu_index, tcg_env, -offsetof(ArchCPU, env) + offsetof(CPUState, cpu_index)= ); - tcg_gen_call4(cb->regular.f.vcpu_mem, cb->regular.info, NULL, + tcg_gen_call4(cb->f.vcpu_mem, cb->info, NULL, tcgv_i32_temp(cpu_index), tcgv_i32_temp(tcg_constant_i32(meminfo)), tcgv_i64_temp(addr), @@ -220,16 +220,16 @@ static void inject_cb(struct qemu_plugin_dyn_cb *cb) { switch (cb->type) { case PLUGIN_CB_REGULAR: - gen_udata_cb(cb); + gen_udata_cb(&cb->regular); break; case PLUGIN_CB_COND: - gen_udata_cond_cb(cb); + gen_udata_cond_cb(&cb->cond); break; case PLUGIN_CB_INLINE_ADD_U64: - gen_inline_add_u64_cb(cb); + gen_inline_add_u64_cb(&cb->inline_insn); break; case PLUGIN_CB_INLINE_STORE_U64: - gen_inline_store_u64_cb(cb); + gen_inline_store_u64_cb(&cb->inline_insn); break; default: g_assert_not_reached(); @@ -240,15 +240,21 @@ static void inject_mem_cb(struct qemu_plugin_dyn_cb *= cb, enum qemu_plugin_mem_rw rw, qemu_plugin_meminfo_t meminfo, TCGv_i64 addr) { - if (cb->rw & rw) { - switch (cb->type) { - case PLUGIN_CB_MEM_REGULAR: - gen_mem_cb(cb, meminfo, addr); - break; - default: + switch (cb->type) { + case PLUGIN_CB_MEM_REGULAR: + if (rw && cb->regular.rw) { + gen_mem_cb(&cb->regular, meminfo, addr); + } + break; + case PLUGIN_CB_INLINE_ADD_U64: + case PLUGIN_CB_INLINE_STORE_U64: + if (rw && cb->inline_insn.rw) { inject_cb(cb); - break; } + break; + default: + g_assert_not_reached(); + break; } } =20 diff --git a/plugins/core.c b/plugins/core.c index 332474a5bc..1c85edc5e5 100644 --- a/plugins/core.c +++ b/plugins/core.c @@ -336,13 +336,13 @@ void plugin_register_inline_op_on_entry(GArray **arr, { struct qemu_plugin_dyn_cb *dyn_cb; =20 + struct qemu_plugin_inline_cb inline_cb =3D { .rw =3D rw, + .entry =3D entry, + .op =3D op, + .imm =3D imm }; dyn_cb =3D plugin_get_dyn_cb(arr); - dyn_cb->userp =3D NULL; dyn_cb->type =3D op_to_cb_type(op); - dyn_cb->rw =3D rw; - dyn_cb->inline_insn.entry =3D entry; - dyn_cb->inline_insn.op =3D op; - dyn_cb->inline_insn.imm =3D imm; + dyn_cb->inline_insn =3D inline_cb; } =20 void plugin_register_dyn_cb__udata(GArray **arr, @@ -361,14 +361,14 @@ void plugin_register_dyn_cb__udata(GArray **arr, dh_typemask(i32, 1) | dh_typemask(ptr, 2)) }; + assert((unsigned)flags < ARRAY_SIZE(info)); =20 struct qemu_plugin_dyn_cb *dyn_cb =3D plugin_get_dyn_cb(arr); - dyn_cb->userp =3D udata; + struct qemu_plugin_regular_cb regular_cb =3D { .f.vcpu_udata =3D cb, + .userp =3D udata, + .info =3D &info[flags] }; dyn_cb->type =3D PLUGIN_CB_REGULAR; - dyn_cb->regular.f.vcpu_udata =3D cb; - - assert((unsigned)flags < ARRAY_SIZE(info)); - dyn_cb->regular.info =3D &info[flags]; + dyn_cb->regular =3D regular_cb; } =20 void plugin_register_dyn_cond_cb__udata(GArray **arr, @@ -390,17 +390,17 @@ void plugin_register_dyn_cond_cb__udata(GArray **arr, dh_typemask(i32, 1) | dh_typemask(ptr, 2)) }; + assert((unsigned)flags < ARRAY_SIZE(info)); =20 struct qemu_plugin_dyn_cb *dyn_cb =3D plugin_get_dyn_cb(arr); - dyn_cb->userp =3D udata; + struct qemu_plugin_conditional_cb cond_cb =3D { .userp =3D udata, + .f.vcpu_udata =3D cb, + .cond =3D cond, + .entry =3D entry, + .imm =3D imm, + .info =3D &info[flags] }; dyn_cb->type =3D PLUGIN_CB_COND; - dyn_cb->cond.f.vcpu_udata =3D cb; - dyn_cb->cond.cond =3D cond; - dyn_cb->cond.entry =3D entry; - dyn_cb->cond.imm =3D imm; - - assert((unsigned)flags < ARRAY_SIZE(info)); - dyn_cb->cond.info =3D &info[flags]; + dyn_cb->cond =3D cond_cb; } =20 void plugin_register_vcpu_mem_cb(GArray **arr, @@ -432,15 +432,15 @@ void plugin_register_vcpu_mem_cb(GArray **arr, dh_typemask(i64, 3) | dh_typemask(ptr, 4)) }; + assert((unsigned)flags < ARRAY_SIZE(info)); =20 struct qemu_plugin_dyn_cb *dyn_cb =3D plugin_get_dyn_cb(arr); - dyn_cb->userp =3D udata; + struct qemu_plugin_regular_cb regular_cb =3D { .userp =3D udata, + .rw =3D rw, + .f.vcpu_mem =3D cb, + .info =3D &info[flags] }; dyn_cb->type =3D PLUGIN_CB_MEM_REGULAR; - dyn_cb->rw =3D rw; - dyn_cb->regular.f.vcpu_mem =3D cb; - - assert((unsigned)flags < ARRAY_SIZE(info)); - dyn_cb->regular.info =3D &info[flags]; + dyn_cb->regular =3D regular_cb; } =20 /* @@ -557,20 +557,20 @@ void qemu_plugin_flush_cb(void) plugin_cb__simple(QEMU_PLUGIN_EV_FLUSH); } =20 -void exec_inline_op(struct qemu_plugin_dyn_cb *cb, int cpu_index) +void exec_inline_op(struct qemu_plugin_inline_cb *cb, int cpu_index) { - char *ptr =3D cb->inline_insn.entry.score->data->data; + char *ptr =3D cb->entry.score->data->data; size_t elem_size =3D g_array_get_element_size( - cb->inline_insn.entry.score->data); - size_t offset =3D cb->inline_insn.entry.offset; + cb->entry.score->data); + size_t offset =3D cb->entry.offset; uint64_t *val =3D (uint64_t *)(ptr + offset + cpu_index * elem_size); =20 - switch (cb->inline_insn.op) { + switch (cb->op) { case QEMU_PLUGIN_INLINE_ADD_U64: - *val +=3D cb->inline_insn.imm; + *val +=3D cb->imm; break; case QEMU_PLUGIN_INLINE_STORE_U64: - *val =3D cb->inline_insn.imm; + *val =3D cb->imm; break; default: g_assert_not_reached(); @@ -590,17 +590,19 @@ void qemu_plugin_vcpu_mem_cb(CPUState *cpu, uint64_t = vaddr, struct qemu_plugin_dyn_cb *cb =3D &g_array_index(arr, struct qemu_plugin_dyn_cb, i); =20 - if (!(rw & cb->rw)) { - break; - } switch (cb->type) { case PLUGIN_CB_MEM_REGULAR: - cb->regular.f.vcpu_mem(cpu->cpu_index, make_plugin_meminfo(oi,= rw), - vaddr, cb->userp); + if (rw && cb->regular.rw) { + cb->regular.f.vcpu_mem(cpu->cpu_index, + make_plugin_meminfo(oi, rw), + vaddr, cb->regular.userp); + } break; case PLUGIN_CB_INLINE_ADD_U64: case PLUGIN_CB_INLINE_STORE_U64: - exec_inline_op(cb, cpu->cpu_index); + if (rw && cb->inline_insn.rw) { + exec_inline_op(&cb->inline_insn, cpu->cpu_index); + } break; default: g_assert_not_reached(); --=20 2.39.2 From nobody Mon Nov 25 09:38:16 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1715708731; cv=none; d=zohomail.com; s=zohoarc; b=c3ve/qHlLVVZCwMZu3ScCASobTSnkmiddVtk3A7FHWeiNC8gs70j8+fjmVEENBbko9Co2nc1ost9i+CX4Cu5YOT9Hge8PhPZLIsWZ2ShbCv9rJRxt2vh4u9wztV3GkwSAF2RXy5+/WMptVVvfwRMlFq0KKMNFjmVbjhW8/Xq1MU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1715708731; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:Subject:To:To:Message-Id:Reply-To; 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Tue, 14 May 2024 10:43:02 -0700 (PDT) From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , Paolo Bonzini , qemu-arm@nongnu.org, Richard Henderson , Alexandre Iooss , Pierrick Bouvier , Cornelia Huck , Peter Maydell , "Michael S. Tsirkin" , Mahmoud Mandour Subject: [PATCH 10/11] plugins: extract cpu_index generate Date: Tue, 14 May 2024 18:42:52 +0100 Message-Id: <20240514174253.694591-11-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240514174253.694591-1-alex.bennee@linaro.org> References: <20240514174253.694591-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::136; envelope-from=alex.bennee@linaro.org; helo=mail-lf1-x136.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1715708731530100001 From: Pierrick Bouvier Factorizes function to access current cpu index for a given vcpu. Reviewed-by: Richard Henderson Signed-off-by: Pierrick Bouvier Message-Id: <20240502211522.346467-9-pierrick.bouvier@linaro.org> Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Michael S. Tsirkin --- accel/tcg/plugin-gen.c | 24 +++++++++++------------- 1 file changed, 11 insertions(+), 13 deletions(-) diff --git a/accel/tcg/plugin-gen.c b/accel/tcg/plugin-gen.c index e018728573..c9b298667f 100644 --- a/accel/tcg/plugin-gen.c +++ b/accel/tcg/plugin-gen.c @@ -101,12 +101,17 @@ static void gen_disable_mem_helper(void) offsetof(ArchCPU, env)); } =20 -static void gen_udata_cb(struct qemu_plugin_regular_cb *cb) +static TCGv_i32 gen_cpu_index(void) { TCGv_i32 cpu_index =3D tcg_temp_ebb_new_i32(); - tcg_gen_ld_i32(cpu_index, tcg_env, -offsetof(ArchCPU, env) + offsetof(CPUState, cpu_index)= ); + return cpu_index; +} + +static void gen_udata_cb(struct qemu_plugin_regular_cb *cb) +{ + TCGv_i32 cpu_index =3D gen_cpu_index(); tcg_gen_call2(cb->f.vcpu_udata, cb->info, NULL, tcgv_i32_temp(cpu_index), tcgv_ptr_temp(tcg_constant_ptr(cb->userp))); @@ -121,9 +126,7 @@ static TCGv_ptr gen_plugin_u64_ptr(qemu_plugin_u64 entr= y) char *base_ptr =3D arr->data + entry.offset; size_t entry_size =3D g_array_get_element_size(arr); =20 - TCGv_i32 cpu_index =3D tcg_temp_ebb_new_i32(); - tcg_gen_ld_i32(cpu_index, tcg_env, - -offsetof(ArchCPU, env) + offsetof(CPUState, cpu_index)= ); + TCGv_i32 cpu_index =3D gen_cpu_index(); tcg_gen_muli_i32(cpu_index, cpu_index, entry_size); tcg_gen_ext_i32_ptr(ptr, cpu_index); tcg_temp_free_i32(cpu_index); @@ -156,7 +159,6 @@ static TCGCond plugin_cond_to_tcgcond(enum qemu_plugin_= cond cond) static void gen_udata_cond_cb(struct qemu_plugin_conditional_cb *cb) { TCGv_ptr ptr =3D gen_plugin_u64_ptr(cb->entry); - TCGv_i32 cpu_index =3D tcg_temp_ebb_new_i32(); TCGv_i64 val =3D tcg_temp_ebb_new_i64(); TCGLabel *after_cb =3D gen_new_label(); =20 @@ -165,15 +167,14 @@ static void gen_udata_cond_cb(struct qemu_plugin_cond= itional_cb *cb) =20 tcg_gen_ld_i64(val, ptr, 0); tcg_gen_brcondi_i64(cond, val, cb->imm, after_cb); - tcg_gen_ld_i32(cpu_index, tcg_env, - -offsetof(ArchCPU, env) + offsetof(CPUState, cpu_index)= ); + TCGv_i32 cpu_index =3D gen_cpu_index(); tcg_gen_call2(cb->f.vcpu_udata, cb->info, NULL, tcgv_i32_temp(cpu_index), tcgv_ptr_temp(tcg_constant_ptr(cb->userp))); + tcg_temp_free_i32(cpu_index); gen_set_label(after_cb); =20 tcg_temp_free_i64(val); - tcg_temp_free_i32(cpu_index); tcg_temp_free_ptr(ptr); } =20 @@ -203,10 +204,7 @@ static void gen_inline_store_u64_cb(struct qemu_plugin= _inline_cb *cb) static void gen_mem_cb(struct qemu_plugin_regular_cb *cb, qemu_plugin_meminfo_t meminfo, TCGv_i64 addr) { - TCGv_i32 cpu_index =3D tcg_temp_ebb_new_i32(); - - tcg_gen_ld_i32(cpu_index, tcg_env, - -offsetof(ArchCPU, env) + offsetof(CPUState, cpu_index)= ); + TCGv_i32 cpu_index =3D gen_cpu_index(); tcg_gen_call4(cb->f.vcpu_mem, cb->info, NULL, tcgv_i32_temp(cpu_index), tcgv_i32_temp(tcg_constant_i32(meminfo)), --=20 2.39.2 From nobody Mon Nov 25 09:38:16 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=pass(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; 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Tsirkin" , Mahmoud Mandour Subject: [PATCH 11/11] plugins: remove op from qemu_plugin_inline_cb Date: Tue, 14 May 2024 18:42:53 +0100 Message-Id: <20240514174253.694591-12-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240514174253.694591-1-alex.bennee@linaro.org> References: <20240514174253.694591-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::534; envelope-from=alex.bennee@linaro.org; helo=mail-ed1-x534.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1715708920467100003 From: Pierrick Bouvier This field is not needed as the callback type already holds this information. Reviewed-by: Richard Henderson Signed-off-by: Pierrick Bouvier Message-Id: <20240502211522.346467-10-pierrick.bouvier@linaro.org> Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Michael S. Tsirkin --- include/qemu/plugin.h | 1 - plugins/plugin.h | 4 +++- plugins/core.c | 13 +++++++------ 3 files changed, 10 insertions(+), 8 deletions(-) diff --git a/include/qemu/plugin.h b/include/qemu/plugin.h index 98d27dded9..796fc13706 100644 --- a/include/qemu/plugin.h +++ b/include/qemu/plugin.h @@ -83,7 +83,6 @@ struct qemu_plugin_regular_cb { =20 struct qemu_plugin_inline_cb { qemu_plugin_u64 entry; - enum qemu_plugin_op op; uint64_t imm; enum qemu_plugin_mem_rw rw; }; diff --git a/plugins/plugin.h b/plugins/plugin.h index 80d5daa917..30e2299a54 100644 --- a/plugins/plugin.h +++ b/plugins/plugin.h @@ -108,7 +108,9 @@ void plugin_register_vcpu_mem_cb(GArray **arr, enum qemu_plugin_mem_rw rw, void *udata); =20 -void exec_inline_op(struct qemu_plugin_inline_cb *cb, int cpu_index); +void exec_inline_op(enum plugin_dyn_cb_type type, + struct qemu_plugin_inline_cb *cb, + int cpu_index); =20 int plugin_num_vcpus(void); =20 diff --git a/plugins/core.c b/plugins/core.c index 1c85edc5e5..0726bc7f25 100644 --- a/plugins/core.c +++ b/plugins/core.c @@ -338,7 +338,6 @@ void plugin_register_inline_op_on_entry(GArray **arr, =20 struct qemu_plugin_inline_cb inline_cb =3D { .rw =3D rw, .entry =3D entry, - .op =3D op, .imm =3D imm }; dyn_cb =3D plugin_get_dyn_cb(arr); dyn_cb->type =3D op_to_cb_type(op); @@ -557,7 +556,9 @@ void qemu_plugin_flush_cb(void) plugin_cb__simple(QEMU_PLUGIN_EV_FLUSH); } =20 -void exec_inline_op(struct qemu_plugin_inline_cb *cb, int cpu_index) +void exec_inline_op(enum plugin_dyn_cb_type type, + struct qemu_plugin_inline_cb *cb, + int cpu_index) { char *ptr =3D cb->entry.score->data->data; size_t elem_size =3D g_array_get_element_size( @@ -565,11 +566,11 @@ void exec_inline_op(struct qemu_plugin_inline_cb *cb,= int cpu_index) size_t offset =3D cb->entry.offset; uint64_t *val =3D (uint64_t *)(ptr + offset + cpu_index * elem_size); =20 - switch (cb->op) { - case QEMU_PLUGIN_INLINE_ADD_U64: + switch (type) { + case PLUGIN_CB_INLINE_ADD_U64: *val +=3D cb->imm; break; - case QEMU_PLUGIN_INLINE_STORE_U64: + case PLUGIN_CB_INLINE_STORE_U64: *val =3D cb->imm; break; default: @@ -601,7 +602,7 @@ void qemu_plugin_vcpu_mem_cb(CPUState *cpu, uint64_t va= ddr, case PLUGIN_CB_INLINE_ADD_U64: case PLUGIN_CB_INLINE_STORE_U64: if (rw && cb->inline_insn.rw) { - exec_inline_op(&cb->inline_insn, cpu->cpu_index); + exec_inline_op(cb->type, &cb->inline_insn, cpu->cpu_index); } break; default: --=20 2.39.2