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Wed, 08 May 2024 05:31:22 -0700 (PDT) From: Minwoo Im To: Klaus Jensen , Keith Busch Cc: qemu-devel@nongnu.org, qemu-block@nongnu.org, Minwoo Im , Klaus Jensen Subject: [PATCH v3 4/4] hw/nvme: Expand VI/VQ resource to uint32 Date: Wed, 8 May 2024 21:31:07 +0900 Message-Id: <20240508123107.87919-5-minwoo.im.dev@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240508123107.87919-1-minwoo.im.dev@gmail.com> References: <20240508123107.87919-1-minwoo.im.dev@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62b; envelope-from=minwoo.im.dev@gmail.com; helo=mail-pl1-x62b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1715171535528100002 Content-Type: text/plain; charset="utf-8" From: Minwoo Im VI and VQ resources cover queue resources in each VFs in SR-IOV. Current maximum I/O queue pair size is 0xffff, we can expand them to cover the full number of I/O queue pairs. This patch also fixed Identify Secondary Controller List overflow due to expand of number of secondary controllers. Signed-off-by: Minwoo Im Reviewed-by: Klaus Jensen --- hw/nvme/ctrl.c | 8 ++++---- hw/nvme/nvme.h | 4 ++-- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/hw/nvme/ctrl.c b/hw/nvme/ctrl.c index 8db6828ab2a9..5a94f47b1cf1 100644 --- a/hw/nvme/ctrl.c +++ b/hw/nvme/ctrl.c @@ -8460,10 +8460,10 @@ static Property nvme_props[] =3D { params.sriov_vq_flexible, 0), DEFINE_PROP_UINT16("sriov_vi_flexible", NvmeCtrl, params.sriov_vi_flexible, 0), - DEFINE_PROP_UINT8("sriov_max_vi_per_vf", NvmeCtrl, - params.sriov_max_vi_per_vf, 0), - DEFINE_PROP_UINT8("sriov_max_vq_per_vf", NvmeCtrl, - params.sriov_max_vq_per_vf, 0), + DEFINE_PROP_UINT32("sriov_max_vi_per_vf", NvmeCtrl, + params.sriov_max_vi_per_vf, 0), + DEFINE_PROP_UINT32("sriov_max_vq_per_vf", NvmeCtrl, + params.sriov_max_vq_per_vf, 0), DEFINE_PROP_BOOL("msix-exclusive-bar", NvmeCtrl, params.msix_exclusive= _bar, false), DEFINE_PROP_END_OF_LIST(), diff --git a/hw/nvme/nvme.h b/hw/nvme/nvme.h index cc6b4a3a64c2..aa708725c875 100644 --- a/hw/nvme/nvme.h +++ b/hw/nvme/nvme.h @@ -534,8 +534,8 @@ typedef struct NvmeParams { uint32_t sriov_max_vfs; uint16_t sriov_vq_flexible; uint16_t sriov_vi_flexible; - uint8_t sriov_max_vq_per_vf; - uint8_t sriov_max_vi_per_vf; + uint32_t sriov_max_vq_per_vf; + uint32_t sriov_max_vi_per_vf; bool msix_exclusive_bar; } NvmeParams; =20 --=20 2.34.1