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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240508-loongson3-ipi-v1-5-1a7b67704664@flygoat.com> References: <20240508-loongson3-ipi-v1-0-1a7b67704664@flygoat.com> In-Reply-To: <20240508-loongson3-ipi-v1-0-1a7b67704664@flygoat.com> To: qemu-devel@nongnu.org Cc: Huacai Chen , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Song Gao , Jiaxun Yang X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=5935; i=jiaxun.yang@flygoat.com; h=from:subject:message-id; bh=42RH1oyQ4ZbhZ7p6E7IwxbgswyXKZxwfM2nsZMpXqU8=; b=owGbwMvMwCHmXMhTe71c8zDjabUkhjTriucBEdaTbeJiz8p5Te99dm5a6bSdnZMy3nV52z7xe F0Veqijo5SFQYyDQVZMkSVEQKlvQ+PFBdcfZP2BmcPKBDKEgYtTACZyvoyRYb/zSYv3H4/11ST9 j+Pl6j3x37ZuO6vU+22X3Op7ZjzJY2b4KxR4eq/TfpHbLLOvLsyPlnb72um+PUL3943ohoKzNle 3cgEA X-Developer-Key: i=jiaxun.yang@flygoat.com; a=openpgp; fpr=980379BEFEBFBF477EA04EF9C111949073FC0F67 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=103.168.172.156; envelope-from=jiaxun.yang@flygoat.com; helo=fhigh5-smtp.messagingengine.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @flygoat.com) X-ZM-MESSAGEID: 1715173647255100003 Wire up loongson_ipi device for loongson3_virt machine, so we can have SMP support for TCG backend as well. Signed-off-by: Jiaxun Yang --- hw/mips/Kconfig | 1 + hw/mips/loongson3_bootp.c | 2 -- hw/mips/loongson3_bootp.h | 3 +++ hw/mips/loongson3_virt.c | 39 +++++++++++++++++++++++++++++++++++++-- 4 files changed, 41 insertions(+), 4 deletions(-) diff --git a/hw/mips/Kconfig b/hw/mips/Kconfig index 5c83ef49cf6f..6f09fedc946e 100644 --- a/hw/mips/Kconfig +++ b/hw/mips/Kconfig @@ -57,6 +57,7 @@ config LOONGSON3V imply USB_OHCI_PCI select SERIAL select GOLDFISH_RTC + select LOONGSON_IPI select LOONGSON_LIOINTC select PCI_EXPRESS_GENERIC_BRIDGE select MSI_NONBROKEN diff --git a/hw/mips/loongson3_bootp.c b/hw/mips/loongson3_bootp.c index f99af229327a..474d3556b2e5 100644 --- a/hw/mips/loongson3_bootp.c +++ b/hw/mips/loongson3_bootp.c @@ -25,8 +25,6 @@ #include "hw/boards.h" #include "hw/mips/loongson3_bootp.h" =20 -#define LOONGSON3_CORE_PER_NODE 4 - static void init_cpu_info(void *g_cpuinfo, uint64_t cpu_freq) { struct efi_cpuinfo_loongson *c =3D g_cpuinfo; diff --git a/hw/mips/loongson3_bootp.h b/hw/mips/loongson3_bootp.h index 1b0dd3b59171..9091265df7fc 100644 --- a/hw/mips/loongson3_bootp.h +++ b/hw/mips/loongson3_bootp.h @@ -200,6 +200,8 @@ struct boot_params { struct efi_reset_system_t reset_system; }; =20 +#define LOONGSON3_CORE_PER_NODE 4 + /* Overall MMIO & Memory layout */ enum { VIRT_LOWMEM, @@ -211,6 +213,7 @@ enum { VIRT_BIOS_ROM, VIRT_UART, VIRT_LIOINTC, + VIRT_IPI, VIRT_PCIE_MMIO, VIRT_HIGHMEM }; diff --git a/hw/mips/loongson3_virt.c b/hw/mips/loongson3_virt.c index b10a611a98f4..1052fb7d6747 100644 --- a/hw/mips/loongson3_virt.c +++ b/hw/mips/loongson3_virt.c @@ -36,6 +36,7 @@ #include "hw/mips/loongson3_bootp.h" #include "hw/misc/unimp.h" #include "hw/intc/i8259.h" +#include "hw/intc/loongson_ipi.h" #include "hw/loader.h" #include "hw/isa/superio.h" #include "hw/pci/msi.h" @@ -74,6 +75,7 @@ const MemMapEntry virt_memmap[] =3D { [VIRT_PCIE_ECAM] =3D { 0x1a000000, 0x2000000 }, [VIRT_BIOS_ROM] =3D { 0x1fc00000, 0x200000 }, [VIRT_UART] =3D { 0x1fe001e0, 0x8 }, + [VIRT_IPI] =3D { 0x3ff01000, 0x400 }, [VIRT_LIOINTC] =3D { 0x3ff01400, 0x64 }, [VIRT_PCIE_MMIO] =3D { 0x40000000, 0x40000000 }, [VIRT_HIGHMEM] =3D { 0x80000000, 0x0 }, /* Variable */ @@ -466,6 +468,7 @@ static void mips_loongson3_virt_init(MachineState *mach= ine) Clock *cpuclk; CPUMIPSState *env; DeviceState *liointc; + DeviceState *ipi =3D NULL; char *filename; const char *kernel_cmdline =3D machine->kernel_cmdline; const char *kernel_filename =3D machine->kernel_filename; @@ -475,6 +478,7 @@ static void mips_loongson3_virt_init(MachineState *mach= ine) MemoryRegion *ram =3D g_new(MemoryRegion, 1); MemoryRegion *bios =3D g_new(MemoryRegion, 1); MemoryRegion *iomem =3D g_new(MemoryRegion, 1); + MemoryRegion *iocsr =3D g_new(MemoryRegion, 1); =20 /* TODO: TCG will support all CPU types */ if (!kvm_enabled()) { @@ -508,6 +512,19 @@ static void mips_loongson3_virt_init(MachineState *mac= hine) create_unimplemented_device("mmio fallback 0", 0x10000000, 256 * MiB); create_unimplemented_device("mmio fallback 1", 0x30000000, 256 * MiB); =20 + memory_region_init(iocsr, OBJECT(machine), "loongson3.iocsr", UINT32_M= AX); + + /* IPI controller is in kernel for KVM */ + if (!kvm_enabled()) { + ipi =3D qdev_new(TYPE_LOONGSON_IPI); + qdev_prop_set_uint32(ipi, "num-cpu", machine->smp.cpus); + sysbus_realize_and_unref(SYS_BUS_DEVICE(ipi), &error_fatal); + memory_region_add_subregion(iocsr, SMP_IPI_MAILBOX, + sysbus_mmio_get_region(SYS_BUS_DEVICE(ipi), 0)); + memory_region_add_subregion(iocsr, MAIL_SEND_ADDR, + sysbus_mmio_get_region(SYS_BUS_DEVICE(ipi), 1)); + } + liointc =3D qdev_new("loongson.liointc"); sysbus_realize_and_unref(SYS_BUS_DEVICE(liointc), &error_fatal); =20 @@ -524,6 +541,8 @@ static void mips_loongson3_virt_init(MachineState *mach= ine) clock_set_hz(cpuclk, DEF_LOONGSON3_FREQ); =20 for (i =3D 0; i < machine->smp.cpus; i++) { + int node =3D i / LOONGSON3_CORE_PER_NODE; + int core =3D i % LOONGSON3_CORE_PER_NODE; int ip; =20 /* init CPUs */ @@ -534,12 +553,28 @@ static void mips_loongson3_virt_init(MachineState *ma= chine) cpu_mips_clock_init(cpu); qemu_register_reset(main_cpu_reset, cpu); =20 - if (i >=3D 4) { + if (ipi) { + hwaddr base =3D ((hwaddr)node << 44) + virt_memmap[VIRT_IPI].b= ase; + base +=3D core * 0x100; + qdev_connect_gpio_out(ipi, i, cpu->env.irq[6]); + sysbus_mmio_map(SYS_BUS_DEVICE(ipi), i + 2, base); + } + + if (ase_lcsr_available(&MIPS_CPU(cpu)->env)) { + MemoryRegion *core_iocsr =3D g_new(MemoryRegion, 1); + g_autofree char *name =3D g_strdup_printf("loongson3.core%d_io= csr", i); + memory_region_init_alias(core_iocsr, OBJECT(machine), name, + iocsr, 0, UINT32_MAX); + memory_region_add_subregion(&MIPS_CPU(cpu)->env.iocsr.mr, + 0, core_iocsr); + } + + if (node > 0) { continue; /* Only node-0 can be connected to LIOINTC */ } =20 for (ip =3D 0; ip < 4 ; ip++) { - int pin =3D i * 4 + ip; + int pin =3D core * LOONGSON3_CORE_PER_NODE + ip; sysbus_connect_irq(SYS_BUS_DEVICE(liointc), pin, cpu->env.irq[ip + 2]); } --=20 2.34.1