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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20240508-loongson3-ipi-v1-3-1a7b67704664@flygoat.com> References: <20240508-loongson3-ipi-v1-0-1a7b67704664@flygoat.com> In-Reply-To: <20240508-loongson3-ipi-v1-0-1a7b67704664@flygoat.com> To: qemu-devel@nongnu.org Cc: Huacai Chen , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Song Gao , Jiaxun Yang X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=3718; i=jiaxun.yang@flygoat.com; h=from:subject:message-id; bh=PYbuGxcd6pEm0Ln8w/B+W6SOya2Obyp8DMZLrbncebg=; b=owGbwMvMwCHmXMhTe71c8zDjabUkhjTriuc3mW5npLZ8fLlx5aeErPuaD+r/PLmhz/v+y4egM 90vnRaUd5SyMIhxMMiKKbKECCj1bWi8uOD6g6w/MHNYmUCGMHBxCsBE7DgY/jvarr26I9X8Pk+p rUjSg0WapdOZ1l2Iezpz+ory+pYjv28wMlz+K710wcpfX+q4tr92TuxhTWZ0TpGNiZwuuv7wuUa 3ORwA X-Developer-Key: i=jiaxun.yang@flygoat.com; a=openpgp; fpr=980379BEFEBFBF477EA04EF9C111949073FC0F67 Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=103.168.172.144; envelope-from=jiaxun.yang@flygoat.com; helo=fout1-smtp.messagingengine.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @flygoat.com) X-ZM-MESSAGEID: 1715173669271100003 Implement IOCSR address space get functions for MIPS/Loongson CPUs. For MIPS/Loongson without IOCSR (i.e. Loongson-3A1000), get_cpu_iocsr_as will return as null, and send_ipi_data will fail with MEMTX_DECODE_ERROR, which matches expected behavior on hardware. Signed-off-by: Jiaxun Yang Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- I understand that there was a review comment stating that I shouldn't use TARGET_* macros in device drivers. But I still think this is the best way to handle architectural difference. There are many TARGET_* usages in hw/virtio for similiar purpose. --- hw/intc/loongson_ipi.c | 39 ++++++++++++++++++++++++++++++--------- 1 file changed, 30 insertions(+), 9 deletions(-) diff --git a/hw/intc/loongson_ipi.c b/hw/intc/loongson_ipi.c index 8c888da3b27c..93cc50a37a11 100644 --- a/hw/intc/loongson_ipi.c +++ b/hw/intc/loongson_ipi.c @@ -15,7 +15,12 @@ #include "qemu/log.h" #include "exec/address-spaces.h" #include "migration/vmstate.h" +#ifdef TARGET_LOONGARCH64 #include "target/loongarch/cpu.h" +#endif +#ifdef TARGET_MIPS +#include "target/mips/cpu.h" +#endif #include "trace.h" =20 static MemTxResult loongson_ipi_readl(void *opaque, hwaddr addr, @@ -56,18 +61,35 @@ static MemTxResult loongson_ipi_readl(void *opaque, hwa= ddr addr, return MEMTX_OK; } =20 -static void send_ipi_data(CPULoongArchState *env, uint64_t val, hwaddr add= r, +static AddressSpace *get_cpu_iocsr_as(CPUState *cpu) +{ +#ifdef TARGET_LOONGARCH64 + return LOONGARCH_CPU(cpu)->env.address_space_iocsr; +#endif +#ifdef TARGET_MIPS + if (ase_lcsr_available(&MIPS_CPU(cpu)->env)) { + return &MIPS_CPU(cpu)->env.iocsr.as; + } +#endif + return NULL; +} + +static MemTxResult send_ipi_data(CPUState *cpu, uint64_t val, hwaddr addr, MemTxAttrs attrs) { int i, mask =3D 0, data =3D 0; + AddressSpace *iocsr_as =3D get_cpu_iocsr_as(cpu); + + if (!iocsr_as) { + return MEMTX_DECODE_ERROR; + } =20 /* * bit 27-30 is mask for byte writing, * if the mask is 0, we need not to do anything. */ if ((val >> 27) & 0xf) { - data =3D address_space_ldl(env->address_space_iocsr, addr, - attrs, NULL); + data =3D address_space_ldl(iocsr_as, addr, attrs, NULL); for (i =3D 0; i < 4; i++) { /* get mask for byte writing */ if (val & (0x1 << (27 + i))) { @@ -78,8 +100,9 @@ static void send_ipi_data(CPULoongArchState *env, uint64= _t val, hwaddr addr, =20 data &=3D mask; data |=3D (val >> 32) & ~mask; - address_space_stl(env->address_space_iocsr, addr, - data, attrs, NULL); + address_space_stl(iocsr_as, addr, data, attrs, NULL); + + return MEMTX_OK; } =20 static int archid_cmp(const void *a, const void *b) @@ -130,8 +153,7 @@ static MemTxResult mail_send(uint64_t val, MemTxAttrs a= ttrs) /* override requester_id */ addr =3D SMP_IPI_MAILBOX + CORE_BUF_20 + (val & 0x1c); attrs.requester_id =3D cs->cpu_index; - send_ipi_data(&LOONGARCH_CPU(cs)->env, val, addr, attrs); - return MEMTX_OK; + return send_ipi_data(cs, val, addr, attrs); } =20 static MemTxResult any_send(uint64_t val, MemTxAttrs attrs) @@ -149,8 +171,7 @@ static MemTxResult any_send(uint64_t val, MemTxAttrs at= trs) /* override requester_id */ addr =3D val & 0xffff; attrs.requester_id =3D cs->cpu_index; - send_ipi_data(&LOONGARCH_CPU(cs)->env, val, addr, attrs); - return MEMTX_OK; + return send_ipi_data(cs, val, addr, attrs); } =20 static MemTxResult loongson_ipi_writel(void *opaque, hwaddr addr, uint64_t= val, --=20 2.34.1