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[217.169.11.214]) by smtp.gmail.com with ESMTPSA id n44-20020a05600c502c00b004146e58cc35sm23116116wmr.46.2024.05.07.03.27.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 May 2024 03:27:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20230601.gappssmtp.com; s=20230601; t=1715077658; x=1715682458; darn=nongnu.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=qT7P2K/liK/Hp+n9TjtwIIf1ig5PKfo3pe/2g+9eNWo=; b=AkPoj2CQJYfraUaA9xOVrt9lhhQcR/CGQ9slRbxEPHSHXShqtwRydfWksDtDRWWnhI +v+D1YzeoIxtME8GsOUY6o0HSdgmFZus47B2Uij8h9NH1FSfcU5WRUCDJbCJIlfp03Cg 1gZkkqWpQdc0H41NaQoCfm1vFeZkbySgujcuu1Rx3rhCKqr2W/jLNJ5e47T2UJjmkQ5i I7aKDIENCHLQp6wOBE9ODItsvoRpT2IzQTwVu2udWtPr5q0FzgJddIzG2laD/F+rc3fN H8L/mHYa1X2Zu+OCfGuei0JTcwrUkbeSO4ynl1K4zYe8vYzc1him2svqeCyBkICjiiHx sM5g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1715077658; x=1715682458; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=qT7P2K/liK/Hp+n9TjtwIIf1ig5PKfo3pe/2g+9eNWo=; b=Zw5K2zQY0jkXe96bWSKf1cMdr+Nyyg8b/n5Zl2ov8HVMA6MUi/U1LBwCCATJoqBBix dKWspa2zo8wdu2WhVAUfSxBondnjnjJgjZSFQdHV3nuXjxLDRnie11cCMiHr7YfXB6mi DvWv16a5CXAWRs4+mtdWdsf/7LqcNYDJWxdp8SPrsPDPL17DFbsBa5MmUw97fIXM70XR N8T+6ty5QZjWCNP4mMlSse5yM6SEnlNSlmW4Wv3RXjmOVHODlvcRiCYWBH55Lfglntqx uvdxzb/nvWgmJUoDKF+y7JUiyYP0Npv2mXTm5MUoU72V+AbAJTsTwmhG4X+XcSvJsljo ptiA== X-Gm-Message-State: AOJu0YxaRaUgq6/vbxUMk40uQQEtPMD6yOnDi/zQ6m7mXsjaeCAKx05w oDoFr534o3wF2zqgmHBfJhFEltD8OGN2KU4FXvKJ0ZvKzSE4MLCTjdMsJSf1WdqMUXkBpdtow3v 5w7k= X-Google-Smtp-Source: AGHT+IFsa0kgxS/n/nDcEoScMSnqzrupjnmapCiQtkETZZikUXFMeQrctENrXqdv5QZweoOIBwQIMw== X-Received: by 2002:a19:e017:0:b0:51d:3b87:70a4 with SMTP id x23-20020a19e017000000b0051d3b8770a4mr7912852lfg.36.1715077657451; Tue, 07 May 2024 03:27:37 -0700 (PDT) From: Rob Bradford To: qemu-devel@nongnu.org Cc: Rob Bradford , Palmer Dabbelt , Alistair Francis , Bin Meng , Weiwei Li , Daniel Henrique Barboza , Liu Zhiwei , qemu-riscv@nongnu.org (open list:RISC-V TCG CPUs) Subject: [PATCH] target/riscv: Remove experimental prefix from "B" extension Date: Tue, 7 May 2024 11:27:21 +0100 Message-ID: <20240507102721.55845-1-rbradford@rivosinc.com> X-Mailer: git-send-email 2.44.0 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::135; envelope-from=rbradford@rivosinc.com; helo=mail-lf1-x135.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @rivosinc-com.20230601.gappssmtp.com) X-ZM-MESSAGEID: 1715077686040100003 Content-Type: text/plain; charset="utf-8" This extension has now been ratified: https://jira.riscv.org/browse/RVS-2006 so the "x-" prefix can be removed. Signed-off-by: Rob Bradford Reviewed-by: Andrew Jones --- target/riscv/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index eb1a2e7d6d..861d9f4350 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -1396,7 +1396,7 @@ static const MISAExtInfo misa_ext_info_arr[] =3D { MISA_EXT_INFO(RVJ, "x-j", "Dynamic translated languages"), MISA_EXT_INFO(RVV, "v", "Vector operations"), MISA_EXT_INFO(RVG, "g", "General purpose (IMAFD_Zicsr_Zifencei)"), - MISA_EXT_INFO(RVB, "x-b", "Bit manipulation (Zba_Zbb_Zbs)") + MISA_EXT_INFO(RVB, "b", "Bit manipulation (Zba_Zbb_Zbs)") }; =20 static void riscv_cpu_validate_misa_mxl(RISCVCPUClass *mcc) --=20 2.44.0