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Mon, 06 May 2024 01:10:21 -0700 (PDT) X-Google-Smtp-Source: AGHT+IE/Sdldg2x5NJ300Qa6lJA60NBXBKNcKINxIqg+OjqbZ5lC7FqVTRvkiFKa1SiIKm1jRXQOZQ== X-Received: by 2002:a17:906:b212:b0:a59:a83b:d440 with SMTP id p18-20020a170906b21200b00a59a83bd440mr3791031ejz.31.1714983021055; Mon, 06 May 2024 01:10:21 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Cc: richard.henderson@linaro.org, zhao1.liu@intel.com Subject: [PATCH v2 07/25] target/i386: extend cc_* when using them to compute flags Date: Mon, 6 May 2024 10:09:39 +0200 Message-ID: <20240506080957.10005-8-pbonzini@redhat.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240506080957.10005-1-pbonzini@redhat.com> References: <20240506080957.10005-1-pbonzini@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -25 X-Spam_score: -2.6 X-Spam_bar: -- X-Spam_report: (-2.6 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.431, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=-0.01, RCVD_IN_MSPIKE_WL=-0.01, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1714983221991100003 Content-Type: text/plain; charset="utf-8" Instead of using s->tmp0 or s->tmp4 as the result, just extend the cc_* registers in place. It is harmless and, if multiple setcc instructions are used, the optimizer will be able to remove the redundant ones. Signed-off-by: Paolo Bonzini Reviewed-by: Richard Henderson --- target/i386/tcg/translate.c | 44 +++++++++++++++---------------------- 1 file changed, 18 insertions(+), 26 deletions(-) diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c index 17bf85da0ce..d76f72c1b96 100644 --- a/target/i386/tcg/translate.c +++ b/target/i386/tcg/translate.c @@ -940,28 +940,24 @@ static CCPrepare gen_prepare_sign_nz(TCGv src, MemOp = size) /* compute eflags.C to reg */ static CCPrepare gen_prepare_eflags_c(DisasContext *s, TCGv reg) { - TCGv t0, t1; MemOp size; =20 switch (s->cc_op) { case CC_OP_SUBB ... CC_OP_SUBQ: /* (DATA_TYPE)CC_SRCT < (DATA_TYPE)CC_SRC */ size =3D s->cc_op - CC_OP_SUBB; - t1 =3D gen_ext_tl(s->tmp0, cpu_cc_src, size, false); - /* If no temporary was used, be careful not to alias t1 and t0. */ - t0 =3D t1 =3D=3D cpu_cc_src ? s->tmp0 : reg; - tcg_gen_mov_tl(t0, s->cc_srcT); - gen_extu(size, t0); - goto add_sub; + gen_ext_tl(s->cc_srcT, s->cc_srcT, size, false); + gen_ext_tl(cpu_cc_src, cpu_cc_src, size, false); + return (CCPrepare) { .cond =3D TCG_COND_LTU, .reg =3D s->cc_srcT, + .reg2 =3D cpu_cc_src, .use_reg2 =3D true }; =20 case CC_OP_ADDB ... CC_OP_ADDQ: /* (DATA_TYPE)CC_DST < (DATA_TYPE)CC_SRC */ size =3D s->cc_op - CC_OP_ADDB; - t1 =3D gen_ext_tl(s->tmp0, cpu_cc_src, size, false); - t0 =3D gen_ext_tl(reg, cpu_cc_dst, size, false); - add_sub: - return (CCPrepare) { .cond =3D TCG_COND_LTU, .reg =3D t0, - .reg2 =3D t1, .use_reg2 =3D true }; + gen_ext_tl(cpu_cc_dst, cpu_cc_dst, size, false); + gen_ext_tl(cpu_cc_src, cpu_cc_src, size, false); + return (CCPrepare) { .cond =3D TCG_COND_LTU, .reg =3D cpu_cc_dst, + .reg2 =3D cpu_cc_src, .use_reg2 =3D true }; =20 case CC_OP_LOGICB ... CC_OP_LOGICQ: case CC_OP_CLR: @@ -984,8 +980,8 @@ static CCPrepare gen_prepare_eflags_c(DisasContext *s, = TCGv reg) =20 case CC_OP_BMILGB ... CC_OP_BMILGQ: size =3D s->cc_op - CC_OP_BMILGB; - t0 =3D gen_ext_tl(reg, cpu_cc_src, size, false); - return (CCPrepare) { .cond =3D TCG_COND_EQ, .reg =3D t0 }; + gen_ext_tl(cpu_cc_src, cpu_cc_src, size, false); + return (CCPrepare) { .cond =3D TCG_COND_EQ, .reg =3D cpu_cc_src }; =20 case CC_OP_ADCX: case CC_OP_ADCOX: @@ -1098,7 +1094,6 @@ static CCPrepare gen_prepare_cc(DisasContext *s, int = b, TCGv reg) int inv, jcc_op, cond; MemOp size; CCPrepare cc; - TCGv t0; =20 inv =3D b & 1; jcc_op =3D (b >> 1) & 7; @@ -1109,24 +1104,21 @@ static CCPrepare gen_prepare_cc(DisasContext *s, in= t b, TCGv reg) size =3D s->cc_op - CC_OP_SUBB; switch (jcc_op) { case JCC_BE: - tcg_gen_mov_tl(s->tmp4, s->cc_srcT); - gen_extu(size, s->tmp4); - t0 =3D gen_ext_tl(s->tmp0, cpu_cc_src, size, false); - cc =3D (CCPrepare) { .cond =3D TCG_COND_LEU, .reg =3D s->tmp4, - .reg2 =3D t0, .use_reg2 =3D true }; + gen_ext_tl(s->cc_srcT, s->cc_srcT, size, false); + gen_ext_tl(cpu_cc_src, cpu_cc_src, size, false); + cc =3D (CCPrepare) { .cond =3D TCG_COND_LEU, .reg =3D s->cc_sr= cT, + .reg2 =3D cpu_cc_src, .use_reg2 =3D true }; break; - case JCC_L: cond =3D TCG_COND_LT; goto fast_jcc_l; case JCC_LE: cond =3D TCG_COND_LE; fast_jcc_l: - tcg_gen_mov_tl(s->tmp4, s->cc_srcT); - gen_exts(size, s->tmp4); - t0 =3D gen_ext_tl(s->tmp0, cpu_cc_src, size, true); - cc =3D (CCPrepare) { .cond =3D cond, .reg =3D s->tmp4, - .reg2 =3D t0, .use_reg2 =3D true }; + gen_ext_tl(s->cc_srcT, s->cc_srcT, size, true); + gen_ext_tl(cpu_cc_src, cpu_cc_src, size, true); + cc =3D (CCPrepare) { .cond =3D cond, .reg =3D s->cc_srcT, + .reg2 =3D cpu_cc_src, .use_reg2 =3D true }; break; =20 default: --=20 2.45.0