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Mon, 06 May 2024 01:10:06 -0700 (PDT) X-Google-Smtp-Source: AGHT+IG6D7zF2z0ZwYhcHcFTojZCvfA/lWOfbjIkZ1l5vQoSpYq4z2BJKLyBtrW3774CSmMod1W/3w== X-Received: by 2002:a17:906:410d:b0:a59:a977:a156 with SMTP id j13-20020a170906410d00b00a59a977a156mr3607137ejk.64.1714983005694; Mon, 06 May 2024 01:10:05 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Cc: richard.henderson@linaro.org, zhao1.liu@intel.com Subject: [PATCH v2 02/25] target/i386: use TSTEQ/TSTNE to check flags Date: Mon, 6 May 2024 10:09:34 +0200 Message-ID: <20240506080957.10005-3-pbonzini@redhat.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240506080957.10005-1-pbonzini@redhat.com> References: <20240506080957.10005-1-pbonzini@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.133.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -25 X-Spam_score: -2.6 X-Spam_bar: -- X-Spam_report: (-2.6 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.431, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=-0.01, RCVD_IN_MSPIKE_WL=-0.01, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1714983079480100003 Content-Type: text/plain; charset="utf-8" The new conditions obviously come in handy when testing individual bits of EFLAGS, and they make it possible to remove the .mask field of CCPrepare. Lowering to shift+and is done by the optimizer if necessary. Reviewed-by: Richard Henderson Signed-off-by: Paolo Bonzini --- target/i386/tcg/translate.c | 32 ++++++++++++++++---------------- 1 file changed, 16 insertions(+), 16 deletions(-) diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c index 4735f084d40..62ba21c1d74 100644 --- a/target/i386/tcg/translate.c +++ b/target/i386/tcg/translate.c @@ -996,8 +996,8 @@ static CCPrepare gen_prepare_eflags_c(DisasContext *s, = TCGv reg) case CC_OP_EFLAGS: case CC_OP_SARB ... CC_OP_SARQ: /* CC_SRC & 1 */ - return (CCPrepare) { .cond =3D TCG_COND_NE, - .reg =3D cpu_cc_src, .mask =3D CC_C }; + return (CCPrepare) { .cond =3D TCG_COND_TSTNE, + .reg =3D cpu_cc_src, .mask =3D -1, .imm =3D C= C_C }; =20 default: /* The need to compute only C from CC_OP_DYNAMIC is important @@ -1014,8 +1014,8 @@ static CCPrepare gen_prepare_eflags_c(DisasContext *s= , TCGv reg) static CCPrepare gen_prepare_eflags_p(DisasContext *s, TCGv reg) { gen_compute_eflags(s); - return (CCPrepare) { .cond =3D TCG_COND_NE, .reg =3D cpu_cc_src, - .mask =3D CC_P }; + return (CCPrepare) { .cond =3D TCG_COND_TSTNE, .reg =3D cpu_cc_src, + .mask =3D -1, .imm =3D CC_P }; } =20 /* compute eflags.S to reg */ @@ -1029,8 +1029,8 @@ static CCPrepare gen_prepare_eflags_s(DisasContext *s= , TCGv reg) case CC_OP_ADCX: case CC_OP_ADOX: case CC_OP_ADCOX: - return (CCPrepare) { .cond =3D TCG_COND_NE, .reg =3D cpu_cc_src, - .mask =3D CC_S }; + return (CCPrepare) { .cond =3D TCG_COND_TSTNE, .reg =3D cpu_cc_src, + .mask =3D -1, .imm =3D CC_S }; case CC_OP_CLR: case CC_OP_POPCNT: return (CCPrepare) { .cond =3D TCG_COND_NEVER, .mask =3D -1 }; @@ -1058,8 +1058,8 @@ static CCPrepare gen_prepare_eflags_o(DisasContext *s= , TCGv reg) .reg =3D cpu_cc_src, .mask =3D -1 }; default: gen_compute_eflags(s); - return (CCPrepare) { .cond =3D TCG_COND_NE, .reg =3D cpu_cc_src, - .mask =3D CC_O }; + return (CCPrepare) { .cond =3D TCG_COND_TSTNE, .reg =3D cpu_cc_src, + .mask =3D -1, .imm =3D CC_O }; } } =20 @@ -1074,8 +1074,8 @@ static CCPrepare gen_prepare_eflags_z(DisasContext *s= , TCGv reg) case CC_OP_ADCX: case CC_OP_ADOX: case CC_OP_ADCOX: - return (CCPrepare) { .cond =3D TCG_COND_NE, .reg =3D cpu_cc_src, - .mask =3D CC_Z }; + return (CCPrepare) { .cond =3D TCG_COND_TSTNE, .reg =3D cpu_cc_src, + .mask =3D -1, .imm =3D CC_Z }; case CC_OP_CLR: return (CCPrepare) { .cond =3D TCG_COND_ALWAYS, .mask =3D -1 }; case CC_OP_POPCNT: @@ -1153,8 +1153,8 @@ static CCPrepare gen_prepare_cc(DisasContext *s, int = b, TCGv reg) break; case JCC_BE: gen_compute_eflags(s); - cc =3D (CCPrepare) { .cond =3D TCG_COND_NE, .reg =3D cpu_cc_sr= c, - .mask =3D CC_Z | CC_C }; + cc =3D (CCPrepare) { .cond =3D TCG_COND_TSTNE, .reg =3D cpu_cc= _src, + .mask =3D -1, .imm =3D CC_Z | CC_C }; break; case JCC_S: cc =3D gen_prepare_eflags_s(s, reg); @@ -1168,8 +1168,8 @@ static CCPrepare gen_prepare_cc(DisasContext *s, int = b, TCGv reg) reg =3D s->tmp0; } tcg_gen_addi_tl(reg, cpu_cc_src, CC_O - CC_S); - cc =3D (CCPrepare) { .cond =3D TCG_COND_NE, .reg =3D reg, - .mask =3D CC_O }; + cc =3D (CCPrepare) { .cond =3D TCG_COND_TSTNE, .reg =3D reg, + .mask =3D -1, .imm =3D CC_O }; break; default: case JCC_LE: @@ -1178,8 +1178,8 @@ static CCPrepare gen_prepare_cc(DisasContext *s, int = b, TCGv reg) reg =3D s->tmp0; } tcg_gen_addi_tl(reg, cpu_cc_src, CC_O - CC_S); - cc =3D (CCPrepare) { .cond =3D TCG_COND_NE, .reg =3D reg, - .mask =3D CC_O | CC_Z }; + cc =3D (CCPrepare) { .cond =3D TCG_COND_TSTNE, .reg =3D reg, + .mask =3D -1, .imm =3D CC_O | CC_Z }; break; } break; --=20 2.45.0