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Mon, 06 May 2024 00:52:17 -0700 (PDT) X-Google-Smtp-Source: AGHT+IGMVJ1toRyPZ/8sV9SH+Ji+ajKkaP/dhcVhLvj9diMv9vn/FcANNl2HJ0F1yD89gwHIuWbwfw== X-Received: by 2002:a50:99d8:0:b0:56c:d47:e403 with SMTP id n24-20020a5099d8000000b0056c0d47e403mr5838511edb.28.1714981937055; Mon, 06 May 2024 00:52:17 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 20/46] riscv: switch boards to "default y" Date: Mon, 6 May 2024 09:50:59 +0200 Message-ID: <20240506075125.8238-21-pbonzini@redhat.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240506075125.8238-1-pbonzini@redhat.com> References: <20240506075125.8238-1-pbonzini@redhat.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=170.10.129.124; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -25 X-Spam_score: -2.6 X-Spam_bar: -- X-Spam_report: (-2.6 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.431, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=-0.01, RCVD_IN_MSPIKE_WL=-0.01, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @redhat.com) X-ZM-MESSAGEID: 1714982402536100002 Content-Type: text/plain; charset="utf-8" Some targets use "default y" for boards to filter out those that require TCG. For consistency we are switching all other targets to do the same. Continue with RISC-V. No changes to generated config-devices.mak file. Signed-off-by: Paolo Bonzini --- configs/devices/riscv32-softmmu/default.mak | 13 ++++++------- configs/devices/riscv64-softmmu/default.mak | 15 +++++++-------- .gitlab-ci.d/buildtest.yml | 2 +- hw/riscv/Kconfig | 14 ++++++++++++++ 4 files changed, 28 insertions(+), 16 deletions(-) diff --git a/configs/devices/riscv32-softmmu/default.mak b/configs/devices/= riscv32-softmmu/default.mak index 07e4fd26df3..c2cd86ce05f 100644 --- a/configs/devices/riscv32-softmmu/default.mak +++ b/configs/devices/riscv32-softmmu/default.mak @@ -4,10 +4,9 @@ # CONFIG_PCI_DEVICES=3Dn # CONFIG_TEST_DEVICES=3Dn =20 -# Boards: -# -CONFIG_SPIKE=3Dy -CONFIG_SIFIVE_E=3Dy -CONFIG_SIFIVE_U=3Dy -CONFIG_RISCV_VIRT=3Dy -CONFIG_OPENTITAN=3Dy +# Boards are selected by default, uncomment to keep out of the build. +# CONFIG_SPIKE=3Dn +# CONFIG_SIFIVE_E=3Dn +# CONFIG_SIFIVE_U=3Dn +# CONFIG_RISCV_VIRT=3Dn +# CONFIG_OPENTITAN=3Dn diff --git a/configs/devices/riscv64-softmmu/default.mak b/configs/devices/= riscv64-softmmu/default.mak index 221963d4c5c..39ed3a0061a 100644 --- a/configs/devices/riscv64-softmmu/default.mak +++ b/configs/devices/riscv64-softmmu/default.mak @@ -4,11 +4,10 @@ # CONFIG_PCI_DEVICES=3Dn # CONFIG_TEST_DEVICES=3Dn =20 -# Boards: -# -CONFIG_SPIKE=3Dy -CONFIG_SIFIVE_E=3Dy -CONFIG_SIFIVE_U=3Dy -CONFIG_RISCV_VIRT=3Dy -CONFIG_MICROCHIP_PFSOC=3Dy -CONFIG_SHAKTI_C=3Dy +# Boards are selected by default, uncomment to keep out of the build. +# CONFIG_SPIKE=3Dn +# CONFIG_SIFIVE_E=3Dn +# CONFIG_SIFIVE_U=3Dn +# CONFIG_RISCV_VIRT=3Dn +# CONFIG_MICROCHIP_PFSOC=3Dn +# CONFIG_SHAKTI_C=3Dn diff --git a/.gitlab-ci.d/buildtest.yml b/.gitlab-ci.d/buildtest.yml index a5f4b4d3793..a65b5fc9560 100644 --- a/.gitlab-ci.d/buildtest.yml +++ b/.gitlab-ci.d/buildtest.yml @@ -649,7 +649,7 @@ build-tci: =20 # Check our reduced build configurations # requires libfdt: aarch64, arm, i386, loongarch64, microblaze, microblaze= el, -# mips64el, or1k, ppc, ppc64, x86_64 +# mips64el, or1k, ppc, ppc64, riscv32, riscv64, x86_64 # does not build without boards: i386, loongarch64, x86_64 build-without-defaults: extends: .native_build_job_template diff --git a/hw/riscv/Kconfig b/hw/riscv/Kconfig index fc72ef03799..5f5f9e31bb0 100644 --- a/hw/riscv/Kconfig +++ b/hw/riscv/Kconfig @@ -8,6 +8,8 @@ config IBEX =20 config MICROCHIP_PFSOC bool + default y + depends on RISCV64 select CADENCE_SDHCI select CPU_CLUSTER select MCHP_PFSOC_DMC @@ -21,12 +23,16 @@ config MICROCHIP_PFSOC =20 config OPENTITAN bool + default y + depends on RISCV32 select IBEX select SIFIVE_PLIC select UNIMP =20 config RISCV_VIRT bool + default y + depends on RISCV32 || RISCV64 imply PCI_DEVICES imply VIRTIO_VGA imply TEST_DEVICES @@ -51,6 +57,8 @@ config RISCV_VIRT =20 config SHAKTI_C bool + default y + depends on RISCV64 select RISCV_ACLINT select SHAKTI_UART select SIFIVE_PLIC @@ -58,6 +66,8 @@ config SHAKTI_C =20 config SIFIVE_E bool + default y + depends on RISCV32 || RISCV64 select RISCV_ACLINT select SIFIVE_GPIO select SIFIVE_PLIC @@ -68,6 +78,8 @@ config SIFIVE_E =20 config SIFIVE_U bool + default y + depends on RISCV32 || RISCV64 select CADENCE select CPU_CLUSTER select RISCV_ACLINT @@ -85,6 +97,8 @@ config SIFIVE_U =20 config SPIKE bool + default y + depends on RISCV32 || RISCV64 select RISCV_NUMA select HTIF select RISCV_ACLINT --=20 2.44.0