From nobody Thu Nov 14 17:56:33 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1714124112231486.0133308785893; Fri, 26 Apr 2024 02:35:12 -0700 (PDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1s0HyM-0001Hd-IQ; Fri, 26 Apr 2024 05:34:26 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s0HyI-0000sc-TQ for qemu-devel@nongnu.org; Fri, 26 Apr 2024 05:34:22 -0400 Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1s0HyF-0001l8-Hx for qemu-devel@nongnu.org; Fri, 26 Apr 2024 05:34:22 -0400 Received: from loongson.cn (unknown [10.2.5.185]) by gateway (Coremail) with SMTP id _____8Bxc+q_dCtmCWYDAA--.1957S3; Fri, 26 Apr 2024 17:32:47 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.185]) by localhost.localdomain (Coremail) with SMTP id AQAAf8BxU1a2dCtm+yUGAA--.2929S12; Fri, 26 Apr 2024 17:32:47 +0800 (CST) From: Song Gao To: qemu-devel@nongnu.org, maobibo@loongson.cn Cc: richard.henderson@linaro.org, peter.maydell@linaro.org, philmd@linaro.org, zltjiangshi@gmail.com Subject: [PATCH v7 10/17] hw/loongarch: fdt adds cpu interrupt controller node Date: Fri, 26 Apr 2024 17:15:44 +0800 Message-Id: <20240426091551.2397867-11-gaosong@loongson.cn> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20240426091551.2397867-1-gaosong@loongson.cn> References: <20240426091551.2397867-1-gaosong@loongson.cn> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: AQAAf8BxU1a2dCtm+yUGAA--.2929S12 X-CM-SenderInfo: 5jdr20tqj6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=114.242.206.163; envelope-from=gaosong@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZM-MESSAGEID: 1714124112779100001 Content-Type: text/plain; charset="utf-8" fdt adds cpu interrupt controller node, we use 'loongson,cpu-interrupt-controller'. See: https://github.com/torvalds/linux/blob/v6.7/drivers/irqchip/irq-loongarch-c= pu.c https://lore.kernel.org/r/20221114113824.1880-2-liupeibao@loongson.cn Signed-off-by: Song Gao Reviewed-by: Bibo Mao Message-Id: <20240307164835.300412-11-gaosong@loongson.cn> --- hw/loongarch/virt.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c index 032f5f2ddf..88cdcb6f91 100644 --- a/hw/loongarch/virt.c +++ b/hw/loongarch/virt.c @@ -106,6 +106,23 @@ static void virt_flash_map(LoongArchMachineState *lams, virt_flash_map1(flash1, VIRT_FLASH1_BASE, VIRT_FLASH1_SIZE, sysmem); } =20 +static void fdt_add_cpuic_node(LoongArchMachineState *lams, + uint32_t *cpuintc_phandle) +{ + MachineState *ms =3D MACHINE(lams); + char *nodename; + + *cpuintc_phandle =3D qemu_fdt_alloc_phandle(ms->fdt); + nodename =3D g_strdup_printf("/cpuic"); + qemu_fdt_add_subnode(ms->fdt, nodename); + qemu_fdt_setprop_cell(ms->fdt, nodename, "phandle", *cpuintc_phandle); + qemu_fdt_setprop_string(ms->fdt, nodename, "compatible", + "loongson,cpu-interrupt-controller"); + qemu_fdt_setprop(ms->fdt, nodename, "interrupt-controller", NULL, 0); + qemu_fdt_setprop_cell(ms->fdt, nodename, "#interrupt-cells", 1); + g_free(nodename); +} + static void fdt_add_flash_node(LoongArchMachineState *lams) { MachineState *ms =3D MACHINE(lams); @@ -528,6 +545,7 @@ static void loongarch_irq_init(LoongArchMachineState *l= ams) CPULoongArchState *env; CPUState *cpu_state; int cpu, pin, i, start, num; + uint32_t cpuintc_phandle; =20 /* * The connection of interrupts: @@ -562,6 +580,9 @@ static void loongarch_irq_init(LoongArchMachineState *l= ams) memory_region_add_subregion(&lams->system_iocsr, MAIL_SEND_ADDR, sysbus_mmio_get_region(SYS_BUS_DEVICE(ipi), 1)); =20 + /* Add cpu interrupt-controller */ + fdt_add_cpuic_node(lams, &cpuintc_phandle); + for (cpu =3D 0; cpu < ms->smp.cpus; cpu++) { cpu_state =3D qemu_get_cpu(cpu); cpudev =3D DEVICE(cpu_state); --=20 2.25.1