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([156.19.246.23]) by smtp.gmail.com with ESMTPSA id t6-20020a170902e84600b001e604438791sm12465715plg.156.2024.04.24.17.00.51 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 24 Apr 2024 17:00:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1714003252; x=1714608052; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:from:to:cc:subject:date:message-id :reply-to; bh=DDHWgjyo2VgO58BUrIJ7Ba+V+lHv8+24gGeXKyuyNL0=; b=YCit2llKLxzQiFLcSNb7ru0TGYXwfrEFFBO5Bq7BXgDo5SeH4o5siqPHZZgI1WK9A8 98v/A6lgK2c5SYWWg5VwLHWmBswnv0lB0A1/RqBoC8zUFmQjWV3AxxUWwq8gguv3fmWw j7BmHkH2D9rvyCwPIklyeLDpUYLR6eQsLw+JDfQ7gBewiUjA7cmviWLckDmGPr1z+FNo G7mVLGUgtNhdiKsU3IrRMLaFtRLpFmJgtIlYc+/dWYZL/JdcCjapB0MNhjeDc+CZAu37 pSqagb9k3FcNfg5RtvZ/Fha3YvCHRkn6zuPHwV5ZGdES0SIs2VnKeXHWL6Yk9jWHAddw 01/Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1714003252; x=1714608052; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=DDHWgjyo2VgO58BUrIJ7Ba+V+lHv8+24gGeXKyuyNL0=; b=vKHQvgSJsDDZpFXsgsF/Wtl1lL5/+IERMYc5q2ifFdtPbbnN5CAzSp4Y0G2aDSGD/p 7zLc2rlvLNiBhTDtsfVxV+EW5UZyN4EKc5T/PBoSfQYCS/vehTergE3aeC4QEX+pUZ+O SFRhxItLwhYv7RlEYACeN8Q7xwqtr2SJM8KWds4xLrT+OoG/0xJUXXS4vdLE8yoBfVow H2QFimVrib6ph8YnxItF6cUy8gIOCycSgYw/x5bZ9NQBhnrFTxdhVl+91DusmEmxg3qy 23+ekA61s+E1SrzxzxiNoZm/SjBPTzbrB//ps6zc2nrbkVFOE4EUi2c7tyP0TsQRADY/ JwVg== X-Gm-Message-State: AOJu0Ywpiymn5syU6zWpDuSpbYmuWKb5MuDkxTRFiUDuHbxKIwm/RawN 9SYpICoz/yvZ5hZaREmH+rUPUXialUWEhXJul92heXeocOB3qcTY2BNTaHBkXXdo6haHGNbcvld a X-Google-Smtp-Source: AGHT+IGitze3xNLPwVxQA/BDdERfZn5c+CcyqtnbPUAUjX4t582QHkehCjb5DY1pfBHvYR1N5Nu7bg== X-Received: by 2002:a17:902:d2c2:b0:1e2:bdfa:9c15 with SMTP id n2-20020a170902d2c200b001e2bdfa9c15mr5383672plc.41.1714003252613; Wed, 24 Apr 2024 17:00:52 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH 28/45] target/hppa: Introduce DisasDelayException Date: Wed, 24 Apr 2024 17:00:06 -0700 Message-Id: <20240425000023.1002026-29-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240425000023.1002026-1-richard.henderson@linaro.org> References: <20240425000023.1002026-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::62c; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1714003736050100001 Content-Type: text/plain; charset="utf-8" Allow an exception to be emitted at the end of the TranslationBlock, leaving only the conditional branch inline. Use it for simple exception instructions like break, which happen to be nullified. Signed-off-by: Richard Henderson --- target/hppa/translate.c | 60 +++++++++++++++++++++++++++++++++++++---- 1 file changed, 55 insertions(+), 5 deletions(-) diff --git a/target/hppa/translate.c b/target/hppa/translate.c index 5714e2ad25..7a92901e18 100644 --- a/target/hppa/translate.c +++ b/target/hppa/translate.c @@ -50,6 +50,17 @@ typedef struct DisasIAQE { int64_t disp; } DisasIAQE; =20 +typedef struct DisasDelayException { + struct DisasDelayException *next; + TCGLabel *lab; + uint32_t insn; + bool set_iir; + int8_t set_n; + uint8_t excp; + /* Saved state at parent insn. */ + DisasIAQE iaq_f, iaq_b; +} DisasDelayException; + typedef struct DisasContext { DisasContextBase base; CPUState *cs; @@ -65,6 +76,7 @@ typedef struct DisasContext { DisasCond null_cond; TCGLabel *null_lab; =20 + DisasDelayException *delay_excp_list; TCGv_i64 zero; =20 uint32_t insn; @@ -682,13 +694,38 @@ static void gen_excp(DisasContext *ctx, int exception) ctx->base.is_jmp =3D DISAS_NORETURN; } =20 +static DisasDelayException *delay_excp(DisasContext *ctx, uint8_t excp) +{ + DisasDelayException *e =3D tcg_malloc(sizeof(DisasDelayException)); + + memset(e, 0, sizeof(*e)); + e->next =3D ctx->delay_excp_list; + ctx->delay_excp_list =3D e; + + e->lab =3D gen_new_label(); + e->insn =3D ctx->insn; + e->set_iir =3D true; + e->set_n =3D ctx->psw_n_nonzero ? 0 : -1; + e->excp =3D excp; + e->iaq_f =3D ctx->iaq_f; + e->iaq_b =3D ctx->iaq_b; + + return e; +} + static bool gen_excp_iir(DisasContext *ctx, int exc) { - nullify_over(ctx); - tcg_gen_st_i64(tcg_constant_i64(ctx->insn), - tcg_env, offsetof(CPUHPPAState, cr[CR_IIR])); - gen_excp(ctx, exc); - return nullify_end(ctx); + if (ctx->null_cond.c =3D=3D TCG_COND_NEVER) { + tcg_gen_st_i64(tcg_constant_i64(ctx->insn), + tcg_env, offsetof(CPUHPPAState, cr[CR_IIR])); + gen_excp(ctx, exc); + } else { + DisasDelayException *e =3D delay_excp(ctx, exc); + tcg_gen_brcond_i64(tcg_invert_cond(ctx->null_cond.c), + ctx->null_cond.a0, ctx->null_cond.a1, e->lab); + ctx->null_cond =3D cond_make_f(); + } + return true; } =20 static bool gen_illegal(DisasContext *ctx) @@ -4695,6 +4732,19 @@ static void hppa_tr_tb_stop(DisasContextBase *dcbase= , CPUState *cs) default: g_assert_not_reached(); } + + for (DisasDelayException *e =3D ctx->delay_excp_list; e ; e =3D e->nex= t) { + gen_set_label(e->lab); + if (e->set_n >=3D 0) { + tcg_gen_movi_i64(cpu_psw_n, e->set_n); + } + if (e->set_iir) { + tcg_gen_st_i64(tcg_constant_i64(e->insn), tcg_env, + offsetof(CPUHPPAState, cr[CR_IIR])); + } + install_iaq_entries(ctx, &e->iaq_f, &e->iaq_b); + gen_excp_1(e->excp); + } } =20 static void hppa_tr_disas_log(const DisasContextBase *dcbase, --=20 2.34.1